ArmVirtPkg/PrePi/PrePi.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
   4 *
   5 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   6 *
   7 **/
   8
   9 #include <PiPei.h>
  10 #include <Pi/PiBootMode.h>
  11
  12 #include <Library/PrePiLib.h>
  13 #include <Library/PrintLib.h>
  14 #include <Library/PrePiHobListPointerLib.h>
  15 #include <Library/TimerLib.h>
  16 #include <Library/PerformanceLib.h>
  17 #include <Library/CacheMaintenanceLib.h>
  18
  19 #include <Ppi/GuidedSectionExtraction.h>
  20 #include <Ppi/ArmMpCoreInfo.h>
  21
  22 #include "PrePi.h"
  23
  24 VOID
  25 EFIAPI
  26 ProcessLibraryConstructorList (
  27   VOID
  28   );
  29
  30 VOID
  31 PrePiMain (
  32   IN  UINTN                     UefiMemoryBase,
  33   IN  UINTN                     StacksBase,
  34   IN  UINT64                    StartTimeStamp
  35   )
  36 {
  37   EFI_HOB_HANDOFF_INFO_TABLE*   HobList;
  38   EFI_STATUS                    Status;
  39   CHAR8                         Buffer[100];
  40   UINTN                         CharCount;
  41   UINTN                         StacksSize;
  42
  43   // Initialize the architecture specific bits
  44   ArchInitialize ();
  45
  46   // Declare the PI/UEFI memory region
  47   HobList = HobConstructor (
  48     (VOID*)UefiMemoryBase,
  49     FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
  50     (VOID*)UefiMemoryBase,
  51     (VOID*)StacksBase  // The top of the UEFI Memory is reserved for the stacks
  52     );
  53   PrePeiSetHobList (HobList);
  54
  55   //
  56   // Ensure that the loaded image is invalidated in the caches, so that any
  57   // modifications we made with the caches and MMU off (such as the applied
  58   // relocations) don't become invisible once we turn them on.
  59   //
  60   InvalidateDataCacheRange((VOID *)(UINTN)PcdGet64 (PcdFdBaseAddress), PcdGet32 (PcdFdSize));
  61
  62   // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
  63   Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
  64   ASSERT_EFI_ERROR (Status);
  65
  66   // Initialize the Serial Port
  67   SerialPortInitialize ();
  68   CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",
  69     (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
  70   SerialPortWrite ((UINT8 *) Buffer, CharCount);
  71
  72   // Create the Stacks HOB (reserve the memory for all stacks)
  73   StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
  74   BuildStackHob (StacksBase, StacksSize);
  75
  76   //TODO: Call CpuPei as a library
  77   BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
  78
  79   // Set the Boot Mode
  80   SetBootMode (BOOT_WITH_FULL_CONFIGURATION);
  81
  82   // Initialize Platform HOBs (CpuHob and FvHob)
  83   Status = PlatformPeim ();
  84   ASSERT_EFI_ERROR (Status);
  85
  86   // Now, the HOB List has been initialized, we can register performance information
  87   PERF_START (NULL, "PEI", NULL, StartTimeStamp);
  88
  89   // SEC phase needs to run library constructors by hand.
  90   ProcessLibraryConstructorList ();
  91
  92   // Assume the FV that contains the SEC (our code) also contains a compressed FV.
  93   Status = DecompressFirstFv ();
  94   ASSERT_EFI_ERROR (Status);
  95
  96   // Load the DXE Core and transfer control to it
  97   Status = LoadDxeCoreFromFv (NULL, 0);
  98   ASSERT_EFI_ERROR (Status);
  99 }
 100
 101 VOID
 102 CEntryPoint (
 103   IN  UINTN                     MpId,
 104   IN  UINTN                     UefiMemoryBase,
 105   IN  UINTN                     StacksBase
 106   )
 107 {
 108   UINT64   StartTimeStamp;
 109
 110   if (PerformanceMeasurementEnabled ()) {
 111     // Initialize the Timer Library to setup the Timer HW controller
 112     TimerConstructor ();
 113     // We cannot call yet the PerformanceLib because the HOB List has not been initialized
 114     StartTimeStamp = GetPerformanceCounter ();
 115   } else {
 116     StartTimeStamp = 0;
 117   }
 118
 119   // Data Cache enabled on Primary core when MMU is enabled.
 120   ArmDisableDataCache ();
 121   // Invalidate instruction cache
 122   ArmInvalidateInstructionCache ();
 123   // Enable Instruction Caches on all cores.
 124   ArmEnableInstructionCache ();
 125
 126   PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 127
 128   // DXE Core should always load and never return
 129   ASSERT (FALSE);
 130 }