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BaseTools GenFw: Add support for RISCV GOT/PLT relocations
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1 /** @file
2 Elf64 convert solution
3
4 Copyright (c) 2010 - 2021, Intel Corporation. All rights reserved.<BR>
5 Portions copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
6 Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
7
8 SPDX-License-Identifier: BSD-2-Clause-Patent
9
10 **/
11
12 #include "WinNtInclude.h"
13
14 #ifndef __GNUC__
15 #include <windows.h>
16 #include <io.h>
17 #endif
18 #include <assert.h>
19 #include <stdio.h>
20 #include <stdlib.h>
21 #include <string.h>
22 #include <time.h>
23 #include <ctype.h>
24
25 #include <Common/UefiBaseTypes.h>
26 #include <IndustryStandard/PeImage.h>
27
28 #include "PeCoffLib.h"
29 #include "EfiUtilityMsgs.h"
30
31 #include "GenFw.h"
32 #include "ElfConvert.h"
33 #include "Elf64Convert.h"
34
35 STATIC
36 VOID
37 ScanSections64 (
38 VOID
39 );
40
41 STATIC
42 BOOLEAN
43 WriteSections64 (
44 SECTION_FILTER_TYPES FilterType
45 );
46
47 STATIC
48 VOID
49 WriteRelocations64 (
50 VOID
51 );
52
53 STATIC
54 VOID
55 WriteDebug64 (
56 VOID
57 );
58
59 STATIC
60 VOID
61 SetImageSize64 (
62 VOID
63 );
64
65 STATIC
66 VOID
67 CleanUp64 (
68 VOID
69 );
70
71 //
72 // Rename ELF32 structures to common names to help when porting to ELF64.
73 //
74 typedef Elf64_Shdr Elf_Shdr;
75 typedef Elf64_Ehdr Elf_Ehdr;
76 typedef Elf64_Rel Elf_Rel;
77 typedef Elf64_Rela Elf_Rela;
78 typedef Elf64_Sym Elf_Sym;
79 typedef Elf64_Phdr Elf_Phdr;
80 typedef Elf64_Dyn Elf_Dyn;
81 #define ELFCLASS ELFCLASS64
82 #define ELF_R_TYPE(r) ELF64_R_TYPE(r)
83 #define ELF_R_SYM(r) ELF64_R_SYM(r)
84
85 //
86 // Well known ELF structures.
87 //
88 STATIC Elf_Ehdr *mEhdr;
89 STATIC Elf_Shdr *mShdrBase;
90 STATIC Elf_Phdr *mPhdrBase;
91
92 //
93 // GOT information
94 //
95 STATIC Elf_Shdr *mGOTShdr = NULL;
96 STATIC UINT32 mGOTShindex = 0;
97 STATIC UINT32 *mGOTCoffEntries = NULL;
98 STATIC UINT32 mGOTMaxCoffEntries = 0;
99 STATIC UINT32 mGOTNumCoffEntries = 0;
100
101 //
102 // Coff information
103 //
104 STATIC UINT32 mCoffAlignment = 0x20;
105
106 //
107 // PE section alignment.
108 //
109 STATIC const UINT16 mCoffNbrSections = 4;
110
111 //
112 // ELF sections to offset in Coff file.
113 //
114 STATIC UINT32 *mCoffSectionsOffset = NULL;
115
116 //
117 // Offsets in COFF file
118 //
119 STATIC UINT32 mNtHdrOffset;
120 STATIC UINT32 mTextOffset;
121 STATIC UINT32 mDataOffset;
122 STATIC UINT32 mHiiRsrcOffset;
123 STATIC UINT32 mRelocOffset;
124 STATIC UINT32 mDebugOffset;
125
126 //
127 // Used for RISC-V relocations.
128 //
129 STATIC UINT8 *mRiscVPass1Targ = NULL;
130 STATIC Elf_Shdr *mRiscVPass1Sym = NULL;
131 STATIC Elf64_Half mRiscVPass1SymSecIndex = 0;
132 STATIC INT32 mRiscVPass1Offset;
133 STATIC INT32 mRiscVPass1GotFixup;
134
135 //
136 // Initialization Function
137 //
138 BOOLEAN
139 InitializeElf64 (
140 UINT8 *FileBuffer,
141 ELF_FUNCTION_TABLE *ElfFunctions
142 )
143 {
144 //
145 // Initialize data pointer and structures.
146 //
147 VerboseMsg ("Set EHDR");
148 mEhdr = (Elf_Ehdr*) FileBuffer;
149
150 //
151 // Check the ELF64 specific header information.
152 //
153 VerboseMsg ("Check ELF64 Header Information");
154 if (mEhdr->e_ident[EI_CLASS] != ELFCLASS64) {
155 Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFCLASS64");
156 return FALSE;
157 }
158 if (mEhdr->e_ident[EI_DATA] != ELFDATA2LSB) {
159 Error (NULL, 0, 3000, "Unsupported", "ELF EI_DATA not ELFDATA2LSB");
160 return FALSE;
161 }
162 if ((mEhdr->e_type != ET_EXEC) && (mEhdr->e_type != ET_DYN)) {
163 Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
164 return FALSE;
165 }
166 if (!((mEhdr->e_machine == EM_X86_64) || (mEhdr->e_machine == EM_AARCH64) || (mEhdr->e_machine == EM_RISCV64))) {
167 Warning (NULL, 0, 3000, "Unsupported", "ELF e_machine is not Elf64 machine.");
168 }
169 if (mEhdr->e_version != EV_CURRENT) {
170 Error (NULL, 0, 3000, "Unsupported", "ELF e_version (%u) not EV_CURRENT (%d)", (unsigned) mEhdr->e_version, EV_CURRENT);
171 return FALSE;
172 }
173
174 //
175 // Update section header pointers
176 //
177 VerboseMsg ("Update Header Pointers");
178 mShdrBase = (Elf_Shdr *)((UINT8 *)mEhdr + mEhdr->e_shoff);
179 mPhdrBase = (Elf_Phdr *)((UINT8 *)mEhdr + mEhdr->e_phoff);
180
181 //
182 // Create COFF Section offset buffer and zero.
183 //
184 VerboseMsg ("Create COFF Section Offset Buffer");
185 mCoffSectionsOffset = (UINT32 *)malloc(mEhdr->e_shnum * sizeof (UINT32));
186 if (mCoffSectionsOffset == NULL) {
187 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");
188 return FALSE;
189 }
190 memset(mCoffSectionsOffset, 0, mEhdr->e_shnum * sizeof(UINT32));
191
192 //
193 // Fill in function pointers.
194 //
195 VerboseMsg ("Fill in Function Pointers");
196 ElfFunctions->ScanSections = ScanSections64;
197 ElfFunctions->WriteSections = WriteSections64;
198 ElfFunctions->WriteRelocations = WriteRelocations64;
199 ElfFunctions->WriteDebug = WriteDebug64;
200 ElfFunctions->SetImageSize = SetImageSize64;
201 ElfFunctions->CleanUp = CleanUp64;
202
203 return TRUE;
204 }
205
206
207 //
208 // Header by Index functions
209 //
210 STATIC
211 Elf_Shdr*
212 GetShdrByIndex (
213 UINT32 Num
214 )
215 {
216 if (Num >= mEhdr->e_shnum) {
217 Error (NULL, 0, 3000, "Invalid", "GetShdrByIndex: Index %u is too high.", Num);
218 exit(EXIT_FAILURE);
219 }
220
221 return (Elf_Shdr*)((UINT8*)mShdrBase + Num * mEhdr->e_shentsize);
222 }
223
224 STATIC
225 UINT32
226 CoffAlign (
227 UINT32 Offset
228 )
229 {
230 return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);
231 }
232
233 STATIC
234 UINT32
235 DebugRvaAlign (
236 UINT32 Offset
237 )
238 {
239 return (Offset + 3) & ~3;
240 }
241
242 //
243 // filter functions
244 //
245 STATIC
246 BOOLEAN
247 IsTextShdr (
248 Elf_Shdr *Shdr
249 )
250 {
251 return (BOOLEAN) (((Shdr->sh_flags & (SHF_EXECINSTR | SHF_ALLOC)) == (SHF_EXECINSTR | SHF_ALLOC)) ||
252 ((Shdr->sh_flags & (SHF_WRITE | SHF_ALLOC)) == SHF_ALLOC));
253 }
254
255 STATIC
256 BOOLEAN
257 IsHiiRsrcShdr (
258 Elf_Shdr *Shdr
259 )
260 {
261 Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);
262
263 return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);
264 }
265
266 STATIC
267 BOOLEAN
268 IsDataShdr (
269 Elf_Shdr *Shdr
270 )
271 {
272 if (IsHiiRsrcShdr(Shdr)) {
273 return FALSE;
274 }
275 return (BOOLEAN) (Shdr->sh_flags & (SHF_EXECINSTR | SHF_WRITE | SHF_ALLOC)) == (SHF_ALLOC | SHF_WRITE);
276 }
277
278 STATIC
279 BOOLEAN
280 IsStrtabShdr (
281 Elf_Shdr *Shdr
282 )
283 {
284 Elf_Shdr *Namedr = GetShdrByIndex(mEhdr->e_shstrndx);
285
286 return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name, ELF_STRTAB_SECTION_NAME) == 0);
287 }
288
289 STATIC
290 Elf_Shdr *
291 FindStrtabShdr (
292 VOID
293 )
294 {
295 UINT32 i;
296 for (i = 0; i < mEhdr->e_shnum; i++) {
297 Elf_Shdr *shdr = GetShdrByIndex(i);
298 if (IsStrtabShdr(shdr)) {
299 return shdr;
300 }
301 }
302 return NULL;
303 }
304
305 STATIC
306 const UINT8 *
307 GetSymName (
308 Elf_Sym *Sym
309 )
310 {
311 Elf_Shdr *StrtabShdr;
312 UINT8 *StrtabContents;
313 BOOLEAN foundEnd;
314 UINT32 i;
315
316 if (Sym->st_name == 0) {
317 return NULL;
318 }
319
320 StrtabShdr = FindStrtabShdr();
321 if (StrtabShdr == NULL) {
322 return NULL;
323 }
324
325 assert(Sym->st_name < StrtabShdr->sh_size);
326
327 StrtabContents = (UINT8*)mEhdr + StrtabShdr->sh_offset;
328
329 foundEnd = FALSE;
330 for (i= Sym->st_name; (i < StrtabShdr->sh_size) && !foundEnd; i++) {
331 foundEnd = (BOOLEAN)(StrtabContents[i] == 0);
332 }
333 assert(foundEnd);
334
335 return StrtabContents + Sym->st_name;
336 }
337
338 //
339 // Find the ELF section hosting the GOT from an ELF Rva
340 // of a single GOT entry. Normally, GOT is placed in
341 // ELF .text section, so assume once we find in which
342 // section the GOT is, all GOT entries are there, and
343 // just verify this.
344 //
345 STATIC
346 VOID
347 FindElfGOTSectionFromGOTEntryElfRva (
348 Elf64_Addr GOTEntryElfRva
349 )
350 {
351 UINT32 i;
352 if (mGOTShdr != NULL) {
353 if (GOTEntryElfRva >= mGOTShdr->sh_addr &&
354 GOTEntryElfRva < mGOTShdr->sh_addr + mGOTShdr->sh_size) {
355 return;
356 }
357 Error (NULL, 0, 3000, "Unsupported", "FindElfGOTSectionFromGOTEntryElfRva: GOT entries found in multiple sections.");
358 exit(EXIT_FAILURE);
359 }
360 for (i = 0; i < mEhdr->e_shnum; i++) {
361 Elf_Shdr *shdr = GetShdrByIndex(i);
362 if (GOTEntryElfRva >= shdr->sh_addr &&
363 GOTEntryElfRva < shdr->sh_addr + shdr->sh_size) {
364 mGOTShdr = shdr;
365 mGOTShindex = i;
366 return;
367 }
368 }
369 Error (NULL, 0, 3000, "Invalid", "FindElfGOTSectionFromGOTEntryElfRva: ElfRva 0x%016LX for GOT entry not found in any section.", GOTEntryElfRva);
370 exit(EXIT_FAILURE);
371 }
372
373 //
374 // Stores locations of GOT entries in COFF image.
375 // Returns TRUE if GOT entry is new.
376 // Simple implementation as number of GOT
377 // entries is expected to be low.
378 //
379
380 STATIC
381 BOOLEAN
382 AccumulateCoffGOTEntries (
383 UINT32 GOTCoffEntry
384 )
385 {
386 UINT32 i;
387 if (mGOTCoffEntries != NULL) {
388 for (i = 0; i < mGOTNumCoffEntries; i++) {
389 if (mGOTCoffEntries[i] == GOTCoffEntry) {
390 return FALSE;
391 }
392 }
393 }
394 if (mGOTCoffEntries == NULL) {
395 mGOTCoffEntries = (UINT32*)malloc(5 * sizeof *mGOTCoffEntries);
396 if (mGOTCoffEntries == NULL) {
397 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");
398 }
399 assert (mGOTCoffEntries != NULL);
400 mGOTMaxCoffEntries = 5;
401 mGOTNumCoffEntries = 0;
402 } else if (mGOTNumCoffEntries == mGOTMaxCoffEntries) {
403 mGOTCoffEntries = (UINT32*)realloc(mGOTCoffEntries, 2 * mGOTMaxCoffEntries * sizeof *mGOTCoffEntries);
404 if (mGOTCoffEntries == NULL) {
405 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");
406 }
407 assert (mGOTCoffEntries != NULL);
408 mGOTMaxCoffEntries += mGOTMaxCoffEntries;
409 }
410 mGOTCoffEntries[mGOTNumCoffEntries++] = GOTCoffEntry;
411 return TRUE;
412 }
413
414 //
415 // 32-bit Unsigned integer comparator for qsort.
416 //
417 STATIC
418 int
419 UINT32Comparator (
420 const void* lhs,
421 const void* rhs
422 )
423 {
424 if (*(const UINT32*)lhs < *(const UINT32*)rhs) {
425 return -1;
426 }
427 return *(const UINT32*)lhs > *(const UINT32*)rhs;
428 }
429
430 //
431 // Emit accumulated Coff GOT entry relocations into
432 // Coff image. This function performs its job
433 // once and then releases the entry list, so
434 // it can safely be called multiple times.
435 //
436 STATIC
437 VOID
438 EmitGOTRelocations (
439 VOID
440 )
441 {
442 UINT32 i;
443 if (mGOTCoffEntries == NULL) {
444 return;
445 }
446 //
447 // Emit Coff relocations with Rvas ordered.
448 //
449 qsort(
450 mGOTCoffEntries,
451 mGOTNumCoffEntries,
452 sizeof *mGOTCoffEntries,
453 UINT32Comparator);
454 for (i = 0; i < mGOTNumCoffEntries; i++) {
455 VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X", mGOTCoffEntries[i]);
456 CoffAddFixup(
457 mGOTCoffEntries[i],
458 EFI_IMAGE_REL_BASED_DIR64);
459 }
460 free(mGOTCoffEntries);
461 mGOTCoffEntries = NULL;
462 mGOTMaxCoffEntries = 0;
463 mGOTNumCoffEntries = 0;
464 }
465 //
466 // RISC-V 64 specific Elf WriteSection function.
467 //
468 STATIC
469 VOID
470 WriteSectionRiscV64 (
471 Elf_Rela *Rel,
472 UINT8 *Targ,
473 Elf_Shdr *SymShdr,
474 Elf_Sym *Sym
475 )
476 {
477 UINT32 Value;
478 UINT32 Value2;
479 Elf64_Addr GOTEntryRva;
480
481 switch (ELF_R_TYPE(Rel->r_info)) {
482 case R_RISCV_NONE:
483 break;
484
485 case R_RISCV_32:
486 *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;
487 break;
488
489 case R_RISCV_64:
490 *(UINT64 *)Targ = Sym->st_value + Rel->r_addend;
491 break;
492
493 case R_RISCV_HI20:
494 mRiscVPass1Targ = Targ;
495 mRiscVPass1Sym = SymShdr;
496 mRiscVPass1SymSecIndex = Sym->st_shndx;
497 break;
498
499 case R_RISCV_LO12_I:
500 if (mRiscVPass1Sym == SymShdr && mRiscVPass1Targ != NULL && mRiscVPass1SymSecIndex == Sym->st_shndx && mRiscVPass1SymSecIndex != 0) {
501 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20) << 12);
502 Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
503 if (Value2 & (RISCV_IMM_REACH/2)) {
504 Value2 |= ~(RISCV_IMM_REACH-1);
505 }
506 Value += Value2;
507 Value = Value - (UINT32)SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
508 Value2 = RISCV_CONST_HIGH_PART (Value);
509 *(UINT32 *)mRiscVPass1Targ = (RV_X (Value2, 12, 20) << 12) | \
510 (RV_X (*(UINT32 *)mRiscVPass1Targ, 0, 12));
511 *(UINT32 *)Targ = (RV_X (Value, 0, 12) << 20) | \
512 (RV_X (*(UINT32 *)Targ, 0, 20));
513 }
514 mRiscVPass1Sym = NULL;
515 mRiscVPass1Targ = NULL;
516 mRiscVPass1SymSecIndex = 0;
517 break;
518
519 case R_RISCV_LO12_S:
520 if (mRiscVPass1Sym == SymShdr && mRiscVPass1Targ != NULL && mRiscVPass1SymSecIndex == Sym->st_shndx && mRiscVPass1SymSecIndex != 0) {
521 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20) << 12);
522 Value2 = (UINT32)(RV_X(*(UINT32 *)Targ, 7, 5) | (RV_X(*(UINT32 *)Targ, 25, 7) << 5));
523 if (Value2 & (RISCV_IMM_REACH/2)) {
524 Value2 |= ~(RISCV_IMM_REACH-1);
525 }
526 Value += Value2;
527 Value = Value - (UINT32)SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
528 Value2 = RISCV_CONST_HIGH_PART (Value);
529 *(UINT32 *)mRiscVPass1Targ = (RV_X (Value2, 12, 20) << 12) | \
530 (RV_X (*(UINT32 *)mRiscVPass1Targ, 0, 12));
531 Value2 = *(UINT32 *)Targ & 0x01fff07f;
532 Value &= RISCV_IMM_REACH - 1;
533 *(UINT32 *)Targ = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));
534 }
535 mRiscVPass1Sym = NULL;
536 mRiscVPass1Targ = NULL;
537 mRiscVPass1SymSecIndex = 0;
538 break;
539
540 case R_RISCV_GOT_HI20:
541 GOTEntryRva = (Sym->st_value - Rel->r_offset);
542 mRiscVPass1Offset = RV_X(GOTEntryRva, 0, 12);
543 Value = (UINT32)RV_X(GOTEntryRva, 12, 20);
544 *(UINT32 *)Targ = (Value << 12) | (RV_X(*(UINT32*)Targ, 0, 12));
545
546 mRiscVPass1Targ = Targ;
547 mRiscVPass1Sym = SymShdr;
548 mRiscVPass1SymSecIndex = Sym->st_shndx;
549 mRiscVPass1GotFixup = 1;
550 break;
551
552 case R_RISCV_PCREL_HI20:
553 mRiscVPass1Targ = Targ;
554 mRiscVPass1Sym = SymShdr;
555 mRiscVPass1SymSecIndex = Sym->st_shndx;
556
557 Value = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));
558 break;
559
560 case R_RISCV_PCREL_LO12_I:
561 if (mRiscVPass1Targ != NULL && mRiscVPass1Sym != NULL && mRiscVPass1SymSecIndex != 0) {
562 int i;
563 Value2 = (UINT32)(RV_X(*(UINT32 *)mRiscVPass1Targ, 12, 20));
564
565 if(mRiscVPass1GotFixup) {
566 Value = (UINT32)(mRiscVPass1Offset);
567 } else {
568 Value = (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12));
569 if(Value & (RISCV_IMM_REACH/2)) {
570 Value |= ~(RISCV_IMM_REACH-1);
571 }
572 }
573 Value = Value - (UINT32)mRiscVPass1Sym->sh_addr + mCoffSectionsOffset[mRiscVPass1SymSecIndex];
574
575 if(-2048 > (INT32)Value) {
576 i = (((INT32)Value * -1) / 4096);
577 Value2 -= i;
578 Value += 4096 * i;
579 if(-2048 > (INT32)Value) {
580 Value2 -= 1;
581 Value += 4096;
582 }
583 }
584 else if( 2047 < (INT32)Value) {
585 i = (Value / 4096);
586 Value2 += i;
587 Value -= 4096 * i;
588 if(2047 < (INT32)Value) {
589 Value2 += 1;
590 Value -= 4096;
591 }
592 }
593
594 if(mRiscVPass1GotFixup) {
595 *(UINT32 *)Targ = (RV_X((UINT32)Value, 0, 12) << 20)
596 | (RV_X(*(UINT32*)Targ, 0, 20));
597 // Convert LD instruction to ADDI
598 //
599 // |31 20|19 15|14 12|11 7|6 0|
600 // |-----------------------------------------|
601 // |imm[11:0] | rs1 | 011 | rd | 0000011 | LD
602 // -----------------------------------------
603
604 // |-----------------------------------------|
605 // |imm[11:0] | rs1 | 000 | rd | 0010011 | ADDI
606 // -----------------------------------------
607
608 // To convert, let's first reset bits 12-14 and 0-6 using ~0x707f
609 // Then modify the opcode to ADDI (0010011)
610 // All other fields will remain same.
611
612 *(UINT32 *)Targ = ((*(UINT32 *)Targ & ~0x707f) | 0x13);
613 } else {
614 *(UINT32 *)Targ = (RV_X(Value, 0, 12) << 20) | (RV_X(*(UINT32*)Targ, 0, 20));
615 }
616 *(UINT32 *)mRiscVPass1Targ = (RV_X(Value2, 0, 20)<<12) | (RV_X(*(UINT32 *)mRiscVPass1Targ, 0, 12));
617 }
618 mRiscVPass1Sym = NULL;
619 mRiscVPass1Targ = NULL;
620 mRiscVPass1SymSecIndex = 0;
621 mRiscVPass1Offset = 0;
622 mRiscVPass1GotFixup = 0;
623 break;
624
625 case R_RISCV_ADD64:
626 case R_RISCV_SUB64:
627 case R_RISCV_ADD32:
628 case R_RISCV_SUB32:
629 case R_RISCV_BRANCH:
630 case R_RISCV_JAL:
631 case R_RISCV_GPREL_I:
632 case R_RISCV_GPREL_S:
633 case R_RISCV_CALL:
634 case R_RISCV_CALL_PLT:
635 case R_RISCV_RVC_BRANCH:
636 case R_RISCV_RVC_JUMP:
637 case R_RISCV_RELAX:
638 case R_RISCV_SUB6:
639 case R_RISCV_SET6:
640 case R_RISCV_SET8:
641 case R_RISCV_SET16:
642 case R_RISCV_SET32:
643 break;
644
645 default:
646 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
647 }
648 }
649
650 //
651 // Elf functions interface implementation
652 //
653
654 STATIC
655 VOID
656 ScanSections64 (
657 VOID
658 )
659 {
660 UINT32 i;
661 EFI_IMAGE_DOS_HEADER *DosHdr;
662 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
663 UINT32 CoffEntry;
664 UINT32 SectionCount;
665 BOOLEAN FoundSection;
666
667 CoffEntry = 0;
668 mCoffOffset = 0;
669
670 //
671 // Coff file start with a DOS header.
672 //
673 mCoffOffset = sizeof(EFI_IMAGE_DOS_HEADER) + 0x40;
674 mNtHdrOffset = mCoffOffset;
675 switch (mEhdr->e_machine) {
676 case EM_X86_64:
677 case EM_AARCH64:
678 case EM_RISCV64:
679 mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
680 break;
681 default:
682 VerboseMsg ("%s unknown e_machine type %hu. Assume X64", mInImageName, mEhdr->e_machine);
683 mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);
684 break;
685 }
686
687 mTableOffset = mCoffOffset;
688 mCoffOffset += mCoffNbrSections * sizeof(EFI_IMAGE_SECTION_HEADER);
689
690 //
691 // Set mCoffAlignment to the maximum alignment of the input sections
692 // we care about
693 //
694 for (i = 0; i < mEhdr->e_shnum; i++) {
695 Elf_Shdr *shdr = GetShdrByIndex(i);
696 if (shdr->sh_addralign <= mCoffAlignment) {
697 continue;
698 }
699 if (IsTextShdr(shdr) || IsDataShdr(shdr) || IsHiiRsrcShdr(shdr)) {
700 mCoffAlignment = (UINT32)shdr->sh_addralign;
701 }
702 }
703
704 //
705 // Check if mCoffAlignment is larger than MAX_COFF_ALIGNMENT
706 //
707 if (mCoffAlignment > MAX_COFF_ALIGNMENT) {
708 Error (NULL, 0, 3000, "Invalid", "Section alignment is larger than MAX_COFF_ALIGNMENT.");
709 assert (FALSE);
710 }
711
712
713 //
714 // Move the PE/COFF header right before the first section. This will help us
715 // save space when converting to TE.
716 //
717 if (mCoffAlignment > mCoffOffset) {
718 mNtHdrOffset += mCoffAlignment - mCoffOffset;
719 mTableOffset += mCoffAlignment - mCoffOffset;
720 mCoffOffset = mCoffAlignment;
721 }
722
723 //
724 // First text sections.
725 //
726 mCoffOffset = CoffAlign(mCoffOffset);
727 mTextOffset = mCoffOffset;
728 FoundSection = FALSE;
729 SectionCount = 0;
730 for (i = 0; i < mEhdr->e_shnum; i++) {
731 Elf_Shdr *shdr = GetShdrByIndex(i);
732 if (IsTextShdr(shdr)) {
733 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
734 // the alignment field is valid
735 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
736 // if the section address is aligned we must align PE/COFF
737 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
738 } else {
739 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
740 }
741 }
742
743 /* Relocate entry. */
744 if ((mEhdr->e_entry >= shdr->sh_addr) &&
745 (mEhdr->e_entry < shdr->sh_addr + shdr->sh_size)) {
746 CoffEntry = (UINT32) (mCoffOffset + mEhdr->e_entry - shdr->sh_addr);
747 }
748
749 //
750 // Set mTextOffset with the offset of the first '.text' section
751 //
752 if (!FoundSection) {
753 mTextOffset = mCoffOffset;
754 FoundSection = TRUE;
755 }
756
757 mCoffSectionsOffset[i] = mCoffOffset;
758 mCoffOffset += (UINT32) shdr->sh_size;
759 SectionCount ++;
760 }
761 }
762
763 if (!FoundSection && mOutImageType != FW_ACPI_IMAGE) {
764 Error (NULL, 0, 3000, "Invalid", "Did not find any '.text' section.");
765 assert (FALSE);
766 }
767
768 mDebugOffset = DebugRvaAlign(mCoffOffset);
769 mCoffOffset = CoffAlign(mCoffOffset);
770
771 if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {
772 Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName);
773 }
774
775 //
776 // Then data sections.
777 //
778 mDataOffset = mCoffOffset;
779 FoundSection = FALSE;
780 SectionCount = 0;
781 for (i = 0; i < mEhdr->e_shnum; i++) {
782 Elf_Shdr *shdr = GetShdrByIndex(i);
783 if (IsDataShdr(shdr)) {
784 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
785 // the alignment field is valid
786 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
787 // if the section address is aligned we must align PE/COFF
788 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
789 } else {
790 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
791 }
792 }
793
794 //
795 // Set mDataOffset with the offset of the first '.data' section
796 //
797 if (!FoundSection) {
798 mDataOffset = mCoffOffset;
799 FoundSection = TRUE;
800 }
801 mCoffSectionsOffset[i] = mCoffOffset;
802 mCoffOffset += (UINT32) shdr->sh_size;
803 SectionCount ++;
804 }
805 }
806
807 //
808 // Make room for .debug data in .data (or .text if .data is empty) instead of
809 // putting it in a section of its own. This is explicitly allowed by the
810 // PE/COFF spec, and prevents bloat in the binary when using large values for
811 // section alignment.
812 //
813 if (SectionCount > 0) {
814 mDebugOffset = DebugRvaAlign(mCoffOffset);
815 }
816 mCoffOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY) +
817 sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) +
818 strlen(mInImageName) + 1;
819
820 mCoffOffset = CoffAlign(mCoffOffset);
821 if (SectionCount == 0) {
822 mDataOffset = mCoffOffset;
823 }
824
825 if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {
826 Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 data section. Source level debug might not work correctly.", mInImageName);
827 }
828
829 //
830 // The HII resource sections.
831 //
832 mHiiRsrcOffset = mCoffOffset;
833 for (i = 0; i < mEhdr->e_shnum; i++) {
834 Elf_Shdr *shdr = GetShdrByIndex(i);
835 if (IsHiiRsrcShdr(shdr)) {
836 if ((shdr->sh_addralign != 0) && (shdr->sh_addralign != 1)) {
837 // the alignment field is valid
838 if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
839 // if the section address is aligned we must align PE/COFF
840 mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
841 } else {
842 Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
843 }
844 }
845 if (shdr->sh_size != 0) {
846 mHiiRsrcOffset = mCoffOffset;
847 mCoffSectionsOffset[i] = mCoffOffset;
848 mCoffOffset += (UINT32) shdr->sh_size;
849 mCoffOffset = CoffAlign(mCoffOffset);
850 SetHiiResourceHeader ((UINT8*) mEhdr + shdr->sh_offset, mHiiRsrcOffset);
851 }
852 break;
853 }
854 }
855
856 mRelocOffset = mCoffOffset;
857
858 //
859 // Allocate base Coff file. Will be expanded later for relocations.
860 //
861 mCoffFile = (UINT8 *)malloc(mCoffOffset);
862 if (mCoffFile == NULL) {
863 Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");
864 }
865 assert (mCoffFile != NULL);
866 memset(mCoffFile, 0, mCoffOffset);
867
868 //
869 // Fill headers.
870 //
871 DosHdr = (EFI_IMAGE_DOS_HEADER *)mCoffFile;
872 DosHdr->e_magic = EFI_IMAGE_DOS_SIGNATURE;
873 DosHdr->e_lfanew = mNtHdrOffset;
874
875 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(mCoffFile + mNtHdrOffset);
876
877 NtHdr->Pe32Plus.Signature = EFI_IMAGE_NT_SIGNATURE;
878
879 switch (mEhdr->e_machine) {
880 case EM_X86_64:
881 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
882 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
883 break;
884 case EM_AARCH64:
885 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_AARCH64;
886 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
887 break;
888 case EM_RISCV64:
889 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_RISCV64;
890 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
891 break;
892
893 default:
894 VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);
895 NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
896 NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
897 }
898
899 NtHdr->Pe32Plus.FileHeader.NumberOfSections = mCoffNbrSections;
900 NtHdr->Pe32Plus.FileHeader.TimeDateStamp = (UINT32) time(NULL);
901 mImageTimeStamp = NtHdr->Pe32Plus.FileHeader.TimeDateStamp;
902 NtHdr->Pe32Plus.FileHeader.PointerToSymbolTable = 0;
903 NtHdr->Pe32Plus.FileHeader.NumberOfSymbols = 0;
904 NtHdr->Pe32Plus.FileHeader.SizeOfOptionalHeader = sizeof(NtHdr->Pe32Plus.OptionalHeader);
905 NtHdr->Pe32Plus.FileHeader.Characteristics = EFI_IMAGE_FILE_EXECUTABLE_IMAGE
906 | EFI_IMAGE_FILE_LINE_NUMS_STRIPPED
907 | EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED
908 | EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE;
909
910 NtHdr->Pe32Plus.OptionalHeader.SizeOfCode = mDataOffset - mTextOffset;
911 NtHdr->Pe32Plus.OptionalHeader.SizeOfInitializedData = mRelocOffset - mDataOffset;
912 NtHdr->Pe32Plus.OptionalHeader.SizeOfUninitializedData = 0;
913 NtHdr->Pe32Plus.OptionalHeader.AddressOfEntryPoint = CoffEntry;
914
915 NtHdr->Pe32Plus.OptionalHeader.BaseOfCode = mTextOffset;
916
917 NtHdr->Pe32Plus.OptionalHeader.ImageBase = 0;
918 NtHdr->Pe32Plus.OptionalHeader.SectionAlignment = mCoffAlignment;
919 NtHdr->Pe32Plus.OptionalHeader.FileAlignment = mCoffAlignment;
920 NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = 0;
921
922 NtHdr->Pe32Plus.OptionalHeader.SizeOfHeaders = mTextOffset;
923 NtHdr->Pe32Plus.OptionalHeader.NumberOfRvaAndSizes = EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES;
924
925 //
926 // Section headers.
927 //
928 if ((mDataOffset - mTextOffset) > 0) {
929 CreateSectionHeader (".text", mTextOffset, mDataOffset - mTextOffset,
930 EFI_IMAGE_SCN_CNT_CODE
931 | EFI_IMAGE_SCN_MEM_EXECUTE
932 | EFI_IMAGE_SCN_MEM_READ);
933 } else {
934 // Don't make a section of size 0.
935 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
936 }
937
938 if ((mHiiRsrcOffset - mDataOffset) > 0) {
939 CreateSectionHeader (".data", mDataOffset, mHiiRsrcOffset - mDataOffset,
940 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
941 | EFI_IMAGE_SCN_MEM_WRITE
942 | EFI_IMAGE_SCN_MEM_READ);
943 } else {
944 // Don't make a section of size 0.
945 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
946 }
947
948 if ((mRelocOffset - mHiiRsrcOffset) > 0) {
949 CreateSectionHeader (".rsrc", mHiiRsrcOffset, mRelocOffset - mHiiRsrcOffset,
950 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
951 | EFI_IMAGE_SCN_MEM_READ);
952
953 NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].Size = mRelocOffset - mHiiRsrcOffset;
954 NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE].VirtualAddress = mHiiRsrcOffset;
955 } else {
956 // Don't make a section of size 0.
957 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
958 }
959
960 }
961
962 STATIC
963 BOOLEAN
964 WriteSections64 (
965 SECTION_FILTER_TYPES FilterType
966 )
967 {
968 UINT32 Idx;
969 Elf_Shdr *SecShdr;
970 UINT32 SecOffset;
971 BOOLEAN (*Filter)(Elf_Shdr *);
972 Elf64_Addr GOTEntryRva;
973
974 //
975 // Initialize filter pointer
976 //
977 switch (FilterType) {
978 case SECTION_TEXT:
979 Filter = IsTextShdr;
980 break;
981 case SECTION_HII:
982 Filter = IsHiiRsrcShdr;
983 break;
984 case SECTION_DATA:
985 Filter = IsDataShdr;
986 break;
987 default:
988 return FALSE;
989 }
990
991 //
992 // First: copy sections.
993 //
994 for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
995 Elf_Shdr *Shdr = GetShdrByIndex(Idx);
996 if ((*Filter)(Shdr)) {
997 switch (Shdr->sh_type) {
998 case SHT_PROGBITS:
999 /* Copy. */
1000 if (Shdr->sh_offset + Shdr->sh_size > mFileBufferSize) {
1001 return FALSE;
1002 }
1003 memcpy(mCoffFile + mCoffSectionsOffset[Idx],
1004 (UINT8*)mEhdr + Shdr->sh_offset,
1005 (size_t) Shdr->sh_size);
1006 break;
1007
1008 case SHT_NOBITS:
1009 memset(mCoffFile + mCoffSectionsOffset[Idx], 0, (size_t) Shdr->sh_size);
1010 break;
1011
1012 default:
1013 //
1014 // Ignore for unknown section type.
1015 //
1016 VerboseMsg ("%s unknown section type %x. We ignore this unknown section type.", mInImageName, (unsigned)Shdr->sh_type);
1017 break;
1018 }
1019 }
1020 }
1021
1022 //
1023 // Second: apply relocations.
1024 //
1025 VerboseMsg ("Applying Relocations...");
1026 for (Idx = 0; Idx < mEhdr->e_shnum; Idx++) {
1027 //
1028 // Determine if this is a relocation section.
1029 //
1030 Elf_Shdr *RelShdr = GetShdrByIndex(Idx);
1031 if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
1032 continue;
1033 }
1034
1035 //
1036 // If this is a ET_DYN (PIE) executable, we will encounter a dynamic SHT_RELA
1037 // section that applies to the entire binary, and which will have its section
1038 // index set to #0 (which is a NULL section with the SHF_ALLOC bit cleared).
1039 //
1040 // In the absence of GOT based relocations,
1041 // this RELA section will contain redundant R_xxx_RELATIVE relocations, one
1042 // for every R_xxx_xx64 relocation appearing in the per-section RELA sections.
1043 // (i.e., .rela.text and .rela.data)
1044 //
1045 if (RelShdr->sh_info == 0) {
1046 continue;
1047 }
1048
1049 //
1050 // Relocation section found. Now extract section information that the relocations
1051 // apply to in the ELF data and the new COFF data.
1052 //
1053 SecShdr = GetShdrByIndex(RelShdr->sh_info);
1054 SecOffset = mCoffSectionsOffset[RelShdr->sh_info];
1055
1056 //
1057 // Only process relocations for the current filter type.
1058 //
1059 if (RelShdr->sh_type == SHT_RELA && (*Filter)(SecShdr)) {
1060 UINT64 RelIdx;
1061
1062 //
1063 // Determine the symbol table referenced by the relocation data.
1064 //
1065 Elf_Shdr *SymtabShdr = GetShdrByIndex(RelShdr->sh_link);
1066 UINT8 *Symtab = (UINT8*)mEhdr + SymtabShdr->sh_offset;
1067
1068 //
1069 // Process all relocation entries for this section.
1070 //
1071 for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += (UINT32) RelShdr->sh_entsize) {
1072
1073 //
1074 // Set pointer to relocation entry
1075 //
1076 Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
1077
1078 //
1079 // Set pointer to symbol table entry associated with the relocation entry.
1080 //
1081 Elf_Sym *Sym = (Elf_Sym *)(Symtab + ELF_R_SYM(Rel->r_info) * SymtabShdr->sh_entsize);
1082
1083 Elf_Shdr *SymShdr;
1084 UINT8 *Targ;
1085
1086 //
1087 // Check section header index found in symbol table and get the section
1088 // header location.
1089 //
1090 if (Sym->st_shndx == SHN_UNDEF
1091 || Sym->st_shndx >= mEhdr->e_shnum) {
1092 const UINT8 *SymName = GetSymName(Sym);
1093 if (SymName == NULL) {
1094 SymName = (const UINT8 *)"<unknown>";
1095 }
1096
1097 //
1098 // Skip error on EM_RISCV64 becasue no symble name is built
1099 // from RISC-V toolchain.
1100 //
1101 if (mEhdr->e_machine != EM_RISCV64) {
1102 Error (NULL, 0, 3000, "Invalid",
1103 "%s: Bad definition for symbol '%s'@%#llx or unsupported symbol type. "
1104 "For example, absolute and undefined symbols are not supported.",
1105 mInImageName, SymName, Sym->st_value);
1106
1107 exit(EXIT_FAILURE);
1108 }
1109 continue;
1110 }
1111 SymShdr = GetShdrByIndex(Sym->st_shndx);
1112
1113 //
1114 // Convert the relocation data to a pointer into the coff file.
1115 //
1116 // Note:
1117 // r_offset is the virtual address of the storage unit to be relocated.
1118 // sh_addr is the virtual address for the base of the section.
1119 //
1120 // r_offset in a memory address.
1121 // Convert it to a pointer in the coff file.
1122 //
1123 Targ = mCoffFile + SecOffset + (Rel->r_offset - SecShdr->sh_addr);
1124
1125 //
1126 // Determine how to handle each relocation type based on the machine type.
1127 //
1128 if (mEhdr->e_machine == EM_X86_64) {
1129 switch (ELF_R_TYPE(Rel->r_info)) {
1130 case R_X86_64_NONE:
1131 break;
1132 case R_X86_64_64:
1133 //
1134 // Absolute relocation.
1135 //
1136 VerboseMsg ("R_X86_64_64");
1137 VerboseMsg ("Offset: 0x%08X, Addend: 0x%016LX",
1138 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
1139 *(UINT64 *)Targ);
1140 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
1141 VerboseMsg ("Relocation: 0x%016LX", *(UINT64*)Targ);
1142 break;
1143 case R_X86_64_32:
1144 VerboseMsg ("R_X86_64_32");
1145 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
1146 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
1147 *(UINT32 *)Targ);
1148 *(UINT32 *)Targ = (UINT32)((UINT64)(*(UINT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
1149 VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);
1150 break;
1151 case R_X86_64_32S:
1152 VerboseMsg ("R_X86_64_32S");
1153 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
1154 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
1155 *(UINT32 *)Targ);
1156 *(INT32 *)Targ = (INT32)((INT64)(*(INT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
1157 VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ);
1158 break;
1159
1160 case R_X86_64_PLT32:
1161 //
1162 // Treat R_X86_64_PLT32 relocations as R_X86_64_PC32: this is
1163 // possible since we know all code symbol references resolve to
1164 // definitions in the same module (UEFI has no shared libraries),
1165 // and so there is never a reason to jump via a PLT entry,
1166 // allowing us to resolve the reference using the symbol directly.
1167 //
1168 VerboseMsg ("Treating R_X86_64_PLT32 as R_X86_64_PC32 ...");
1169 /* fall through */
1170 case R_X86_64_PC32:
1171 //
1172 // Relative relocation: Symbol - Ip + Addend
1173 //
1174 VerboseMsg ("R_X86_64_PC32");
1175 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
1176 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
1177 *(UINT32 *)Targ);
1178 *(UINT32 *)Targ = (UINT32) (*(UINT32 *)Targ
1179 + (mCoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr)
1180 - (SecOffset - SecShdr->sh_addr));
1181 VerboseMsg ("Relocation: 0x%08X", *(UINT32 *)Targ);
1182 break;
1183 case R_X86_64_GOTPCREL:
1184 case R_X86_64_GOTPCRELX:
1185 case R_X86_64_REX_GOTPCRELX:
1186 VerboseMsg ("R_X86_64_GOTPCREL family");
1187 VerboseMsg ("Offset: 0x%08X, Addend: 0x%08X",
1188 (UINT32)(SecOffset + (Rel->r_offset - SecShdr->sh_addr)),
1189 *(UINT32 *)Targ);
1190 GOTEntryRva = Rel->r_offset - Rel->r_addend + *(INT32 *)Targ;
1191 FindElfGOTSectionFromGOTEntryElfRva(GOTEntryRva);
1192 *(UINT32 *)Targ = (UINT32) (*(UINT32 *)Targ
1193 + (mCoffSectionsOffset[mGOTShindex] - mGOTShdr->sh_addr)
1194 - (SecOffset - SecShdr->sh_addr));
1195 VerboseMsg ("Relocation: 0x%08X", *(UINT32 *)Targ);
1196 GOTEntryRva += (mCoffSectionsOffset[mGOTShindex] - mGOTShdr->sh_addr); // ELF Rva -> COFF Rva
1197 if (AccumulateCoffGOTEntries((UINT32)GOTEntryRva)) {
1198 //
1199 // Relocate GOT entry if it's the first time we run into it
1200 //
1201 Targ = mCoffFile + GOTEntryRva;
1202 //
1203 // Limitation: The following three statements assume memory
1204 // at *Targ is valid because the section containing the GOT
1205 // has already been copied from the ELF image to the Coff image.
1206 // This pre-condition presently holds because the GOT is placed
1207 // in section .text, and the ELF text sections are all copied
1208 // prior to reaching this point.
1209 // If the pre-condition is violated in the future, this fixup
1210 // either needs to be deferred after the GOT section is copied
1211 // to the Coff image, or the fixup should be performed on the
1212 // source Elf image instead of the destination Coff image.
1213 //
1214 VerboseMsg ("Offset: 0x%08X, Addend: 0x%016LX",
1215 (UINT32)GOTEntryRva,
1216 *(UINT64 *)Targ);
1217 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
1218 VerboseMsg ("Relocation: 0x%016LX", *(UINT64*)Targ);
1219 }
1220 break;
1221 default:
1222 Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
1223 }
1224 } else if (mEhdr->e_machine == EM_AARCH64) {
1225
1226 switch (ELF_R_TYPE(Rel->r_info)) {
1227 INT64 Offset;
1228
1229 case R_AARCH64_LD64_GOT_LO12_NC:
1230 //
1231 // Convert into an ADD instruction - see R_AARCH64_ADR_GOT_PAGE below.
1232 //
1233 *(UINT32 *)Targ &= 0x3ff;
1234 *(UINT32 *)Targ |= 0x91000000 | ((Sym->st_value & 0xfff) << 10);
1235 break;
1236
1237 case R_AARCH64_ADR_GOT_PAGE:
1238 //
1239 // This relocation points to the GOT entry that contains the absolute
1240 // address of the symbol we are referring to. Since EDK2 only uses
1241 // fully linked binaries, we can avoid the indirection, and simply
1242 // refer to the symbol directly. This implies having to patch the
1243 // subsequent LDR instruction (covered by a R_AARCH64_LD64_GOT_LO12_NC
1244 // relocation) into an ADD instruction - this is handled above.
1245 //
1246 Offset = (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12;
1247
1248 *(UINT32 *)Targ &= 0x9000001f;
1249 *(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29);
1250
1251 /* fall through */
1252
1253 case R_AARCH64_ADR_PREL_PG_HI21:
1254 //
1255 // In order to handle Cortex-A53 erratum #843419, the LD linker may
1256 // convert ADRP instructions into ADR instructions, but without
1257 // updating the static relocation type, and so we may end up here
1258 // while the instruction in question is actually ADR. So let's
1259 // just disregard it: the section offset check we apply below to
1260 // ADR instructions will trigger for its R_AARCH64_xxx_ABS_LO12_NC
1261 // companion instruction as well, so it is safe to omit it here.
1262 //
1263 if ((*(UINT32 *)Targ & BIT31) == 0) {
1264 break;
1265 }
1266
1267 //
1268 // AArch64 PG_H21 relocations are typically paired with ABS_LO12
1269 // relocations, where a PC-relative reference with +/- 4 GB range is
1270 // split into a relative high part and an absolute low part. Since
1271 // the absolute low part represents the offset into a 4 KB page, we
1272 // either have to convert the ADRP into an ADR instruction, or we
1273 // need to use a section alignment of at least 4 KB, so that the
1274 // binary appears at a correct offset at runtime. In any case, we
1275 // have to make sure that the 4 KB relative offsets of both the
1276 // section containing the reference as well as the section to which
1277 // it refers have not been changed during PE/COFF conversion (i.e.,
1278 // in ScanSections64() above).
1279 //
1280 if (mCoffAlignment < 0x1000) {
1281 //
1282 // Attempt to convert the ADRP into an ADR instruction.
1283 // This is only possible if the symbol is within +/- 1 MB.
1284 //
1285
1286 // Decode the ADRP instruction
1287 Offset = (INT32)((*(UINT32 *)Targ & 0xffffe0) << 8);
1288 Offset = (Offset << (6 - 5)) | ((*(UINT32 *)Targ & 0x60000000) >> (29 - 12));
1289
1290 //
1291 // ADRP offset is relative to the previous page boundary,
1292 // whereas ADR offset is relative to the instruction itself.
1293 // So fix up the offset so it points to the page containing
1294 // the symbol.
1295 //
1296 Offset -= (UINTN)(Targ - mCoffFile) & 0xfff;
1297
1298 if (Offset < -0x100000 || Offset > 0xfffff) {
1299 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s due to its size (> 1 MB), this module requires 4 KB section alignment.",
1300 mInImageName);
1301 break;
1302 }
1303
1304 // Re-encode the offset as an ADR instruction
1305 *(UINT32 *)Targ &= 0x1000001f;
1306 *(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29);
1307 }
1308 /* fall through */
1309
1310 case R_AARCH64_ADD_ABS_LO12_NC:
1311 case R_AARCH64_LDST8_ABS_LO12_NC:
1312 case R_AARCH64_LDST16_ABS_LO12_NC:
1313 case R_AARCH64_LDST32_ABS_LO12_NC:
1314 case R_AARCH64_LDST64_ABS_LO12_NC:
1315 case R_AARCH64_LDST128_ABS_LO12_NC:
1316 if (((SecShdr->sh_addr ^ SecOffset) & 0xfff) != 0 ||
1317 ((SymShdr->sh_addr ^ mCoffSectionsOffset[Sym->st_shndx]) & 0xfff) != 0) {
1318 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s AARCH64 small code model requires identical ELF and PE/COFF section offsets modulo 4 KB.",
1319 mInImageName);
1320 break;
1321 }
1322 /* fall through */
1323
1324 case R_AARCH64_ADR_PREL_LO21:
1325 case R_AARCH64_CONDBR19:
1326 case R_AARCH64_LD_PREL_LO19:
1327 case R_AARCH64_CALL26:
1328 case R_AARCH64_JUMP26:
1329 case R_AARCH64_PREL64:
1330 case R_AARCH64_PREL32:
1331 case R_AARCH64_PREL16:
1332 //
1333 // The GCC toolchains (i.e., binutils) may corrupt section relative
1334 // relocations when emitting relocation sections into fully linked
1335 // binaries. More specifically, they tend to fail to take into
1336 // account the fact that a '.rodata + XXX' relocation needs to have
1337 // its addend recalculated once .rodata is merged into the .text
1338 // section, and the relocation emitted into the .rela.text section.
1339 //
1340 // We cannot really recover from this loss of information, so the
1341 // only workaround is to prevent having to recalculate any relative
1342 // relocations at all, by using a linker script that ensures that
1343 // the offset between the Place and the Symbol is the same in both
1344 // the ELF and the PE/COFF versions of the binary.
1345 //
1346 if ((SymShdr->sh_addr - SecShdr->sh_addr) !=
1347 (mCoffSectionsOffset[Sym->st_shndx] - SecOffset)) {
1348 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s AARCH64 relative relocations require identical ELF and PE/COFF section offsets",
1349 mInImageName);
1350 }
1351 break;
1352
1353 // Absolute relocations.
1354 case R_AARCH64_ABS64:
1355 *(UINT64 *)Targ = *(UINT64 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
1356 break;
1357
1358 default:
1359 Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
1360 }
1361 } else if (mEhdr->e_machine == EM_RISCV64) {
1362 //
1363 // Write section for RISC-V 64 architecture.
1364 //
1365 WriteSectionRiscV64 (Rel, Targ, SymShdr, Sym);
1366 } else {
1367 Error (NULL, 0, 3000, "Invalid", "Not a supported machine type");
1368 }
1369 }
1370 }
1371 }
1372
1373 return TRUE;
1374 }
1375
1376 STATIC
1377 VOID
1378 WriteRelocations64 (
1379 VOID
1380 )
1381 {
1382 UINT32 Index;
1383 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
1384 EFI_IMAGE_DATA_DIRECTORY *Dir;
1385 UINT32 RiscVRelType;
1386
1387 for (Index = 0; Index < mEhdr->e_shnum; Index++) {
1388 Elf_Shdr *RelShdr = GetShdrByIndex(Index);
1389 if ((RelShdr->sh_type == SHT_REL) || (RelShdr->sh_type == SHT_RELA)) {
1390 Elf_Shdr *SecShdr = GetShdrByIndex (RelShdr->sh_info);
1391 if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {
1392 UINT64 RelIdx;
1393
1394 for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
1395 Elf_Rela *Rel = (Elf_Rela *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
1396
1397 if (mEhdr->e_machine == EM_X86_64) {
1398 switch (ELF_R_TYPE(Rel->r_info)) {
1399 case R_X86_64_NONE:
1400 case R_X86_64_PC32:
1401 case R_X86_64_PLT32:
1402 case R_X86_64_GOTPCREL:
1403 case R_X86_64_GOTPCRELX:
1404 case R_X86_64_REX_GOTPCRELX:
1405 break;
1406 case R_X86_64_64:
1407 VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X",
1408 mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
1409 CoffAddFixup(
1410 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1411 + (Rel->r_offset - SecShdr->sh_addr)),
1412 EFI_IMAGE_REL_BASED_DIR64);
1413 break;
1414 //
1415 // R_X86_64_32 and R_X86_64_32S are ELF64 relocations emitted when using
1416 // the SYSV X64 ABI small non-position-independent code model.
1417 // R_X86_64_32 is used for unsigned 32-bit immediates with a 32-bit operand
1418 // size. The value is either not extended, or zero-extended to 64 bits.
1419 // R_X86_64_32S is used for either signed 32-bit non-rip-relative displacements
1420 // or signed 32-bit immediates with a 64-bit operand size. The value is
1421 // sign-extended to 64 bits.
1422 // EFI_IMAGE_REL_BASED_HIGHLOW is a PE relocation that uses 32-bit arithmetic
1423 // for rebasing an image.
1424 // EFI PE binaries declare themselves EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE and
1425 // may load above 2GB. If an EFI PE binary with a converted R_X86_64_32S
1426 // relocation is loaded above 2GB, the value will get sign-extended to the
1427 // negative part of the 64-bit address space. The negative part of the 64-bit
1428 // address space is unmapped, so accessing such an address page-faults.
1429 // In order to support R_X86_64_32S, it is necessary to unset
1430 // EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE, and the EFI PE loader must implement
1431 // this flag and abstain from loading such a PE binary above 2GB.
1432 // Since this feature is not supported, support for R_X86_64_32S (and hence
1433 // the small non-position-independent code model) is disabled.
1434 //
1435 // case R_X86_64_32S:
1436 case R_X86_64_32:
1437 VerboseMsg ("EFI_IMAGE_REL_BASED_HIGHLOW Offset: 0x%08X",
1438 mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
1439 CoffAddFixup(
1440 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1441 + (Rel->r_offset - SecShdr->sh_addr)),
1442 EFI_IMAGE_REL_BASED_HIGHLOW);
1443 break;
1444 default:
1445 Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_X86_64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
1446 }
1447 } else if (mEhdr->e_machine == EM_AARCH64) {
1448
1449 switch (ELF_R_TYPE(Rel->r_info)) {
1450 case R_AARCH64_ADR_PREL_LO21:
1451 case R_AARCH64_CONDBR19:
1452 case R_AARCH64_LD_PREL_LO19:
1453 case R_AARCH64_CALL26:
1454 case R_AARCH64_JUMP26:
1455 case R_AARCH64_PREL64:
1456 case R_AARCH64_PREL32:
1457 case R_AARCH64_PREL16:
1458 case R_AARCH64_ADR_PREL_PG_HI21:
1459 case R_AARCH64_ADD_ABS_LO12_NC:
1460 case R_AARCH64_LDST8_ABS_LO12_NC:
1461 case R_AARCH64_LDST16_ABS_LO12_NC:
1462 case R_AARCH64_LDST32_ABS_LO12_NC:
1463 case R_AARCH64_LDST64_ABS_LO12_NC:
1464 case R_AARCH64_LDST128_ABS_LO12_NC:
1465 case R_AARCH64_ADR_GOT_PAGE:
1466 case R_AARCH64_LD64_GOT_LO12_NC:
1467 //
1468 // No fixups are required for relative relocations, provided that
1469 // the relative offsets between sections have been preserved in
1470 // the ELF to PE/COFF conversion. We have already asserted that
1471 // this is the case in WriteSections64 ().
1472 //
1473 break;
1474
1475 case R_AARCH64_ABS64:
1476 CoffAddFixup(
1477 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1478 + (Rel->r_offset - SecShdr->sh_addr)),
1479 EFI_IMAGE_REL_BASED_DIR64);
1480 break;
1481
1482 case R_AARCH64_ABS32:
1483 CoffAddFixup(
1484 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1485 + (Rel->r_offset - SecShdr->sh_addr)),
1486 EFI_IMAGE_REL_BASED_HIGHLOW);
1487 break;
1488
1489 default:
1490 Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
1491 }
1492 } else if (mEhdr->e_machine == EM_RISCV64) {
1493 RiscVRelType = ELF_R_TYPE(Rel->r_info);
1494 switch (RiscVRelType) {
1495 case R_RISCV_NONE:
1496 break;
1497
1498 case R_RISCV_32:
1499 CoffAddFixup(
1500 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1501 + (Rel->r_offset - SecShdr->sh_addr)),
1502 EFI_IMAGE_REL_BASED_HIGHLOW);
1503 break;
1504
1505 case R_RISCV_64:
1506 CoffAddFixup(
1507 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1508 + (Rel->r_offset - SecShdr->sh_addr)),
1509 EFI_IMAGE_REL_BASED_DIR64);
1510 break;
1511
1512 case R_RISCV_HI20:
1513 CoffAddFixup(
1514 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1515 + (Rel->r_offset - SecShdr->sh_addr)),
1516 EFI_IMAGE_REL_BASED_RISCV_HI20);
1517 break;
1518
1519 case R_RISCV_LO12_I:
1520 CoffAddFixup(
1521 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1522 + (Rel->r_offset - SecShdr->sh_addr)),
1523 EFI_IMAGE_REL_BASED_RISCV_LOW12I);
1524 break;
1525
1526 case R_RISCV_LO12_S:
1527 CoffAddFixup(
1528 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1529 + (Rel->r_offset - SecShdr->sh_addr)),
1530 EFI_IMAGE_REL_BASED_RISCV_LOW12S);
1531 break;
1532
1533 case R_RISCV_ADD64:
1534 CoffAddFixup(
1535 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1536 + (Rel->r_offset - SecShdr->sh_addr)),
1537 EFI_IMAGE_REL_BASED_ABSOLUTE);
1538 break;
1539
1540 case R_RISCV_SUB64:
1541 CoffAddFixup(
1542 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1543 + (Rel->r_offset - SecShdr->sh_addr)),
1544 EFI_IMAGE_REL_BASED_ABSOLUTE);
1545 break;
1546
1547 case R_RISCV_ADD32:
1548 CoffAddFixup(
1549 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1550 + (Rel->r_offset - SecShdr->sh_addr)),
1551 EFI_IMAGE_REL_BASED_ABSOLUTE);
1552 break;
1553
1554 case R_RISCV_SUB32:
1555 CoffAddFixup(
1556 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1557 + (Rel->r_offset - SecShdr->sh_addr)),
1558 EFI_IMAGE_REL_BASED_ABSOLUTE);
1559 break;
1560
1561 case R_RISCV_BRANCH:
1562 CoffAddFixup(
1563 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1564 + (Rel->r_offset - SecShdr->sh_addr)),
1565 EFI_IMAGE_REL_BASED_ABSOLUTE);
1566 break;
1567
1568 case R_RISCV_JAL:
1569 CoffAddFixup(
1570 (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
1571 + (Rel->r_offset - SecShdr->sh_addr)),
1572 EFI_IMAGE_REL_BASED_ABSOLUTE);
1573 break;
1574
1575 case R_RISCV_GPREL_I:
1576 case R_RISCV_GPREL_S:
1577 case R_RISCV_CALL:
1578 case R_RISCV_CALL_PLT:
1579 case R_RISCV_RVC_BRANCH:
1580 case R_RISCV_RVC_JUMP:
1581 case R_RISCV_RELAX:
1582 case R_RISCV_SUB6:
1583 case R_RISCV_SET6:
1584 case R_RISCV_SET8:
1585 case R_RISCV_SET16:
1586 case R_RISCV_SET32:
1587 case R_RISCV_PCREL_HI20:
1588 case R_RISCV_GOT_HI20:
1589 case R_RISCV_PCREL_LO12_I:
1590 break;
1591
1592 default:
1593 Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s unsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
1594 }
1595 } else {
1596 Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
1597 }
1598 }
1599 if (mEhdr->e_machine == EM_X86_64 && RelShdr->sh_info == mGOTShindex) {
1600 //
1601 // Tack relocations for GOT entries after other relocations for
1602 // the section the GOT is in, as it's usually found at the end
1603 // of the section. This is done in order to maintain Rva order
1604 // of Coff relocations.
1605 //
1606 EmitGOTRelocations();
1607 }
1608 }
1609 }
1610 }
1611
1612 if (mEhdr->e_machine == EM_X86_64) {
1613 //
1614 // This is a safety net just in case the GOT is in a section
1615 // with no other relocations and the first invocation of
1616 // EmitGOTRelocations() above was skipped. This invocation
1617 // does not maintain Rva order of Coff relocations.
1618 // At present, with a single text section, all references to
1619 // the GOT and the GOT itself reside in section .text, so
1620 // if there's a GOT at all, the first invocation above
1621 // is executed.
1622 //
1623 EmitGOTRelocations();
1624 }
1625 //
1626 // Pad by adding empty entries.
1627 //
1628 while (mCoffOffset & (mCoffAlignment - 1)) {
1629 CoffAddFixupEntry(0);
1630 }
1631
1632 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
1633 Dir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC];
1634 Dir->Size = mCoffOffset - mRelocOffset;
1635 if (Dir->Size == 0) {
1636 // If no relocations, null out the directory entry and don't add the .reloc section
1637 Dir->VirtualAddress = 0;
1638 NtHdr->Pe32Plus.FileHeader.NumberOfSections--;
1639 } else {
1640 Dir->VirtualAddress = mRelocOffset;
1641 CreateSectionHeader (".reloc", mRelocOffset, mCoffOffset - mRelocOffset,
1642 EFI_IMAGE_SCN_CNT_INITIALIZED_DATA
1643 | EFI_IMAGE_SCN_MEM_DISCARDABLE
1644 | EFI_IMAGE_SCN_MEM_READ);
1645 }
1646 }
1647
1648 STATIC
1649 VOID
1650 WriteDebug64 (
1651 VOID
1652 )
1653 {
1654 UINT32 Len;
1655 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
1656 EFI_IMAGE_DATA_DIRECTORY *DataDir;
1657 EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *Dir;
1658 EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY *Nb10;
1659
1660 Len = strlen(mInImageName) + 1;
1661
1662 Dir = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(mCoffFile + mDebugOffset);
1663 Dir->Type = EFI_IMAGE_DEBUG_TYPE_CODEVIEW;
1664 Dir->SizeOfData = sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) + Len;
1665 Dir->RVA = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
1666 Dir->FileOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
1667
1668 Nb10 = (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY*)(Dir + 1);
1669 Nb10->Signature = CODEVIEW_SIGNATURE_NB10;
1670 strcpy ((char *)(Nb10 + 1), mInImageName);
1671
1672
1673 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
1674 DataDir = &NtHdr->Pe32Plus.OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG];
1675 DataDir->VirtualAddress = mDebugOffset;
1676 DataDir->Size = sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY);
1677 }
1678
1679 STATIC
1680 VOID
1681 SetImageSize64 (
1682 VOID
1683 )
1684 {
1685 EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
1686
1687 //
1688 // Set image size
1689 //
1690 NtHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(mCoffFile + mNtHdrOffset);
1691 NtHdr->Pe32Plus.OptionalHeader.SizeOfImage = mCoffOffset;
1692 }
1693
1694 STATIC
1695 VOID
1696 CleanUp64 (
1697 VOID
1698 )
1699 {
1700 if (mCoffSectionsOffset != NULL) {
1701 free (mCoffSectionsOffset);
1702 }
1703 }
1704
1705