BeagleBoardPkg/PrePi/PrePi.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2017, ARM Limited. All rights reserved.
   4 *  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 **/
   9
  10 #include <PiPei.h>
  11
  12 #include <Library/DebugAgentLib.h>
  13 #include <Library/PrePiLib.h>
  14 #include <Library/PrintLib.h>
  15 #include <Library/PeCoffGetEntryPointLib.h>
  16 #include <Library/PrePiHobListPointerLib.h>
  17 #include <Library/TimerLib.h>
  18 #include <Library/PerformanceLib.h>
  19
  20 #include <Ppi/GuidedSectionExtraction.h>
  21 #include <Ppi/ArmMpCoreInfo.h>
  22 #include <Ppi/SecPerformance.h>
  23 #include <Guid/LzmaDecompress.h>
  24
  25 #include "PrePi.h"
  26 #include "LzmaDecompress.h"
  27
  28 #define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \
  29                   ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))
  30
  31 UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +
  32                           FixedPcdGet64(PcdSystemMemorySize) - 1;
  33
  34 EFI_STATUS
  35 GetPlatformPpi (
  36   IN  EFI_GUID  *PpiGuid,
  37   OUT VOID      **Ppi
  38   )
  39 {
  40   UINTN                   PpiListSize;
  41   UINTN                   PpiListCount;
  42   EFI_PEI_PPI_DESCRIPTOR  *PpiList;
  43   UINTN                   Index;
  44
  45   PpiListSize = 0;
  46   ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
  47   PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);
  48   for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
  49     if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
  50       *Ppi = PpiList->Ppi;
  51       return EFI_SUCCESS;
  52     }
  53   }
  54
  55   return EFI_NOT_FOUND;
  56 }
  57
  58 VOID
  59 PrePiMain (
  60   IN  UINTN                     UefiMemoryBase,
  61   IN  UINTN                     StacksBase,
  62   IN  UINT64                    StartTimeStamp
  63   )
  64 {
  65   EFI_HOB_HANDOFF_INFO_TABLE*   HobList;
  66   EFI_STATUS                    Status;
  67   CHAR8                         Buffer[100];
  68   UINTN                         CharCount;
  69   UINTN                         StacksSize;
  70   FIRMWARE_SEC_PERFORMANCE      Performance;
  71
  72   // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
  73   ASSERT (IS_XIP() ||
  74           ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
  75            ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));
  76
  77   // Initialize the architecture specific bits
  78   ArchInitialize ();
  79
  80   // Initialize the Serial Port
  81   SerialPortInitialize ();
  82   CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",
  83     (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
  84   SerialPortWrite ((UINT8 *) Buffer, CharCount);
  85
  86   // Initialize the Debug Agent for Source Level Debugging
  87   InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
  88   SaveAndSetDebugTimerInterrupt (TRUE);
  89
  90   // Declare the PI/UEFI memory region
  91   HobList = HobConstructor (
  92     (VOID*)UefiMemoryBase,
  93     FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
  94     (VOID*)UefiMemoryBase,
  95     (VOID*)StacksBase  // The top of the UEFI Memory is reserved for the stacks
  96     );
  97   PrePeiSetHobList (HobList);
  98
  99   // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
 100   Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
 101   ASSERT_EFI_ERROR (Status);
 102
 103   StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
 104   BuildStackHob (StacksBase, StacksSize);
 105
 106   //TODO: Call CpuPei as a library
 107   BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
 108
 109   // Store timer value logged at the beginning of firmware image execution
 110   Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);
 111
 112   // Build SEC Performance Data Hob
 113   BuildGuidDataHob (&gEfiFirmwarePerformanceGuid, &Performance, sizeof (Performance));
 114
 115   // Set the Boot Mode
 116   SetBootMode (ArmPlatformGetBootMode ());
 117
 118   // Initialize Platform HOBs (CpuHob and FvHob)
 119   Status = PlatformPeim ();
 120   ASSERT_EFI_ERROR (Status);
 121
 122   // Now, the HOB List has been initialized, we can register performance information
 123   PERF_START (NULL, "PEI", NULL, StartTimeStamp);
 124
 125   // SEC phase needs to run library constructors by hand.
 126   ProcessLibraryConstructorList ();
 127
 128   // Build HOBs to pass up our version of stuff the DXE Core needs to save space
 129   BuildPeCoffLoaderHob ();
 130   BuildExtractSectionHob (
 131     &gLzmaCustomDecompressGuid,
 132     LzmaGuidedSectionGetInfo,
 133     LzmaGuidedSectionExtraction
 134     );
 135
 136   // Assume the FV that contains the SEC (our code) also contains a compressed FV.
 137   Status = DecompressFirstFv ();
 138   ASSERT_EFI_ERROR (Status);
 139
 140   // Load the DXE Core and transfer control to it
 141   Status = LoadDxeCoreFromFv (NULL, 0);
 142   ASSERT_EFI_ERROR (Status);
 143 }
 144
 145 VOID
 146 CEntryPoint (
 147   IN  UINTN                     MpId,
 148   IN  UINTN                     UefiMemoryBase,
 149   IN  UINTN                     StacksBase
 150   )
 151 {
 152   UINT64   StartTimeStamp;
 153
 154   // Initialize the platform specific controllers
 155   ArmPlatformInitialize (MpId);
 156
 157   if (PerformanceMeasurementEnabled ()) {
 158     // Initialize the Timer Library to setup the Timer HW controller
 159     TimerConstructor ();
 160     // We cannot call yet the PerformanceLib because the HOB List has not been initialized
 161     StartTimeStamp = GetPerformanceCounter ();
 162   } else {
 163     StartTimeStamp = 0;
 164   }
 165
 166   // Data Cache enabled on Primary core when MMU is enabled.
 167   ArmDisableDataCache ();
 168   // Invalidate Data cache
 169   ArmInvalidateDataCache ();
 170   // Invalidate instruction cache
 171   ArmInvalidateInstructionCache ();
 172   // Enable Instruction Caches on all cores.
 173   ArmEnableInstructionCache ();
 174
 175   PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 176
 177   // DXE Core should always load and never return
 178   ASSERT (FALSE);
 179 }