Updated to support passing PE/COFF and LZMA decompress up via HOBS. Currently turned...
[mirror_edk2.git] / BeagleBoardPkg / Sec / Sec.c
1 /** @file
2 C Entry point for the SEC. First C code after the reset vector.
3
4 Copyright (c) 2008-2009, Apple Inc. All rights reserved.
5
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #include <PiPei.h>
17
18 #include <Library/DebugLib.h>
19 #include <Library/PrePiLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/IoLib.h>
22 #include <Library/OmapLib.h>
23 #include <Library/ArmLib.h>
24 #include <Library/PeCoffGetEntryPointLib.h>
25
26 #include <Ppi/GuidedSectionExtraction.h>
27 #include <Guid/LzmaDecompress.h>
28 #include <Omap3530/Omap3530.h>
29
30 #include "LzmaDecompress.h"
31
32 VOID
33 EFIAPI
34 _ModuleEntryPoint(
35 VOID
36 );
37
38 CHAR8 *
39 DeCygwinPathIfNeeded (
40 IN CHAR8 *Name
41 );
42
43 VOID
44 PadConfiguration (
45 VOID
46 );
47
48 VOID
49 ClockInit (
50 VOID
51 );
52
53 VOID
54 TimerInit (
55 VOID
56 )
57 {
58 UINTN Timer = FixedPcdGet32(PcdBeagleFreeTimer);
59 UINT32 TimerBaseAddress = TimerBase(Timer);
60
61 // Set source clock for GPT3 & GPT4 to SYS_CLK
62 MmioOr32(CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS
63 | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
64
65 // Set count & reload registers
66 MmioWrite32(TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
67 MmioWrite32(TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
68
69 // Disable interrupts
70 MmioWrite32(TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
71
72 // Start Timer
73 MmioWrite32(TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
74
75 //Disable OMAP Watchdog timer (WDT2)
76 MmioWrite32(WDTIMER2_BASE + WSPR, 0xAAAA);
77 DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
78 MmioWrite32(WDTIMER2_BASE + WSPR, 0x5555);
79 }
80
81 VOID
82 UartInit (
83 VOID
84 )
85 {
86 UINTN Uart = FixedPcdGet32(PcdBeagleConsoleUart);
87 UINT32 UartBaseAddress = UartBase(Uart);
88
89 // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
90 MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);
91
92 // Put device in configuration mode.
93 MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);
94
95 // Programmable divisor N = 48Mhz/16/115200 = 26
96 MmioWrite32(UartBaseAddress + UART_DLL_REG, 26); // low divisor
97 MmioWrite32(UartBaseAddress + UART_DLH_REG, 0); // high divisor
98
99 // Enter into UART operational mode.
100 MmioWrite32(UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);
101
102 // Force DTR and RTS output to active
103 MmioWrite32(UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);
104
105 // Clear & enable fifos
106 MmioWrite32(UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE);
107
108 // Restore MODE_SELECT
109 MmioWrite32(UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);
110 }
111
112 VOID
113 InitCache (
114 IN UINT32 MemoryBase,
115 IN UINT32 MemoryLength
116 );
117
118 EFI_STATUS
119 EFIAPI
120 ExtractGuidedSectionLibConstructor (
121 VOID
122 );
123
124 EFI_STATUS
125 EFIAPI
126 LzmaDecompressLibConstructor (
127 VOID
128 );
129
130 /**
131 If the build is done on cygwin the paths are cygpaths.
132 /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
133 them to work with RVD commands
134
135 This is just code to help print out RVD symbol load command.
136 If you build with cygwin paths aren't compatible with RVD.
137
138 @param Name Path to convert if needed
139
140 **/
141 CHAR8 *
142 SecDeCygwinPathIfNeeded (
143 IN CHAR8 *Name
144 )
145 {
146 CHAR8 *Ptr;
147 UINTN Index;
148 UINTN Len;
149
150 Ptr = AsciiStrStr (Name, "/cygdrive/");
151 if (Ptr == NULL) {
152 return Name;
153 }
154
155 Len = AsciiStrLen (Ptr);
156
157 // convert "/cygdrive" to spaces
158 for (Index = 0; Index < 9; Index++) {
159 Ptr[Index] = ' ';
160 }
161
162 // convert /c to c:
163 Ptr[9] = Ptr[10];
164 Ptr[10] = ':';
165
166 // switch path seperators
167 for (Index = 11; Index < Len; Index++) {
168 if (Ptr[Index] == '/') {
169 Ptr[Index] = '\\' ;
170 }
171 }
172
173 return Name;
174 }
175
176
177 VOID
178 CEntryPoint (
179 IN VOID *MemoryBase,
180 IN UINTN MemorySize,
181 IN VOID *StackBase,
182 IN UINTN StackSize
183 )
184 {
185 VOID *HobBase;
186
187 //Set up Pin muxing.
188 PadConfiguration();
189
190 // Set up system clocking
191 ClockInit();
192
193 // Build a basic HOB list
194 HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
195 CreateHobList(MemoryBase, MemorySize, HobBase, StackBase);
196
197 // Enable program flow prediction, if supported.
198 ArmEnableBranchPrediction();
199
200 // Initialize CPU cache
201 InitCache((UINT32)MemoryBase, (UINT32)MemorySize);
202
203 // Add memory allocation hob for relocated FD
204 BuildMemoryAllocationHob(FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
205
206 // Add the FVs to the hob list
207 BuildFvHob(PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
208
209 // Start talking
210 UartInit();
211 DEBUG((EFI_D_ERROR, "UART Enabled\n"));
212
213 DEBUG_CODE_BEGIN ();
214 //
215 // On a debug build print out information about the SEC. This is really info about
216 // the PE/COFF file we are currently running from. Useful for loading symbols in a
217 // debugger. Remember our image is really part of the FV.
218 //
219 RETURN_STATUS Status;
220 EFI_PEI_FV_HANDLE VolumeHandle;
221 EFI_PEI_FILE_HANDLE FileHandle;
222 VOID *PeCoffImage;
223 UINT32 Offset;
224 CHAR8 *FilePath;
225
226 FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);
227 Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);
228 if (EFI_ERROR (Status)) {
229 // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF
230 Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);
231 }
232 if (!EFI_ERROR (Status)) {
233 Offset = PeCoffGetSizeOfHeaders (PeCoffImage);
234 FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);
235 if (FilePath != NULL) {
236
237 //
238 // In general you should never have to use #ifdef __CC_ARM in the code. It
239 // is hidden in the away in the MdePkg. But here we would like to print differnt things
240 // for different toolchains.
241 //
242 #ifdef __CC_ARM
243 // Print out the command for the RVD debugger to load symbols for this image
244 DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));
245 #elif __GNUC__
246 // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required
247 DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));
248 #else
249 DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));
250 #endif
251 }
252 }
253
254 DEBUG_CODE_END ();
255
256
257
258 // Start up a free running time so that the timer lib will work
259 TimerInit();
260
261 // SEC phase needs to run library constructors by hand.
262 ExtractGuidedSectionLibConstructor();
263 LzmaDecompressLibConstructor();
264
265 // Build HOBs to pass up our version of stuff the DXE Core needs to save space
266 #if 0
267 BuildPeCoffLoaderHob ();
268 BuildExtractSectionHob (
269 &gLzmaCustomDecompressGuid,
270 LzmaGuidedSectionGetInfo,
271 LzmaGuidedSectionExtraction
272 );
273 #endif
274
275 DecompressFirstFv ();
276
277 // Load the DXE Core and transfer control to it
278 LoadDxeCoreFromFv(NULL, 0);
279
280 // DXE Core should always load and never return
281 ASSERT(FALSE);
282 }
283