CorebootModulePkg/CbSupportPei/CbSupportPei.c

   1 /** @file
   2   This PEIM will parse coreboot table in memory and report resource information into pei core.
   3   This file contains the main entrypoint of the PEIM.
   4
   5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
   6 This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15 #include "CbSupportPei.h"
  16
  17 #define LEGACY_8259_MASK_REGISTER_MASTER  0x21
  18 #define LEGACY_8259_MASK_REGISTER_SLAVE   0xA1
  19
  20 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
  21   { EfiACPIReclaimMemory,   0x008 },
  22   { EfiACPIMemoryNVS,       0x004 },
  23   { EfiReservedMemoryType,  0x004 },
  24   { EfiRuntimeServicesData, 0x080 },
  25   { EfiRuntimeServicesCode, 0x080 },
  26   { EfiMaxMemoryType,       0     }
  27 };
  28
  29 EFI_PEI_PPI_DESCRIPTOR   mPpiBootMode[] = {
  30   {
  31     EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
  32     &gEfiPeiMasterBootModePpiGuid,
  33     NULL
  34   }
  35 };
  36
  37 /**
  38   Create memory mapped io resource hob.
  39
  40   @param  MmioBase    Base address of the memory mapped io range
  41   @param  MmioSize    Length of the memory mapped io range
  42
  43 **/
  44 VOID
  45 BuildMemoryMappedIoRangeHob (
  46   EFI_PHYSICAL_ADDRESS        MmioBase,
  47   UINT64                      MmioSize
  48   )
  49 {
  50   BuildResourceDescriptorHob (
  51     EFI_RESOURCE_MEMORY_MAPPED_IO,
  52     (EFI_RESOURCE_ATTRIBUTE_PRESENT    |
  53     EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
  54     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
  55     EFI_RESOURCE_ATTRIBUTE_TESTED),
  56     MmioBase,
  57     MmioSize
  58     );
  59
  60   BuildMemoryAllocationHob (
  61     MmioBase,
  62     MmioSize,
  63     EfiMemoryMappedIO
  64     );
  65 }
  66
  67 /**
  68   Check the integrity of firmware volume header
  69
  70   @param[in]  FwVolHeader   A pointer to a firmware volume header
  71
  72   @retval     TRUE          The firmware volume is consistent
  73   @retval     FALSE         The firmware volume has corrupted.
  74
  75 **/
  76 STATIC
  77 BOOLEAN
  78 IsFvHeaderValid (
  79   IN EFI_FIRMWARE_VOLUME_HEADER    *FwVolHeader
  80   )
  81 {
  82   UINT16 Checksum;
  83
  84   // Skip nv storage fv
  85   if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
  86     return FALSE;
  87   }
  88
  89   if ( (FwVolHeader->Revision != EFI_FVH_REVISION)   ||
  90      (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
  91      (FwVolHeader->FvLength == ((UINTN) -1))       ||
  92      ((FwVolHeader->HeaderLength & 0x01 ) !=0) )  {
  93     return FALSE;
  94   }
  95
  96   Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
  97   if (Checksum != 0) {
  98     DEBUG (( DEBUG_ERROR,
  99               "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
 100               FwVolHeader->Checksum,
 101               (UINT16)( Checksum + FwVolHeader->Checksum )));
 102     return FALSE;
 103   }
 104
 105   return TRUE;
 106 }
 107
 108 /**
 109   Install FvInfo PPI and create fv hobs for remained fvs
 110
 111 **/
 112 VOID
 113 CbPeiReportRemainedFvs (
 114   VOID
 115   )
 116 {
 117   UINT8*  TempPtr;
 118   UINT8*  EndPtr;
 119
 120   TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
 121   EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
 122
 123   for (;TempPtr < EndPtr;) {
 124     if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
 125       if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase))  {
 126         // Skip the PEI FV
 127         DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
 128
 129         PeiServicesInstallFvInfoPpi (
 130           NULL,
 131           (VOID *) (UINTN) TempPtr,
 132           (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
 133           NULL,
 134           NULL
 135           );
 136         BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
 137       }
 138     }
 139     TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
 140   }
 141 }
 142
 143 /**
 144   This is the entrypoint of PEIM
 145
 146   @param  FileHandle  Handle of the file being invoked.
 147   @param  PeiServices Describes the list of possible PEI Services.
 148
 149   @retval EFI_SUCCESS if it completed successfully.
 150 **/
 151 EFI_STATUS
 152 EFIAPI
 153 CbPeiEntryPoint (
 154   IN       EFI_PEI_FILE_HANDLE  FileHandle,
 155   IN CONST EFI_PEI_SERVICES     **PeiServices
 156   )
 157 {
 158   EFI_STATUS Status;
 159   UINT64 LowMemorySize, HighMemorySize;
 160   UINT64 PeiMemSize = SIZE_64MB;   // 64 MB
 161   EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
 162   UINT32               RegEax;
 163   UINT8                PhysicalAddressBits;
 164   VOID*                pCbHeader;
 165   VOID*                pAcpiTable;
 166   UINT32               AcpiTableSize;
 167   VOID*                pSmbiosTable;
 168   UINT32               SmbiosTableSize;
 169   SYSTEM_TABLE_INFO*   pSystemTableInfo;
 170   FRAME_BUFFER_INFO    FbInfo;
 171   FRAME_BUFFER_INFO*   pFbInfo;
 172   ACPI_BOARD_INFO*     pAcpiBoardInfo;
 173   UINTN                PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
 174   UINTN                PmEvtBase;
 175   UINTN                PmGpeEnBase;
 176
 177   LowMemorySize = 0;
 178   HighMemorySize = 0;
 179
 180   Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);
 181   if (EFI_ERROR(Status))
 182     return Status;
 183
 184   DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%lx.\n", LowMemorySize));
 185   DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%lx.\n", HighMemorySize));
 186
 187   ASSERT (LowMemorySize > 0);
 188
 189   BuildResourceDescriptorHob (
 190     EFI_RESOURCE_SYSTEM_MEMORY,
 191     (
 192     EFI_RESOURCE_ATTRIBUTE_PRESENT |
 193     EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 194     EFI_RESOURCE_ATTRIBUTE_TESTED |
 195     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 196     EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 197     EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 198     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
 199     ),
 200     (EFI_PHYSICAL_ADDRESS)(0),
 201     (UINT64)(0xA0000)
 202     );
 203
 204
 205   BuildResourceDescriptorHob (
 206     EFI_RESOURCE_MEMORY_RESERVED,
 207     (
 208     EFI_RESOURCE_ATTRIBUTE_PRESENT |
 209     EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 210     EFI_RESOURCE_ATTRIBUTE_TESTED |
 211     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 212     EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 213     EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 214     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
 215     ),
 216     (EFI_PHYSICAL_ADDRESS)(0xA0000),
 217     (UINT64)(0x60000)
 218     );
 219
 220    BuildResourceDescriptorHob (
 221     EFI_RESOURCE_SYSTEM_MEMORY,
 222     (
 223        EFI_RESOURCE_ATTRIBUTE_PRESENT |
 224        EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 225        EFI_RESOURCE_ATTRIBUTE_TESTED |
 226        EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 227        EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 228        EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 229        EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
 230     ),
 231     (EFI_PHYSICAL_ADDRESS)(0x100000),
 232     (UINT64) (LowMemorySize - 0x100000)
 233     );
 234
 235   if (HighMemorySize > 0) {
 236     BuildResourceDescriptorHob (
 237     EFI_RESOURCE_SYSTEM_MEMORY,
 238     (
 239        EFI_RESOURCE_ATTRIBUTE_PRESENT |
 240        EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 241        EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 242        EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 243        EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 244        EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
 245     ),
 246     (EFI_PHYSICAL_ADDRESS)(0x100000000ULL),
 247     HighMemorySize
 248     );
 249   }
 250
 251   //
 252   // Should be 64k aligned
 253   //
 254   PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
 255
 256   DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
 257   DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
 258
 259   Status = PeiServicesInstallPeiMemory (
 260          PeiMemBase,
 261          PeiMemSize
 262          );
 263   ASSERT_EFI_ERROR (Status);
 264
 265   //
 266   // Set cache on the physical memory
 267   //
 268   MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
 269   MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
 270
 271   //
 272   // Create Memory Type Information HOB
 273   //
 274   BuildGuidDataHob (
 275     &gEfiMemoryTypeInformationGuid,
 276     mDefaultMemoryTypeInformation,
 277     sizeof(mDefaultMemoryTypeInformation)
 278     );
 279
 280   //
 281   // Create Fv hob
 282   //
 283   CbPeiReportRemainedFvs ();
 284
 285   BuildMemoryAllocationHob (
 286     PcdGet32 (PcdPayloadFdMemBase),
 287     PcdGet32 (PcdPayloadFdMemSize),
 288     EfiBootServicesData
 289     );
 290
 291   //
 292   // Build CPU memory space and IO space hob
 293   //
 294   AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
 295   if (RegEax >= 0x80000008) {
 296     AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
 297     PhysicalAddressBits = (UINT8) RegEax;
 298   } else {
 299     PhysicalAddressBits  = 36;
 300   }
 301   //
 302   // Create a CPU hand-off information
 303   //
 304   BuildCpuHob (PhysicalAddressBits, 16);
 305
 306   //
 307   // Report Local APIC range
 308   //
 309   BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
 310
 311   //
 312   // Boot mode
 313   //
 314   Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
 315   ASSERT_EFI_ERROR (Status);
 316
 317   Status = PeiServicesInstallPpi (mPpiBootMode);
 318   ASSERT_EFI_ERROR (Status);
 319
 320    //
 321   // Set pcd to save the upper coreboot header in case the dxecore will
 322   // erase 0~4k memory
 323   //
 324   pCbHeader = NULL;
 325   if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
 326     && ((UINTN)pCbHeader > BASE_4KB)) {
 327     DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
 328     PcdSet32 (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
 329   }
 330
 331   //
 332   // Create guid hob for system tables like acpi table and smbios table
 333   //
 334   pAcpiTable = NULL;
 335   AcpiTableSize = 0;
 336   pSmbiosTable = NULL;
 337   SmbiosTableSize = 0;
 338   Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
 339   if (EFI_ERROR (Status)) {
 340     // ACPI table is oblidgible
 341     DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
 342     ASSERT (FALSE);
 343   }
 344   CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
 345
 346   pSystemTableInfo = NULL;
 347   pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
 348   ASSERT (pSystemTableInfo != NULL);
 349   pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
 350   pSystemTableInfo->AcpiTableSize = AcpiTableSize;
 351   pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
 352   pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
 353   DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
 354   DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
 355   DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
 356
 357   //
 358   // Create guid hob for acpi board information
 359   //
 360   Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue, &PmEvtBase, &PmGpeEnBase);
 361   ASSERT_EFI_ERROR (Status);
 362   pAcpiBoardInfo = NULL;
 363   pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
 364   ASSERT (pAcpiBoardInfo != NULL);
 365   pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
 366   pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
 367   pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
 368   pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
 369   pAcpiBoardInfo->PmEvtBase = (UINT64)PmEvtBase;
 370   pAcpiBoardInfo->PmGpeEnBase = (UINT64)PmGpeEnBase;
 371   DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
 372
 373   //
 374   // Create guid hob for frame buffer information
 375   //
 376   ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
 377   Status = CbParseFbInfo (&FbInfo);
 378   if (!EFI_ERROR (Status)) {
 379     pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
 380     ASSERT (pSystemTableInfo != NULL);
 381     CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
 382     DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
 383   }
 384
 385   //
 386   // Mask off all legacy 8259 interrupt sources
 387   //
 388   IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
 389   IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE,  0xFF);
 390
 391   return EFI_SUCCESS;
 392 }
 393