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CorebootModulePkg/CbSupportPei: Mask off all legacy 8259 interrupt sources
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1 /** @file
2 This PEIM will parse coreboot table in memory and report resource information into pei core.
3 This file contains the main entrypoint of the PEIM.
4
5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15 #include "CbSupportPei.h"
16
17 #define LEGACY_8259_MASK_REGISTER_MASTER 0x21
18 #define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
19
20 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
21 { EfiACPIReclaimMemory, 0x008 },
22 { EfiACPIMemoryNVS, 0x004 },
23 { EfiReservedMemoryType, 0x004 },
24 { EfiRuntimeServicesData, 0x080 },
25 { EfiRuntimeServicesCode, 0x080 },
26 { EfiMaxMemoryType, 0 }
27 };
28
29 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
30 {
31 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
32 &gEfiPeiMasterBootModePpiGuid,
33 NULL
34 }
35 };
36
37 /**
38 Create memory mapped io resource hob.
39
40 @param MmioBase Base address of the memory mapped io range
41 @param MmioSize Length of the memory mapped io range
42
43 **/
44 VOID
45 BuildMemoryMappedIoRangeHob (
46 EFI_PHYSICAL_ADDRESS MmioBase,
47 UINT64 MmioSize
48 )
49 {
50 BuildResourceDescriptorHob (
51 EFI_RESOURCE_MEMORY_MAPPED_IO,
52 (EFI_RESOURCE_ATTRIBUTE_PRESENT |
53 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
54 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
55 EFI_RESOURCE_ATTRIBUTE_TESTED),
56 MmioBase,
57 MmioSize
58 );
59
60 BuildMemoryAllocationHob (
61 MmioBase,
62 MmioSize,
63 EfiMemoryMappedIO
64 );
65 }
66
67 /**
68 Check the integrity of firmware volume header
69
70 @param[in] FwVolHeader A pointer to a firmware volume header
71
72 @retval TRUE The firmware volume is consistent
73 @retval FALSE The firmware volume has corrupted.
74
75 **/
76 STATIC
77 BOOLEAN
78 IsFvHeaderValid (
79 IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
80 )
81 {
82 UINT16 Checksum;
83
84 // Skip nv storage fv
85 if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
86 return FALSE;
87 }
88
89 if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
90 (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
91 (FwVolHeader->FvLength == ((UINTN) -1)) ||
92 ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
93 return FALSE;
94 }
95
96 Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
97 if (Checksum != 0) {
98 DEBUG (( DEBUG_ERROR,
99 "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
100 FwVolHeader->Checksum,
101 (UINT16)( Checksum + FwVolHeader->Checksum )));
102 return FALSE;
103 }
104
105 return TRUE;
106 }
107
108 /**
109 Install FvInfo PPI and create fv hobs for remained fvs
110
111 **/
112 VOID
113 CbPeiReportRemainedFvs (
114 VOID
115 )
116 {
117 UINT8* TempPtr;
118 UINT8* EndPtr;
119
120 TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
121 EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
122
123 for (;TempPtr < EndPtr;) {
124 if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
125 if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {
126 // Skip the PEI FV
127 DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
128
129 PeiServicesInstallFvInfoPpi (
130 NULL,
131 (VOID *) (UINTN) TempPtr,
132 (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
133 NULL,
134 NULL
135 );
136 BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
137 }
138 }
139 TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
140 }
141 }
142
143 /**
144 This is the entrypoint of PEIM
145
146 @param FileHandle Handle of the file being invoked.
147 @param PeiServices Describes the list of possible PEI Services.
148
149 @retval EFI_SUCCESS if it completed successfully.
150 **/
151 EFI_STATUS
152 EFIAPI
153 CbPeiEntryPoint (
154 IN EFI_PEI_FILE_HANDLE FileHandle,
155 IN CONST EFI_PEI_SERVICES **PeiServices
156 )
157 {
158 EFI_STATUS Status;
159 UINT64 LowMemorySize, HighMemorySize;
160 UINT64 PeiMemSize = SIZE_64MB; // 64 MB
161 EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
162 UINT32 RegEax;
163 UINT8 PhysicalAddressBits;
164 VOID* pCbHeader;
165 VOID* pAcpiTable;
166 UINT32 AcpiTableSize;
167 VOID* pSmbiosTable;
168 UINT32 SmbiosTableSize;
169 SYSTEM_TABLE_INFO* pSystemTableInfo;
170 FRAME_BUFFER_INFO FbInfo;
171 FRAME_BUFFER_INFO* pFbInfo;
172 ACPI_BOARD_INFO* pAcpiBoardInfo;
173 UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;
174
175 LowMemorySize = 0;
176 HighMemorySize = 0;
177
178 Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);
179 if (EFI_ERROR(Status))
180 return Status;
181
182 DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%lx.\n", LowMemorySize));
183 DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%lx.\n", HighMemorySize));
184
185 ASSERT (LowMemorySize > 0);
186
187 BuildResourceDescriptorHob (
188 EFI_RESOURCE_SYSTEM_MEMORY,
189 (
190 EFI_RESOURCE_ATTRIBUTE_PRESENT |
191 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
192 EFI_RESOURCE_ATTRIBUTE_TESTED |
193 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
194 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
195 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
196 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
197 ),
198 (EFI_PHYSICAL_ADDRESS)(0),
199 (UINT64)(0xA0000)
200 );
201
202
203 BuildResourceDescriptorHob (
204 EFI_RESOURCE_MEMORY_RESERVED,
205 (
206 EFI_RESOURCE_ATTRIBUTE_PRESENT |
207 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
208 EFI_RESOURCE_ATTRIBUTE_TESTED |
209 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
210 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
211 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
212 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
213 ),
214 (EFI_PHYSICAL_ADDRESS)(0xA0000),
215 (UINT64)(0x60000)
216 );
217
218 BuildResourceDescriptorHob (
219 EFI_RESOURCE_SYSTEM_MEMORY,
220 (
221 EFI_RESOURCE_ATTRIBUTE_PRESENT |
222 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
223 EFI_RESOURCE_ATTRIBUTE_TESTED |
224 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
225 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
226 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
227 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
228 ),
229 (EFI_PHYSICAL_ADDRESS)(0x100000),
230 (UINT64) (LowMemorySize - 0x100000)
231 );
232
233 if (HighMemorySize > 0) {
234 BuildResourceDescriptorHob (
235 EFI_RESOURCE_SYSTEM_MEMORY,
236 (
237 EFI_RESOURCE_ATTRIBUTE_PRESENT |
238 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
239 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
240 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
241 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
242 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
243 ),
244 (EFI_PHYSICAL_ADDRESS)(0x100000000ULL),
245 HighMemorySize
246 );
247 }
248
249 //
250 // Should be 64k aligned
251 //
252 PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
253
254 DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%lx.\n", PeiMemBase));
255 DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%lx.\n", PeiMemSize));
256
257 Status = PeiServicesInstallPeiMemory (
258 PeiMemBase,
259 PeiMemSize
260 );
261 ASSERT_EFI_ERROR (Status);
262
263 //
264 // Set cache on the physical memory
265 //
266 MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
267 MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
268
269 //
270 // Create Memory Type Information HOB
271 //
272 BuildGuidDataHob (
273 &gEfiMemoryTypeInformationGuid,
274 mDefaultMemoryTypeInformation,
275 sizeof(mDefaultMemoryTypeInformation)
276 );
277
278 //
279 // Create Fv hob
280 //
281 CbPeiReportRemainedFvs ();
282
283 BuildMemoryAllocationHob (
284 PcdGet32 (PcdPayloadFdMemBase),
285 PcdGet32 (PcdPayloadFdMemSize),
286 EfiBootServicesData
287 );
288
289 //
290 // Build CPU memory space and IO space hob
291 //
292 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
293 if (RegEax >= 0x80000008) {
294 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
295 PhysicalAddressBits = (UINT8) RegEax;
296 } else {
297 PhysicalAddressBits = 36;
298 }
299 //
300 // Create a CPU hand-off information
301 //
302 BuildCpuHob (PhysicalAddressBits, 16);
303
304 //
305 // Report Local APIC range
306 //
307 BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
308
309 //
310 // Boot mode
311 //
312 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
313 ASSERT_EFI_ERROR (Status);
314
315 Status = PeiServicesInstallPpi (mPpiBootMode);
316 ASSERT_EFI_ERROR (Status);
317
318 //
319 // Set pcd to save the upper coreboot header in case the dxecore will
320 // erase 0~4k memory
321 //
322 pCbHeader = NULL;
323 if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS)
324 && ((UINTN)pCbHeader > BASE_4KB)) {
325 DEBUG((EFI_D_ERROR, "Actual Coreboot header: %p.\n", pCbHeader));
326 PcdSet32 (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);
327 }
328
329 //
330 // Create guid hob for system tables like acpi table and smbios table
331 //
332 pAcpiTable = NULL;
333 AcpiTableSize = 0;
334 pSmbiosTable = NULL;
335 SmbiosTableSize = 0;
336 Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);
337 if (EFI_ERROR (Status)) {
338 // ACPI table is oblidgible
339 DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));
340 ASSERT (FALSE);
341 }
342 CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);
343
344 pSystemTableInfo = NULL;
345 pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
346 ASSERT (pSystemTableInfo != NULL);
347 pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;
348 pSystemTableInfo->AcpiTableSize = AcpiTableSize;
349 pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;
350 pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;
351 DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%lx, length 0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));
352 DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%lx, length 0x%x\n", pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize));
353 DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));
354
355 //
356 // Create guid hob for acpi board information
357 //
358 Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue);
359 ASSERT_EFI_ERROR (Status);
360 pAcpiBoardInfo = NULL;
361 pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
362 ASSERT (pAcpiBoardInfo != NULL);
363 pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;
364 pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;
365 pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;
366 pAcpiBoardInfo->ResetValue = (UINT8)ResetValue;
367 DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));
368
369 //
370 // Create guid hob for frame buffer information
371 //
372 ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO));
373 Status = CbParseFbInfo (&FbInfo);
374 if (!EFI_ERROR (Status)) {
375 pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));
376 ASSERT (pSystemTableInfo != NULL);
377 CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
378 DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
379 }
380
381 //
382 // Mask off all legacy 8259 interrupt sources
383 //
384 IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
385 IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
386
387 return EFI_SUCCESS;
388 }
389