DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.h

   1 /*++
   2
   3 Copyright (c) 2005 - 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13   PcatPciRootBridge.h
  14
  15 Abstract:
  16
  17   The driver for the host to pci bridge (root bridge).
  18
  19 --*/
  20
  21 #ifndef _PCAT_PCI_ROOT_BRIDGE_H_
  22 #define _PCAT_PCI_ROOT_BRIDGE_H_
  23
  24 #include <PiDxe.h>
  25 #include <Protocol/PciRootBridgeIo.h>
  26 #include <Protocol/DeviceIo.h>
  27 #include <Protocol/CpuIo.h>
  28
  29 #include <Library/UefiLib.h>
  30 #include <Library/BaseLib.h>
  31 #include <Library/MemoryAllocationLib.h>
  32 #include <Library/UefiBootServicesTableLib.h>
  33 #include <Library/DebugLib.h>
  34 #include <Library/BaseMemoryLib.h>
  35 #include <Library/DevicePathLib.h>
  36 #include <Library/HobLib.h>
  37
  38 #include <Guid/PciOptionRomTable.h>
  39 #include <Guid/HobList.h>
  40 #include <Guid/PciExpressBaseAddress.h>
  41
  42 #include <IndustryStandard/Acpi.h>
  43 #include <IndustryStandard/Pci.h>
  44 //
  45 // Driver Instance Data Prototypes
  46 //
  47 #define PCAT_PCI_ROOT_BRIDGE_SIGNATURE  EFI_SIGNATURE_32('p', 'c', 'r', 'b')
  48
  49 typedef struct {
  50   UINT32                            Signature;
  51   EFI_HANDLE                        Handle;
  52
  53   EFI_DEVICE_PATH_PROTOCOL          *DevicePath;
  54   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL   Io;
  55   EFI_CPU_IO_PROTOCOL               *CpuIo;
  56
  57   UINT32                            RootBridgeNumber;
  58   UINT32                            PrimaryBus;
  59   UINT32                            SubordinateBus;
  60
  61   UINT64                            MemBase;     // Offsets host to bus memory addr.
  62   UINT64                            MemLimit;    // Max allowable memory access
  63
  64   UINT64                            IoBase;      // Offsets host to bus io addr.
  65   UINT64                            IoLimit;     // Max allowable io access
  66
  67   UINT64                            PciAddress;
  68   UINT64                            PciData;
  69
  70   UINT64                            PhysicalMemoryBase;
  71   UINT64                            PhysicalIoBase;
  72
  73   EFI_LOCK                          PciLock;
  74
  75   UINT64                            Attributes;
  76
  77   UINT64                            Mem32Base;
  78   UINT64                            Mem32Limit;
  79   UINT64                            Pmem32Base;
  80   UINT64                            Pmem32Limit;
  81   UINT64                            Mem64Base;
  82   UINT64                            Mem64Limit;
  83   UINT64                            Pmem64Base;
  84   UINT64                            Pmem64Limit;
  85
  86   UINT64                            PciExpressBaseAddress;
  87
  88   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
  89
  90   LIST_ENTRY                    MapInfo;
  91 } PCAT_PCI_ROOT_BRIDGE_INSTANCE;
  92
  93 //
  94 // Driver Instance Data Macros
  95 //
  96 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
  97   CR(a, PCAT_PCI_ROOT_BRIDGE_INSTANCE, Io, PCAT_PCI_ROOT_BRIDGE_SIGNATURE)
  98
  99 #define VOLATILE volatile
 100 //
 101 // Private data types
 102 //
 103 typedef union {
 104   UINT8   VOLATILE  *buf;
 105   UINT8   VOLATILE  *ui8;
 106   UINT16  VOLATILE  *ui16;
 107   UINT32  VOLATILE  *ui32;
 108   UINT64  VOLATILE  *ui64;
 109   UINTN   VOLATILE  ui;
 110 } PTR;
 111
 112 typedef struct {
 113   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 114   UINTN                                      NumberOfBytes;
 115   UINTN                                      NumberOfPages;
 116   EFI_PHYSICAL_ADDRESS                       HostAddress;
 117   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 118 } MAP_INFO;
 119
 120 typedef struct {
 121   LIST_ENTRY Link;
 122   MAP_INFO * Map;
 123 } MAP_INFO_INSTANCE;
 124
 125 typedef
 126 VOID
 127 (*EFI_PCI_BUS_SCAN_CALLBACK) (
 128   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *IoDev,
 129   UINT16                           MinBus,
 130   UINT16                           MaxBus,
 131   UINT16                           MinDevice,
 132   UINT16                           MaxDevice,
 133   UINT16                           MinFunc,
 134   UINT16                           MaxFunc,
 135   UINT16                           Bus,
 136   UINT16                           Device,
 137   UINT16                           Func,
 138   IN VOID                          *Context
 139   );
 140
 141 typedef struct {
 142   UINT16                    *CommandRegisterBuffer;
 143   UINT32                    PpbMemoryWindow;
 144 } PCAT_PCI_ROOT_BRIDGE_SCAN_FOR_ROM_CONTEXT;
 145
 146 //
 147 // Driver Protocol Constructor Prototypes
 148 //
 149 EFI_STATUS
 150 ConstructConfiguration(
 151   IN OUT PCAT_PCI_ROOT_BRIDGE_INSTANCE  *PrivateData
 152   );
 153
 154 EFI_STATUS
 155 PcatPciRootBridgeParseBars (
 156   IN PCAT_PCI_ROOT_BRIDGE_INSTANCE  *PrivateData,
 157   IN UINT16                         Command,
 158   IN UINTN                          Bus,
 159   IN UINTN                          Device,
 160   IN UINTN                          Function
 161   );
 162
 163 EFI_STATUS
 164 ScanPciRootBridgeForRoms(
 165   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *IoDev
 166   );
 167
 168 EFI_STATUS
 169 PcatRootBridgeDevicePathConstructor (
 170   IN EFI_DEVICE_PATH_PROTOCOL  **Protocol,
 171   IN UINTN                     RootBridgeNumber,
 172   IN BOOLEAN                   IsPciExpress
 173   );
 174
 175 EFI_STATUS
 176 PcatRootBridgeIoConstructor (
 177   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *Protocol,
 178   IN UINTN                            SegmentNumber
 179   );
 180
 181 EFI_STATUS
 182 PcatRootBridgeIoGetIoPortMapping (
 183   OUT EFI_PHYSICAL_ADDRESS  *IoPortMapping,
 184   OUT EFI_PHYSICAL_ADDRESS  *MemoryPortMapping
 185   );
 186
 187 EFI_STATUS
 188 PcatRootBridgeIoPciRW (
 189   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
 190   IN BOOLEAN                                Write,
 191   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 192   IN UINT64                                 UserAddress,
 193   IN UINTN                                  Count,
 194   IN OUT VOID                               *UserBuffer
 195   );
 196
 197 UINT64
 198 GetPciExpressBaseAddressForRootBridge (
 199   IN UINTN    HostBridgeNumber,
 200   IN UINTN    RootBridgeNumber
 201   );
 202
 203 //
 204 // Driver entry point prototype
 205 //
 206 EFI_STATUS
 207 EFIAPI
 208 InitializePcatPciRootBridge (
 209   IN EFI_HANDLE       ImageHandle,
 210   IN EFI_SYSTEM_TABLE *SystemTable
 211   );
 212
 213 extern EFI_CPU_IO_PROTOCOL  *gCpuIo;
 214
 215 #endif