DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.h

   1 /*++
   2
   3 Copyright (c) 2005 - 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13   PcatPciRootBridge.h
  14
  15 Abstract:
  16
  17   The driver for the host to pci bridge (root bridge).
  18
  19 --*/
  20
  21 #ifndef _PCAT_PCI_ROOT_BRIDGE_H_
  22 #define _PCAT_PCI_ROOT_BRIDGE_H_
  23
  24 #include <PiDxe.h>
  25 #include <Protocol/PciRootBridgeIo.h>
  26 #include <Protocol/DeviceIo.h>
  27 #include <Protocol/CpuIo.h>
  28
  29 #include <Library/UefiLib.h>
  30 #include <Library/BaseLib.h>
  31 #include <Library/MemoryAllocationLib.h>
  32 #include <Library/UefiBootServicesTableLib.h>
  33 #include <Library/DebugLib.h>
  34 #include <Library/BaseMemoryLib.h>
  35 #include <Library/DevicePathLib.h>
  36 #include <Library/HobLib.h>
  37
  38 #include <Guid/PciOptionRomTable.h>
  39 #include <Guid/HobList.h>
  40 #include <Guid/PciExpressBaseAddress.h>
  41
  42 #include <IndustryStandard/Acpi.h>
  43 #include <IndustryStandard/Pci.h>
  44 //
  45 // Driver Instance Data Prototypes
  46 //
  47 #define PCAT_PCI_ROOT_BRIDGE_SIGNATURE  EFI_SIGNATURE_32('p', 'c', 'r', 'b')
  48
  49 typedef struct {
  50   UINT32                            Signature;
  51   EFI_HANDLE                        Handle;
  52
  53   EFI_DEVICE_PATH_PROTOCOL          *DevicePath;
  54   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL   Io;
  55   EFI_CPU_IO_PROTOCOL               *CpuIo;
  56
  57   UINT32                            RootBridgeNumber;
  58   UINT32                            PrimaryBus;
  59   UINT32                            SubordinateBus;
  60
  61   UINT64                            MemBase;     // Offsets host to bus memory addr.
  62   UINT64                            MemLimit;    // Max allowable memory access
  63
  64   UINT64                            IoBase;      // Offsets host to bus io addr.
  65   UINT64                            IoLimit;     // Max allowable io access
  66
  67   UINT64                            PciAddress;
  68   UINT64                            PciData;
  69
  70   UINT64                            PhysicalMemoryBase;
  71   UINT64                            PhysicalIoBase;
  72
  73   EFI_LOCK                          PciLock;
  74
  75   UINT64                            Attributes;
  76
  77   UINT64                            Mem32Base;
  78   UINT64                            Mem32Limit;
  79   UINT64                            Pmem32Base;
  80   UINT64                            Pmem32Limit;
  81   UINT64                            Mem64Base;
  82   UINT64                            Mem64Limit;
  83   UINT64                            Pmem64Base;
  84   UINT64                            Pmem64Limit;
  85
  86   UINT64                            PciExpressBaseAddress;
  87
  88   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
  89
  90   LIST_ENTRY                    MapInfo;
  91 } PCAT_PCI_ROOT_BRIDGE_INSTANCE;
  92
  93 //
  94 // Driver Instance Data Macros
  95 //
  96 #define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
  97   CR(a, PCAT_PCI_ROOT_BRIDGE_INSTANCE, Io, PCAT_PCI_ROOT_BRIDGE_SIGNATURE)
  98
  99 //
 100 // Private data types
 101 //
 102 typedef union {
 103   UINT8   volatile  *buf;
 104   UINT8   volatile  *ui8;
 105   UINT16  volatile  *ui16;
 106   UINT32  volatile  *ui32;
 107   UINT64  volatile  *ui64;
 108   UINTN   volatile  ui;
 109 } PTR;
 110
 111 typedef struct {
 112   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation;
 113   UINTN                                      NumberOfBytes;
 114   UINTN                                      NumberOfPages;
 115   EFI_PHYSICAL_ADDRESS                       HostAddress;
 116   EFI_PHYSICAL_ADDRESS                       MappedHostAddress;
 117 } MAP_INFO;
 118
 119 typedef struct {
 120   LIST_ENTRY Link;
 121   MAP_INFO * Map;
 122 } MAP_INFO_INSTANCE;
 123
 124 typedef
 125 VOID
 126 (*EFI_PCI_BUS_SCAN_CALLBACK) (
 127   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *IoDev,
 128   UINT16                           MinBus,
 129   UINT16                           MaxBus,
 130   UINT16                           MinDevice,
 131   UINT16                           MaxDevice,
 132   UINT16                           MinFunc,
 133   UINT16                           MaxFunc,
 134   UINT16                           Bus,
 135   UINT16                           Device,
 136   UINT16                           Func,
 137   IN VOID                          *Context
 138   );
 139
 140 typedef struct {
 141   UINT16                    *CommandRegisterBuffer;
 142   UINT32                    PpbMemoryWindow;
 143 } PCAT_PCI_ROOT_BRIDGE_SCAN_FOR_ROM_CONTEXT;
 144
 145 typedef struct {
 146   UINT8 Register;
 147   UINT8 Function;
 148   UINT8 Device;
 149   UINT8 Bus;
 150   UINT8 Reserved[4];
 151 } DEFIO_PCI_ADDR;
 152
 153 //
 154 // Driver Protocol Constructor Prototypes
 155 //
 156 EFI_STATUS
 157 ConstructConfiguration(
 158   IN OUT PCAT_PCI_ROOT_BRIDGE_INSTANCE  *PrivateData
 159   );
 160
 161 EFI_STATUS
 162 PcatPciRootBridgeParseBars (
 163   IN PCAT_PCI_ROOT_BRIDGE_INSTANCE  *PrivateData,
 164   IN UINT16                         Command,
 165   IN UINTN                          Bus,
 166   IN UINTN                          Device,
 167   IN UINTN                          Function
 168   );
 169
 170 EFI_STATUS
 171 ScanPciRootBridgeForRoms(
 172   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *IoDev
 173   );
 174
 175 EFI_STATUS
 176 PcatRootBridgeDevicePathConstructor (
 177   IN EFI_DEVICE_PATH_PROTOCOL  **Protocol,
 178   IN UINTN                     RootBridgeNumber,
 179   IN BOOLEAN                   IsPciExpress
 180   );
 181
 182 EFI_STATUS
 183 PcatRootBridgeIoConstructor (
 184   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *Protocol,
 185   IN UINTN                            SegmentNumber
 186   );
 187
 188 EFI_STATUS
 189 PcatRootBridgeIoGetIoPortMapping (
 190   OUT EFI_PHYSICAL_ADDRESS  *IoPortMapping,
 191   OUT EFI_PHYSICAL_ADDRESS  *MemoryPortMapping
 192   );
 193
 194 EFI_STATUS
 195 PcatRootBridgeIoPciRW (
 196   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *This,
 197   IN BOOLEAN                                Write,
 198   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 199   IN UINT64                                 UserAddress,
 200   IN UINTN                                  Count,
 201   IN OUT VOID                               *UserBuffer
 202   );
 203
 204 UINT64
 205 GetPciExpressBaseAddressForRootBridge (
 206   IN UINTN    HostBridgeNumber,
 207   IN UINTN    RootBridgeNumber
 208   );
 209
 210 //
 211 // Driver entry point prototype
 212 //
 213 EFI_STATUS
 214 EFIAPI
 215 InitializePcatPciRootBridge (
 216   IN EFI_HANDLE       ImageHandle,
 217   IN EFI_SYSTEM_TABLE *SystemTable
 218   );
 219
 220 extern EFI_CPU_IO_PROTOCOL  *gCpuIo;
 221
 222 #endif