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1 /** @file
2 Implementation of CPU I/O 2 Protocol based on Framework CPU I/O Protocol.
3
4 Intel's Framework CPU I/O Protocol is replaced by CPU I/O 2 Protocol in PI.
5 This module produces PI CPU I/O 2 Protocol on top of Framework CPU I/O Protocol.
6
7 Copyright (c) 2009, Intel Corporation
8 All rights reserved. This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #include "CpuIo2OnCpuIoThunk.h"
19
20 EFI_HANDLE mCpuIo2Handle = NULL;
21 EFI_CPU_IO_PROTOCOL *mCpuIo;
22 EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
23 {
24 CpuMemoryServiceRead,
25 CpuMemoryServiceWrite
26 },
27 {
28 CpuIoServiceRead,
29 CpuIoServiceWrite
30 }
31 };
32
33 /**
34 Enables a driver to read memory-mapped registers in the PI System memory space.
35
36 @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
37 @param[in] Width Signifies the width of the memory operation.
38 @param[in] Address The base address of the memory operation.
39 @param[in] Count The number of memory operations to perform. The number of bytes moved
40 is Width size * Count, starting at Address.
41 @param[out] Buffer The destination buffer to store the results.
42
43 @retval EFI_SUCCESS The data was read from or written to the EFI system.
44 @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
45 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
46 Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
47
48 **/
49 EFI_STATUS
50 EFIAPI
51 CpuMemoryServiceRead (
52 IN EFI_CPU_IO2_PROTOCOL *This,
53 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
54 IN UINT64 Address,
55 IN UINTN Count,
56 OUT VOID *Buffer
57 )
58 {
59 return mCpuIo->Mem.Read (
60 mCpuIo,
61 Width,
62 Address,
63 Count,
64 Buffer
65 );
66 }
67
68 /**
69 Enables a driver to write memory-mapped registers in the PI System memory space.
70
71 @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
72 @param[in] Width Signifies the width of the memory operation.
73 @param[in] Address The base address of the memory operation.
74 @param[in] Count The number of memory operations to perform. The number of bytes moved
75 is Width size * Count, starting at Address.
76 @param[in] Buffer The source buffer from which to write data.
77
78 @retval EFI_SUCCESS The data was read from or written to the EFI system.
79 @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
80 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
81 Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
82
83 **/
84 EFI_STATUS
85 EFIAPI
86 CpuMemoryServiceWrite (
87 IN EFI_CPU_IO2_PROTOCOL *This,
88 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
89 IN UINT64 Address,
90 IN UINTN Count,
91 IN VOID *Buffer
92 )
93 {
94 return mCpuIo->Mem.Write (
95 mCpuIo,
96 Width,
97 Address,
98 Count,
99 Buffer
100 );
101 }
102
103 /**
104 Enables a driver to read registers in the PI CPU I/O space.
105
106 @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
107 @param[in] Width Signifies the width of the I/O operation.
108 @param[in] Address The base address of the I/O operation. The caller is responsible
109 for aligning the Address if required.
110 @param[in] Count The number of I/O operations to perform. The number of bytes moved
111 is Width size * Count, starting at Address.
112 @param[out] Buffer The destination buffer to store the results.
113
114 @retval EFI_SUCCESS The data was read from or written to the EFI system.
115 @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
116 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
117 Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
118
119 **/
120 EFI_STATUS
121 EFIAPI
122 CpuIoServiceRead (
123 IN EFI_CPU_IO2_PROTOCOL *This,
124 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
125 IN UINT64 Address,
126 IN UINTN Count,
127 OUT VOID *Buffer
128 )
129 {
130 return mCpuIo->Io.Read (
131 mCpuIo,
132 Width,
133 Address,
134 Count,
135 Buffer
136 );
137 }
138
139 /**
140 Enables a driver to write registers in the PI CPU I/O space.
141
142 @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
143 @param[in] Width Signifies the width of the I/O operation.
144 @param[in] Address The base address of the I/O operation. The caller is responsible
145 for aligning the Address if required.
146 @param[in] Count The number of I/O operations to perform. The number of bytes moved
147 is Width size * Count, starting at Address.
148 @param[in] Buffer The source buffer from which to write data.
149
150 @retval EFI_SUCCESS The data was read from or written to the EFI system.
151 @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
152 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
153 Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
154
155 **/
156 EFI_STATUS
157 EFIAPI
158 CpuIoServiceWrite (
159 IN EFI_CPU_IO2_PROTOCOL *This,
160 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
161 IN UINT64 Address,
162 IN UINTN Count,
163 IN VOID *Buffer
164 )
165 {
166 return mCpuIo->Io.Write (
167 mCpuIo,
168 Width,
169 Address,
170 Count,
171 Buffer
172 );
173 }
174
175 /**
176 Entrypoint of CPU I/O 2 DXE thunk module.
177
178 @param ImageHandle The firmware allocated handle for the EFI image.
179 @param SystemTable A pointer to the EFI System Table.
180
181 @retval EFI_SUCCESS The entry point is executed successfully.
182
183 **/
184 EFI_STATUS
185 EFIAPI
186 CpuIo2OnCpuIoThunkInitialize (
187 IN EFI_HANDLE ImageHandle,
188 IN EFI_SYSTEM_TABLE *SystemTable
189 )
190 {
191 EFI_STATUS Status;
192
193 //
194 // Locate and cache Framework CPU I/O Protocol.
195 //
196 Status = gBS->LocateProtocol (
197 &gEfiCpuIoProtocolGuid,
198 NULL,
199 (VOID **) &mCpuIo
200 );
201 ASSERT_EFI_ERROR (Status);
202
203 //
204 // Install the CPU I/O 2 Protocol on a new handle.
205 //
206 Status = gBS->InstallMultipleProtocolInterfaces (
207 &mCpuIo2Handle,
208 &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
209 NULL
210 );
211 ASSERT_EFI_ERROR (Status);
212
213 return Status;
214 }