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1 /** @file
2 SMM Base Helper SMM driver.
3
4 This driver is the counterpart of the SMM Base On SMM Base2 Thunk driver. It
5 provides helping services in SMM to the SMM Base On SMM Base2 Thunk driver.
6
7 Caution: This module requires additional review when modified.
8 This driver will have external input - communicate buffer in SMM mode.
9 This external input must be validated carefully to avoid security issue like
10 buffer overflow, integer overflow.
11
12 SmmHandlerEntry() will receive untrusted input and do validation.
13
14 Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
15 This program and the accompanying materials
16 are licensed and made available under the terms and conditions of the BSD License
17 which accompanies this distribution. The full text of the license may be found at
18 http://opensource.org/licenses/bsd-license.php
19
20 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
21 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
22
23 **/
24
25 #include <PiSmm.h>
26 #include <Library/DebugLib.h>
27 #include <Library/UefiBootServicesTableLib.h>
28 #include <Library/SmmServicesTableLib.h>
29 #include <Library/BaseLib.h>
30 #include <Library/BaseMemoryLib.h>
31 #include <Library/PeCoffLib.h>
32 #include <Library/DevicePathLib.h>
33 #include <Library/CacheMaintenanceLib.h>
34 #include <Library/MemoryAllocationLib.h>
35 #include <Library/SynchronizationLib.h>
36 #include <Library/CpuLib.h>
37 #include <Guid/SmmBaseThunkCommunication.h>
38 #include <Protocol/SmmBaseHelperReady.h>
39 #include <Protocol/SmmCpu.h>
40 #include <Protocol/LoadedImage.h>
41 #include <Protocol/SmmCpuSaveState.h>
42 #include <Protocol/MpService.h>
43 #include <Protocol/LoadPe32Image.h>
44 #include <Protocol/SmmReadyToLock.h>
45 #include <Protocol/SmmAccess2.h>
46
47 ///
48 /// Structure for tracking paired information of registered Framework SMI handler
49 /// and correpsonding dispatch handle for SMI handler thunk.
50 ///
51 typedef struct {
52 LIST_ENTRY Link;
53 EFI_HANDLE DispatchHandle;
54 EFI_HANDLE SmmImageHandle;
55 EFI_SMM_CALLBACK_ENTRY_POINT CallbackAddress;
56 VOID *CommunicationBuffer;
57 UINTN *SourceSize;
58 } CALLBACK_INFO;
59
60 typedef struct {
61 ///
62 /// PI SMM CPU Save State register index
63 ///
64 EFI_SMM_SAVE_STATE_REGISTER Register;
65 ///
66 /// Offset in Framework SMST
67 ///
68 UINTN Offset;
69 } CPU_SAVE_STATE_CONVERSION;
70
71 #define CPU_SAVE_STATE_GET_OFFSET(Field) (UINTN)(&(((EFI_SMM_CPU_SAVE_STATE *) 0)->Ia32SaveState.Field))
72
73
74 EFI_HANDLE mDispatchHandle;
75 EFI_SMM_CPU_PROTOCOL *mSmmCpu;
76 EFI_PE32_IMAGE_PROTOCOL *mLoadPe32Image;
77 EFI_GUID mEfiSmmCpuIoGuid = EFI_SMM_CPU_IO_GUID;
78 EFI_SMM_BASE_HELPER_READY_PROTOCOL *mSmmBaseHelperReady;
79 EFI_SMM_SYSTEM_TABLE *mFrameworkSmst;
80 UINTN mNumberOfProcessors;
81 BOOLEAN mLocked = FALSE;
82 BOOLEAN mPageTableHookEnabled;
83 BOOLEAN mHookInitialized;
84 UINT64 *mCpuStatePageTable;
85 SPIN_LOCK mPFLock;
86 UINT64 mPhyMask;
87 VOID *mOriginalHandler;
88 EFI_SMM_CPU_SAVE_STATE *mShadowSaveState;
89 EFI_SMRAM_DESCRIPTOR *mSmramRanges;
90 UINTN mSmramRangeCount;
91
92 LIST_ENTRY mCallbackInfoListHead = INITIALIZE_LIST_HEAD_VARIABLE (mCallbackInfoListHead);
93
94 CPU_SAVE_STATE_CONVERSION mCpuSaveStateConvTable[] = {
95 {EFI_SMM_SAVE_STATE_REGISTER_LDTBASE , CPU_SAVE_STATE_GET_OFFSET(LDTBase)},
96 {EFI_SMM_SAVE_STATE_REGISTER_ES , CPU_SAVE_STATE_GET_OFFSET(ES)},
97 {EFI_SMM_SAVE_STATE_REGISTER_CS , CPU_SAVE_STATE_GET_OFFSET(CS)},
98 {EFI_SMM_SAVE_STATE_REGISTER_SS , CPU_SAVE_STATE_GET_OFFSET(SS)},
99 {EFI_SMM_SAVE_STATE_REGISTER_DS , CPU_SAVE_STATE_GET_OFFSET(DS)},
100 {EFI_SMM_SAVE_STATE_REGISTER_FS , CPU_SAVE_STATE_GET_OFFSET(FS)},
101 {EFI_SMM_SAVE_STATE_REGISTER_GS , CPU_SAVE_STATE_GET_OFFSET(GS)},
102 {EFI_SMM_SAVE_STATE_REGISTER_TR_SEL , CPU_SAVE_STATE_GET_OFFSET(TR)},
103 {EFI_SMM_SAVE_STATE_REGISTER_DR7 , CPU_SAVE_STATE_GET_OFFSET(DR7)},
104 {EFI_SMM_SAVE_STATE_REGISTER_DR6 , CPU_SAVE_STATE_GET_OFFSET(DR6)},
105 {EFI_SMM_SAVE_STATE_REGISTER_RAX , CPU_SAVE_STATE_GET_OFFSET(EAX)},
106 {EFI_SMM_SAVE_STATE_REGISTER_RBX , CPU_SAVE_STATE_GET_OFFSET(EBX)},
107 {EFI_SMM_SAVE_STATE_REGISTER_RCX , CPU_SAVE_STATE_GET_OFFSET(ECX)},
108 {EFI_SMM_SAVE_STATE_REGISTER_RDX , CPU_SAVE_STATE_GET_OFFSET(EDX)},
109 {EFI_SMM_SAVE_STATE_REGISTER_RSP , CPU_SAVE_STATE_GET_OFFSET(ESP)},
110 {EFI_SMM_SAVE_STATE_REGISTER_RBP , CPU_SAVE_STATE_GET_OFFSET(EBP)},
111 {EFI_SMM_SAVE_STATE_REGISTER_RSI , CPU_SAVE_STATE_GET_OFFSET(ESI)},
112 {EFI_SMM_SAVE_STATE_REGISTER_RDI , CPU_SAVE_STATE_GET_OFFSET(EDI)},
113 {EFI_SMM_SAVE_STATE_REGISTER_RIP , CPU_SAVE_STATE_GET_OFFSET(EIP)},
114 {EFI_SMM_SAVE_STATE_REGISTER_RFLAGS , CPU_SAVE_STATE_GET_OFFSET(EFLAGS)},
115 {EFI_SMM_SAVE_STATE_REGISTER_CR0 , CPU_SAVE_STATE_GET_OFFSET(CR0)},
116 {EFI_SMM_SAVE_STATE_REGISTER_CR3 , CPU_SAVE_STATE_GET_OFFSET(CR3)}
117 };
118
119 /**
120 Page fault handler.
121
122 **/
123 VOID
124 PageFaultHandlerHook (
125 VOID
126 );
127
128 /**
129 Read CpuSaveStates from PI for Framework use.
130
131 The function reads PI style CpuSaveStates of CpuIndex-th CPU for Framework driver use. If
132 ToRead is specified, the CpuSaveStates will be copied to ToRead, otherwise copied to
133 mFrameworkSmst->CpuSaveState[CpuIndex].
134
135 @param[in] CpuIndex The zero-based CPU index.
136 @param[in, out] ToRead If not NULL, CpuSaveStates will be copied to it.
137
138 **/
139 VOID
140 ReadCpuSaveState (
141 IN UINTN CpuIndex,
142 IN OUT EFI_SMM_CPU_SAVE_STATE *ToRead
143 )
144 {
145 EFI_STATUS Status;
146 UINTN Index;
147 EFI_SMM_CPU_STATE *State;
148 EFI_SMI_CPU_SAVE_STATE *SaveState;
149
150 State = (EFI_SMM_CPU_STATE *)gSmst->CpuSaveState[CpuIndex];
151 if (ToRead != NULL) {
152 SaveState = &ToRead->Ia32SaveState;
153 } else {
154 SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
155 }
156
157 //
158 // Note that SMBASE/SMMRevId/IORestart/AutoHALTRestart are in same location in IA32 and X64 CPU Save State Map.
159 //
160 SaveState->SMBASE = State->x86.SMBASE;
161 SaveState->SMMRevId = State->x86.SMMRevId;
162 SaveState->IORestart = State->x86.IORestart;
163 SaveState->AutoHALTRestart = State->x86.AutoHALTRestart;
164
165 for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) {
166 ///
167 /// Try to use SMM CPU Protocol to access CPU save states if possible
168 ///
169 Status = mSmmCpu->ReadSaveState (
170 mSmmCpu,
171 (UINTN)sizeof (UINT32),
172 mCpuSaveStateConvTable[Index].Register,
173 CpuIndex,
174 ((UINT8 *)SaveState) + mCpuSaveStateConvTable[Index].Offset
175 );
176 ASSERT_EFI_ERROR (Status);
177 }
178 }
179
180 /**
181 Write CpuSaveStates from Framework into PI.
182
183 The function writes back CpuSaveStates of CpuIndex-th CPU from PI to Framework. If
184 ToWrite is specified, it contains the CpuSaveStates to write from, otherwise CpuSaveStates
185 to write from mFrameworkSmst->CpuSaveState[CpuIndex].
186
187 @param[in] CpuIndex The zero-based CPU index.
188 @param[in] ToWrite If not NULL, CpuSaveStates to write from.
189
190 **/
191 VOID
192 WriteCpuSaveState (
193 IN UINTN CpuIndex,
194 IN EFI_SMM_CPU_SAVE_STATE *ToWrite
195 )
196 {
197 EFI_STATUS Status;
198 UINTN Index;
199 EFI_SMM_CPU_STATE *State;
200 EFI_SMI_CPU_SAVE_STATE *SaveState;
201
202 State = (EFI_SMM_CPU_STATE *)gSmst->CpuSaveState[CpuIndex];
203
204 if (ToWrite != NULL) {
205 SaveState = &ToWrite->Ia32SaveState;
206 } else {
207 SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
208 }
209
210 //
211 // SMMRevId is read-only.
212 // Note that SMBASE/IORestart/AutoHALTRestart are in same location in IA32 and X64 CPU Save State Map.
213 //
214 State->x86.SMBASE = SaveState->SMBASE;
215 State->x86.IORestart = SaveState->IORestart;
216 State->x86.AutoHALTRestart = SaveState->AutoHALTRestart;
217
218 for (Index = 0; Index < sizeof (mCpuSaveStateConvTable) / sizeof (CPU_SAVE_STATE_CONVERSION); Index++) {
219 Status = mSmmCpu->WriteSaveState (
220 mSmmCpu,
221 (UINTN)sizeof (UINT32),
222 mCpuSaveStateConvTable[Index].Register,
223 CpuIndex,
224 ((UINT8 *)SaveState) +
225 mCpuSaveStateConvTable[Index].Offset
226 );
227 }
228 }
229
230 /**
231 Read or write a page that contains CpuSaveStates. Read is from PI to Framework.
232 Write is from Framework to PI.
233
234 This function reads or writes a page that contains CpuSaveStates. The page contains Framework
235 CpuSaveStates. On read, it reads PI style CpuSaveStates and fill the page up. On write, it
236 writes back from the page content to PI CpuSaveStates struct.
237 The first Framework CpuSaveStates (for CPU 0) is from mFrameworkSmst->CpuSaveState which is
238 page aligned. Because Framework CpuSaveStates are continuous, we can know which CPUs' SaveStates
239 are in the page start from PageAddress.
240
241 @param[in] PageAddress The base address for a page.
242 @param[in] IsRead TRUE for Read, FALSE for Write.
243
244 **/
245 VOID
246 ReadWriteCpuStatePage (
247 IN UINT64 PageAddress,
248 IN BOOLEAN IsRead
249 )
250 {
251 UINTN FirstSSIndex; // Index of first CpuSaveState in the page
252 UINTN LastSSIndex; // Index of last CpuSaveState in the page
253 BOOLEAN FirstSSAligned; // Whether first CpuSaveState is page-aligned
254 BOOLEAN LastSSAligned; // Whether the end of last CpuSaveState is page-aligned
255 UINTN ClippedSize;
256 UINTN CpuIndex;
257
258 FirstSSIndex = ((UINTN)PageAddress - (UINTN)mFrameworkSmst->CpuSaveState) / sizeof (EFI_SMM_CPU_SAVE_STATE);
259 FirstSSAligned = TRUE;
260 if (((UINTN)PageAddress - (UINTN)mFrameworkSmst->CpuSaveState) % sizeof (EFI_SMM_CPU_SAVE_STATE) != 0) {
261 FirstSSIndex++;
262 FirstSSAligned = FALSE;
263 }
264 LastSSIndex = ((UINTN)PageAddress + SIZE_4KB - (UINTN)mFrameworkSmst->CpuSaveState - 1) / sizeof (EFI_SMM_CPU_SAVE_STATE);
265 LastSSAligned = TRUE;
266 if (((UINTN)PageAddress + SIZE_4KB - (UINTN)mFrameworkSmst->CpuSaveState) % sizeof (EFI_SMM_CPU_SAVE_STATE) != 0) {
267 LastSSIndex--;
268 LastSSAligned = FALSE;
269 }
270 for (CpuIndex = FirstSSIndex; CpuIndex <= LastSSIndex && CpuIndex < mNumberOfProcessors; CpuIndex++) {
271 if (IsRead) {
272 ReadCpuSaveState (CpuIndex, NULL);
273 } else {
274 WriteCpuSaveState (CpuIndex, NULL);
275 }
276 }
277 if (!FirstSSAligned) {
278 ReadCpuSaveState (FirstSSIndex - 1, mShadowSaveState);
279 ClippedSize = (UINTN)&mFrameworkSmst->CpuSaveState[FirstSSIndex] & (SIZE_4KB - 1);
280 if (IsRead) {
281 CopyMem ((VOID*)(UINTN)PageAddress, (VOID*)((UINTN)(mShadowSaveState + 1) - ClippedSize), ClippedSize);
282 } else {
283 CopyMem ((VOID*)((UINTN)(mShadowSaveState + 1) - ClippedSize), (VOID*)(UINTN)PageAddress, ClippedSize);
284 WriteCpuSaveState (FirstSSIndex - 1, mShadowSaveState);
285 }
286 }
287 if (!LastSSAligned && LastSSIndex + 1 < mNumberOfProcessors) {
288 ReadCpuSaveState (LastSSIndex + 1, mShadowSaveState);
289 ClippedSize = SIZE_4KB - ((UINTN)&mFrameworkSmst->CpuSaveState[LastSSIndex + 1] & (SIZE_4KB - 1));
290 if (IsRead) {
291 CopyMem (&mFrameworkSmst->CpuSaveState[LastSSIndex + 1], mShadowSaveState, ClippedSize);
292 } else {
293 CopyMem (mShadowSaveState, &mFrameworkSmst->CpuSaveState[LastSSIndex + 1], ClippedSize);
294 WriteCpuSaveState (LastSSIndex + 1, mShadowSaveState);
295 }
296 }
297 }
298
299 /**
300 The page fault handler that on-demand read PI CpuSaveStates for framework use. If the fault
301 is not targeted to mFrameworkSmst->CpuSaveState range, the function will return FALSE to let
302 PageFaultHandlerHook know it needs to pass the fault over to original page fault handler.
303
304 @retval TRUE The page fault is correctly handled.
305 @retval FALSE The page fault is not handled and is passed through to original handler.
306
307 **/
308 BOOLEAN
309 PageFaultHandler (
310 VOID
311 )
312 {
313 BOOLEAN IsHandled;
314 UINT64 *PageTable;
315 UINT64 PFAddress;
316 UINTN NumCpuStatePages;
317
318 ASSERT (mPageTableHookEnabled);
319 AcquireSpinLock (&mPFLock);
320
321 PageTable = (UINT64*)(UINTN)(AsmReadCr3 () & mPhyMask);
322 PFAddress = AsmReadCr2 ();
323 NumCpuStatePages = EFI_SIZE_TO_PAGES (mNumberOfProcessors * sizeof (EFI_SMM_CPU_SAVE_STATE));
324 IsHandled = FALSE;
325 if (((UINTN)mFrameworkSmst->CpuSaveState & ~(SIZE_2MB-1)) == (PFAddress & ~(SIZE_2MB-1))) {
326 if ((UINTN)mFrameworkSmst->CpuSaveState <= PFAddress &&
327 PFAddress < (UINTN)mFrameworkSmst->CpuSaveState + EFI_PAGES_TO_SIZE (NumCpuStatePages)
328 ) {
329 mCpuStatePageTable[BitFieldRead64 (PFAddress, 12, 20)] |= BIT0 | BIT1; // present and rw
330 CpuFlushTlb ();
331 ReadWriteCpuStatePage (PFAddress & ~(SIZE_4KB-1), TRUE);
332 IsHandled = TRUE;
333 } else {
334 ASSERT (FALSE);
335 }
336 }
337
338 ReleaseSpinLock (&mPFLock);
339 return IsHandled;
340 }
341
342 /**
343 Write back the dirty Framework CpuSaveStates to PI.
344
345 The function scans the page table for dirty pages in mFrameworkSmst->CpuSaveState
346 to write back to PI CpuSaveStates. It is meant to be called on each SmmBaseHelper SMI
347 callback after Framework handler is called.
348
349 **/
350 VOID
351 WriteBackDirtyPages (
352 VOID
353 )
354 {
355 UINTN NumCpuStatePages;
356 UINTN PTIndex;
357 UINTN PTStartIndex;
358 UINTN PTEndIndex;
359
360 NumCpuStatePages = EFI_SIZE_TO_PAGES (mNumberOfProcessors * sizeof (EFI_SMM_CPU_SAVE_STATE));
361 PTStartIndex = (UINTN)BitFieldRead64 ((UINT64) (UINTN) mFrameworkSmst->CpuSaveState, 12, 20);
362 PTEndIndex = (UINTN)BitFieldRead64 ((UINT64) (UINTN) mFrameworkSmst->CpuSaveState + EFI_PAGES_TO_SIZE(NumCpuStatePages) - 1, 12, 20);
363 for (PTIndex = PTStartIndex; PTIndex <= PTEndIndex; PTIndex++) {
364 if ((mCpuStatePageTable[PTIndex] & (BIT0|BIT6)) == (BIT0|BIT6)) { // present and dirty?
365 ReadWriteCpuStatePage (mCpuStatePageTable[PTIndex] & mPhyMask, FALSE);
366 }
367 }
368 }
369
370 /**
371 Hook IDT with our page fault handler so that the on-demand paging works on page fault.
372
373 The function hooks the IDT with PageFaultHandlerHook to get on-demand paging work for
374 PI<->Framework CpuSaveStates marshalling. It also saves original handler for pass-through
375 purpose.
376
377 **/
378 VOID
379 HookPageFaultHandler (
380 VOID
381 )
382 {
383 IA32_DESCRIPTOR Idtr;
384 IA32_IDT_GATE_DESCRIPTOR *IdtGateDesc;
385 UINT32 OffsetUpper;
386
387 InitializeSpinLock (&mPFLock);
388
389 AsmReadIdtr (&Idtr);
390 IdtGateDesc = (IA32_IDT_GATE_DESCRIPTOR *) Idtr.Base;
391 OffsetUpper = *(UINT32*)((UINT64*)IdtGateDesc + 1);
392 mOriginalHandler = (VOID *)(UINTN)(LShiftU64 (OffsetUpper, 32) + IdtGateDesc[14].Bits.OffsetLow + (IdtGateDesc[14].Bits.OffsetHigh << 16));
393 IdtGateDesc[14].Bits.OffsetLow = (UINT32)((UINTN)PageFaultHandlerHook & ((1 << 16) - 1));
394 IdtGateDesc[14].Bits.OffsetHigh = (UINT32)(((UINTN)PageFaultHandlerHook >> 16) & ((1 << 16) - 1));
395 }
396
397 /**
398 Initialize page table for pages contain HookData.
399
400 The function initialize PDE for 2MB range that contains HookData. If the related PDE points
401 to a 2MB page, a page table will be allocated and initialized for 4KB pages. Otherwise we juse
402 use the original page table.
403
404 @param[in] HookData Based on which to initialize page table.
405
406 @return The pointer to a Page Table that points to 4KB pages which contain HookData.
407 **/
408 UINT64 *
409 InitCpuStatePageTable (
410 IN VOID *HookData
411 )
412 {
413 UINTN Index;
414 UINT64 *PageTable;
415 UINT64 *Pdpte;
416 UINT64 HookAddress;
417 UINT64 Pde;
418 UINT64 Address;
419
420 //
421 // Initialize physical address mask
422 // NOTE: Physical memory above virtual address limit is not supported !!!
423 //
424 AsmCpuid (0x80000008, (UINT32*)&Index, NULL, NULL, NULL);
425 mPhyMask = LShiftU64 (1, (UINT8)Index) - 1;
426 mPhyMask &= (1ull << 48) - EFI_PAGE_SIZE;
427
428 HookAddress = (UINT64)(UINTN)HookData;
429 PageTable = (UINT64 *)(UINTN)(AsmReadCr3 () & mPhyMask);
430 PageTable = (UINT64 *)(UINTN)(PageTable[BitFieldRead64 (HookAddress, 39, 47)] & mPhyMask);
431 PageTable = (UINT64 *)(UINTN)(PageTable[BitFieldRead64 (HookAddress, 30, 38)] & mPhyMask);
432
433 Pdpte = (UINT64 *)(UINTN)PageTable;
434 Pde = Pdpte[BitFieldRead64 (HookAddress, 21, 29)];
435 ASSERT ((Pde & BIT0) != 0); // Present and 2M Page
436
437 if ((Pde & BIT7) == 0) { // 4KB Page Directory
438 PageTable = (UINT64 *)(UINTN)(Pde & mPhyMask);
439 } else {
440 ASSERT ((Pde & mPhyMask) == (HookAddress & ~(SIZE_2MB-1))); // 2MB Page Point to HookAddress
441 PageTable = AllocatePages (1);
442 ASSERT (PageTable != NULL);
443 Address = HookAddress & ~(SIZE_2MB-1);
444 for (Index = 0; Index < 512; Index++) {
445 PageTable[Index] = Address | BIT0 | BIT1; // Present and RW
446 Address += SIZE_4KB;
447 }
448 Pdpte[BitFieldRead64 (HookAddress, 21, 29)] = (UINT64)(UINTN)PageTable | BIT0 | BIT1; // Present and RW
449 }
450 return PageTable;
451 }
452
453 /**
454 Mark all the CpuSaveStates as not present.
455
456 The function marks all CpuSaveStates memory range as not present so that page fault can be triggered
457 on CpuSaveStates access. It is meant to be called on each SmmBaseHelper SMI callback before Framework
458 handler is called.
459
460 @param[in] CpuSaveState The base of CpuSaveStates.
461
462 **/
463 VOID
464 HookCpuStateMemory (
465 IN EFI_SMM_CPU_SAVE_STATE *CpuSaveState
466 )
467 {
468 UINT64 Index;
469 UINT64 PTStartIndex;
470 UINT64 PTEndIndex;
471
472 PTStartIndex = BitFieldRead64 ((UINTN)CpuSaveState, 12, 20);
473 PTEndIndex = BitFieldRead64 ((UINTN)CpuSaveState + mNumberOfProcessors * sizeof (EFI_SMM_CPU_SAVE_STATE) - 1, 12, 20);
474 for (Index = PTStartIndex; Index <= PTEndIndex; Index++) {
475 mCpuStatePageTable[Index] &= ~(BIT0|BIT5|BIT6); // not present nor accessed nor dirty
476 }
477 }
478
479 /**
480 Framework SMST SmmInstallConfigurationTable() Thunk.
481
482 This thunk calls the PI SMM SmmInstallConfigurationTable() and then update the configuration
483 table related fields in the Framework SMST because the PI SMM SmmInstallConfigurationTable()
484 function may modify these fields.
485
486 @param[in] SystemTable A pointer to the SMM System Table.
487 @param[in] Guid A pointer to the GUID for the entry to add, update, or remove.
488 @param[in] Table A pointer to the buffer of the table to add.
489 @param[in] TableSize The size of the table to install.
490
491 @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
492 @retval EFI_INVALID_PARAMETER Guid is not valid.
493 @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.
494 @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
495 **/
496 EFI_STATUS
497 EFIAPI
498 SmmInstallConfigurationTable (
499 IN EFI_SMM_SYSTEM_TABLE *SystemTable,
500 IN EFI_GUID *Guid,
501 IN VOID *Table,
502 IN UINTN TableSize
503 )
504 {
505 EFI_STATUS Status;
506
507 Status = gSmst->SmmInstallConfigurationTable (gSmst, Guid, Table, TableSize);
508 if (!EFI_ERROR (Status)) {
509 mFrameworkSmst->NumberOfTableEntries = gSmst->NumberOfTableEntries;
510 mFrameworkSmst->SmmConfigurationTable = gSmst->SmmConfigurationTable;
511 }
512 return Status;
513 }
514
515 /**
516 Initialize all the stuff needed for on-demand paging hooks for PI<->Framework
517 CpuSaveStates marshalling.
518
519 @param[in] FrameworkSmst Framework SMM system table pointer.
520
521 **/
522 VOID
523 InitHook (
524 IN EFI_SMM_SYSTEM_TABLE *FrameworkSmst
525 )
526 {
527 UINTN NumCpuStatePages;
528 UINTN CpuStatePage;
529 UINTN Bottom2MPage;
530 UINTN Top2MPage;
531
532 mPageTableHookEnabled = FALSE;
533 NumCpuStatePages = EFI_SIZE_TO_PAGES (mNumberOfProcessors * sizeof (EFI_SMM_CPU_SAVE_STATE));
534 //
535 // Only hook page table for X64 image and less than 2MB needed to hold all CPU Save States
536 //
537 if (EFI_IMAGE_MACHINE_TYPE_SUPPORTED(EFI_IMAGE_MACHINE_X64) && NumCpuStatePages <= EFI_SIZE_TO_PAGES (SIZE_2MB)) {
538 //
539 // Allocate double page size to make sure all CPU Save States are in one 2MB page.
540 //
541 CpuStatePage = (UINTN)AllocatePages (NumCpuStatePages * 2);
542 ASSERT (CpuStatePage != 0);
543 Bottom2MPage = CpuStatePage & ~(SIZE_2MB-1);
544 Top2MPage = (CpuStatePage + EFI_PAGES_TO_SIZE (NumCpuStatePages * 2) - 1) & ~(SIZE_2MB-1);
545 if (Bottom2MPage == Top2MPage ||
546 CpuStatePage + EFI_PAGES_TO_SIZE (NumCpuStatePages * 2) - Top2MPage >= EFI_PAGES_TO_SIZE (NumCpuStatePages)
547 ) {
548 //
549 // If the allocated 4KB pages are within the same 2MB page or higher portion is larger, use higher portion pages.
550 //
551 FrameworkSmst->CpuSaveState = (EFI_SMM_CPU_SAVE_STATE *)(CpuStatePage + EFI_PAGES_TO_SIZE (NumCpuStatePages));
552 FreePages ((VOID*)CpuStatePage, NumCpuStatePages);
553 } else {
554 FrameworkSmst->CpuSaveState = (EFI_SMM_CPU_SAVE_STATE *)CpuStatePage;
555 FreePages ((VOID*)(CpuStatePage + EFI_PAGES_TO_SIZE (NumCpuStatePages)), NumCpuStatePages);
556 }
557 //
558 // Add temporary working buffer for hooking
559 //
560 mShadowSaveState = (EFI_SMM_CPU_SAVE_STATE*) AllocatePool (sizeof (EFI_SMM_CPU_SAVE_STATE));
561 ASSERT (mShadowSaveState != NULL);
562 //
563 // Allocate and initialize 4KB Page Table for hooking CpuSaveState.
564 // Replace the original 2MB PDE with new 4KB page table.
565 //
566 mCpuStatePageTable = InitCpuStatePageTable (FrameworkSmst->CpuSaveState);
567 //
568 // Mark PTE for CpuSaveState as non-exist.
569 //
570 HookCpuStateMemory (FrameworkSmst->CpuSaveState);
571 HookPageFaultHandler ();
572 CpuFlushTlb ();
573 mPageTableHookEnabled = TRUE;
574 }
575 mHookInitialized = TRUE;
576 }
577
578 /**
579 Construct a Framework SMST based on the PI SMM SMST.
580
581 @return Pointer to the constructed Framework SMST.
582 **/
583 EFI_SMM_SYSTEM_TABLE *
584 ConstructFrameworkSmst (
585 VOID
586 )
587 {
588 EFI_SMM_SYSTEM_TABLE *FrameworkSmst;
589
590 FrameworkSmst = (EFI_SMM_SYSTEM_TABLE *)AllocatePool (sizeof (EFI_SMM_SYSTEM_TABLE));
591 ASSERT (FrameworkSmst != NULL);
592
593 ///
594 /// Copy same things from PI SMST to Framework SMST
595 ///
596 CopyMem (FrameworkSmst, gSmst, (UINTN)(&((EFI_SMM_SYSTEM_TABLE *)0)->SmmIo));
597 CopyMem (
598 &FrameworkSmst->SmmIo,
599 &gSmst->SmmIo,
600 sizeof (EFI_SMM_SYSTEM_TABLE) - (UINTN)(&((EFI_SMM_SYSTEM_TABLE *)0)->SmmIo)
601 );
602
603 ///
604 /// Update Framework SMST
605 ///
606 FrameworkSmst->Hdr.Revision = EFI_SMM_SYSTEM_TABLE_REVISION;
607 CopyGuid (&FrameworkSmst->EfiSmmCpuIoGuid, &mEfiSmmCpuIoGuid);
608
609 mHookInitialized = FALSE;
610 FrameworkSmst->CpuSaveState = (EFI_SMM_CPU_SAVE_STATE *)AllocateZeroPool (mNumberOfProcessors * sizeof (EFI_SMM_CPU_SAVE_STATE));
611 ASSERT (FrameworkSmst->CpuSaveState != NULL);
612
613 ///
614 /// Do not support floating point state now
615 ///
616 FrameworkSmst->CpuOptionalFloatingPointState = NULL;
617
618 FrameworkSmst->SmmInstallConfigurationTable = SmmInstallConfigurationTable;
619
620 return FrameworkSmst;
621 }
622
623 /**
624 Load a given Framework SMM driver into SMRAM and invoke its entry point.
625
626 @param[in] ParentImageHandle Parent Image Handle.
627 @param[in] FilePath Location of the image to be installed as the handler.
628 @param[in] SourceBuffer Optional source buffer in case the image file
629 is in memory.
630 @param[in] SourceSize Size of the source image file, if in memory.
631 @param[out] ImageHandle The handle that the base driver uses to decode
632 the handler. Unique among SMM handlers only,
633 not unique across DXE/EFI.
634
635 @retval EFI_SUCCESS The operation was successful.
636 @retval EFI_OUT_OF_RESOURCES There were no additional SMRAM resources to load the handler
637 @retval EFI_UNSUPPORTED Can not find its copy in normal memory.
638 @retval EFI_INVALID_PARAMETER The handlers was not the correct image type
639 **/
640 EFI_STATUS
641 LoadImage (
642 IN EFI_HANDLE ParentImageHandle,
643 IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
644 IN VOID *SourceBuffer,
645 IN UINTN SourceSize,
646 OUT EFI_HANDLE *ImageHandle
647 )
648 {
649 EFI_STATUS Status;
650 UINTN PageCount;
651 UINTN OrgPageCount;
652 EFI_PHYSICAL_ADDRESS DstBuffer;
653
654 if (FilePath == NULL || ImageHandle == NULL) {
655 return EFI_INVALID_PARAMETER;
656 }
657
658 PageCount = 1;
659 do {
660 OrgPageCount = PageCount;
661 DstBuffer = (UINTN)-1;
662 Status = gSmst->SmmAllocatePages (
663 AllocateMaxAddress,
664 EfiRuntimeServicesCode,
665 PageCount,
666 &DstBuffer
667 );
668 if (EFI_ERROR (Status)) {
669 return Status;
670 }
671
672 Status = mLoadPe32Image->LoadPeImage (
673 mLoadPe32Image,
674 ParentImageHandle,
675 FilePath,
676 SourceBuffer,
677 SourceSize,
678 DstBuffer,
679 &PageCount,
680 ImageHandle,
681 NULL,
682 EFI_LOAD_PE_IMAGE_ATTRIBUTE_NONE
683 );
684 if (EFI_ERROR (Status)) {
685 FreePages ((VOID *)(UINTN)DstBuffer, OrgPageCount);
686 }
687 } while (Status == EFI_BUFFER_TOO_SMALL);
688
689 if (!EFI_ERROR (Status)) {
690 ///
691 /// Update MP state in Framework SMST before transferring control to Framework SMM driver entry point
692 ///
693 mFrameworkSmst->SmmStartupThisAp = gSmst->SmmStartupThisAp;
694 mFrameworkSmst->NumberOfCpus = mNumberOfProcessors;
695 mFrameworkSmst->CurrentlyExecutingCpu = gSmst->CurrentlyExecutingCpu;
696
697 Status = gBS->StartImage (*ImageHandle, NULL, NULL);
698 if (EFI_ERROR (Status)) {
699 mLoadPe32Image->UnLoadPeImage (mLoadPe32Image, *ImageHandle);
700 *ImageHandle = NULL;
701 FreePages ((VOID *)(UINTN)DstBuffer, PageCount);
702 }
703 }
704
705 return Status;
706 }
707
708 /**
709 This function check if the address is in SMRAM.
710
711 @param Buffer the buffer address to be checked.
712 @param Length the buffer length to be checked.
713
714 @retval TRUE this address is in SMRAM.
715 @retval FALSE this address is NOT in SMRAM.
716 **/
717 BOOLEAN
718 IsAddressInSmram (
719 IN EFI_PHYSICAL_ADDRESS Buffer,
720 IN UINT64 Length
721 )
722 {
723 UINTN Index;
724
725 for (Index = 0; Index < mSmramRangeCount; Index ++) {
726 if (((Buffer >= mSmramRanges[Index].CpuStart) && (Buffer < mSmramRanges[Index].CpuStart + mSmramRanges[Index].PhysicalSize)) ||
727 ((mSmramRanges[Index].CpuStart >= Buffer) && (mSmramRanges[Index].CpuStart < Buffer + Length))) {
728 return TRUE;
729 }
730 }
731
732 return FALSE;
733 }
734
735 /**
736 This function check if the address refered by Buffer and Length is valid.
737
738 @param Buffer the buffer address to be checked.
739 @param Length the buffer length to be checked.
740
741 @retval TRUE this address is valid.
742 @retval FALSE this address is NOT valid.
743 **/
744 BOOLEAN
745 IsAddressValid (
746 IN UINTN Buffer,
747 IN UINTN Length
748 )
749 {
750 if (Buffer > (MAX_ADDRESS - Length)) {
751 //
752 // Overflow happen
753 //
754 return FALSE;
755 }
756 if (IsAddressInSmram ((EFI_PHYSICAL_ADDRESS)Buffer, (UINT64)Length)) {
757 return FALSE;
758 }
759 return TRUE;
760 }
761
762 /**
763 Thunk service of EFI_SMM_BASE_PROTOCOL.Register().
764
765 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
766 **/
767 VOID
768 Register (
769 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
770 )
771 {
772 EFI_STATUS Status;
773
774 if (mLocked || FunctionData->Args.Register.LegacyIA32Binary) {
775 Status = EFI_UNSUPPORTED;
776 } else {
777 Status = LoadImage (
778 FunctionData->SmmBaseImageHandle,
779 FunctionData->Args.Register.FilePath,
780 FunctionData->Args.Register.SourceBuffer,
781 FunctionData->Args.Register.SourceSize,
782 FunctionData->Args.Register.ImageHandle
783 );
784 }
785 FunctionData->Status = Status;
786 }
787
788 /**
789 Thunk service of EFI_SMM_BASE_PROTOCOL.UnRegister().
790
791 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
792 **/
793 VOID
794 UnRegister (
795 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
796 )
797 {
798 ///
799 /// Unregister not supported now
800 ///
801 FunctionData->Status = EFI_UNSUPPORTED;
802 }
803
804 /**
805 Search for Framework SMI handler information according to specific PI SMM dispatch handle.
806
807 @param[in] DispatchHandle The unique handle assigned by SmiHandlerRegister().
808
809 @return Pointer to CALLBACK_INFO. If NULL, no callback info record is found.
810 **/
811 CALLBACK_INFO *
812 GetCallbackInfo (
813 IN EFI_HANDLE DispatchHandle
814 )
815 {
816 LIST_ENTRY *Node;
817
818 Node = GetFirstNode (&mCallbackInfoListHead);
819 while (!IsNull (&mCallbackInfoListHead, Node)) {
820 if (((CALLBACK_INFO *)Node)->DispatchHandle == DispatchHandle) {
821 return (CALLBACK_INFO *)Node;
822 }
823 Node = GetNextNode (&mCallbackInfoListHead, Node);
824 }
825 return NULL;
826 }
827
828 /**
829 Callback thunk for Framework SMI handler.
830
831 This thunk functions calls the Framework SMI handler and converts the return value
832 defined from Framework SMI handlers to a correpsonding return value defined by PI SMM.
833
834 @param[in] DispatchHandle The unique handle assigned to this handler by SmiHandlerRegister().
835 @param[in] Context Points to an optional handler context which was specified when the
836 handler was registered.
837 @param[in, out] CommBuffer A pointer to a collection of data in memory that will
838 be conveyed from a non-SMM environment into an SMM environment.
839 @param[in, out] CommBufferSize The size of the CommBuffer.
840
841 @retval EFI_SUCCESS The interrupt was handled and quiesced. No other handlers
842 should still be called.
843 @retval EFI_WARN_INTERRUPT_SOURCE_QUIESCED The interrupt has been quiesced but other handlers should
844 still be called.
845 @retval EFI_WARN_INTERRUPT_SOURCE_PENDING The interrupt is still pending and other handlers should still
846 be called.
847 @retval EFI_INTERRUPT_PENDING The interrupt could not be quiesced.
848 **/
849 EFI_STATUS
850 EFIAPI
851 CallbackThunk (
852 IN EFI_HANDLE DispatchHandle,
853 IN CONST VOID *Context OPTIONAL,
854 IN OUT VOID *CommBuffer OPTIONAL,
855 IN OUT UINTN *CommBufferSize OPTIONAL
856 )
857 {
858 EFI_STATUS Status;
859 CALLBACK_INFO *CallbackInfo;
860 UINTN CpuIndex;
861
862 ///
863 /// Before transferring the control into the Framework SMI handler, update CPU Save States
864 /// and MP states in the Framework SMST.
865 ///
866
867 if (!mHookInitialized) {
868 InitHook (mFrameworkSmst);
869 }
870 if (mPageTableHookEnabled) {
871 HookCpuStateMemory (mFrameworkSmst->CpuSaveState);
872 CpuFlushTlb ();
873 } else {
874 for (CpuIndex = 0; CpuIndex < mNumberOfProcessors; CpuIndex++) {
875 ReadCpuSaveState (CpuIndex, NULL);
876 }
877 }
878
879 mFrameworkSmst->SmmStartupThisAp = gSmst->SmmStartupThisAp;
880 mFrameworkSmst->NumberOfCpus = mNumberOfProcessors;
881 mFrameworkSmst->CurrentlyExecutingCpu = gSmst->CurrentlyExecutingCpu;
882
883 ///
884 /// Search for Framework SMI handler information
885 ///
886 CallbackInfo = GetCallbackInfo (DispatchHandle);
887 ASSERT (CallbackInfo != NULL);
888
889 ///
890 /// Thunk into original Framwork SMI handler
891 ///
892 Status = (CallbackInfo->CallbackAddress) (
893 CallbackInfo->SmmImageHandle,
894 CallbackInfo->CommunicationBuffer,
895 CallbackInfo->SourceSize
896 );
897 ///
898 /// Save CPU Save States in case any of them was modified
899 ///
900 if (mPageTableHookEnabled) {
901 WriteBackDirtyPages ();
902 } else {
903 for (CpuIndex = 0; CpuIndex < mNumberOfProcessors; CpuIndex++) {
904 WriteCpuSaveState (CpuIndex, NULL);
905 }
906 }
907
908 ///
909 /// Conversion of returned status code
910 ///
911 switch (Status) {
912 case EFI_HANDLER_SUCCESS:
913 Status = EFI_WARN_INTERRUPT_SOURCE_QUIESCED;
914 break;
915 case EFI_HANDLER_CRITICAL_EXIT:
916 case EFI_HANDLER_SOURCE_QUIESCED:
917 Status = EFI_SUCCESS;
918 break;
919 case EFI_HANDLER_SOURCE_PENDING:
920 Status = EFI_WARN_INTERRUPT_SOURCE_PENDING;
921 break;
922 }
923 return Status;
924 }
925
926 /**
927 Thunk service of EFI_SMM_BASE_PROTOCOL.RegisterCallback().
928
929 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
930 **/
931 VOID
932 RegisterCallback (
933 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
934 )
935 {
936 CALLBACK_INFO *Buffer;
937
938 if (mLocked) {
939 FunctionData->Status = EFI_UNSUPPORTED;
940 return;
941 }
942
943 ///
944 /// Note that MakeLast and FloatingPointSave options are not supported in PI SMM
945 ///
946
947 ///
948 /// Allocate buffer for callback thunk information
949 ///
950 Buffer = (CALLBACK_INFO *)AllocateZeroPool (sizeof (CALLBACK_INFO));
951 if (Buffer == NULL) {
952 FunctionData->Status = EFI_OUT_OF_RESOURCES;
953 return;
954 }
955
956 ///
957 /// Fill SmmImageHandle and CallbackAddress into the thunk
958 ///
959 Buffer->SmmImageHandle = FunctionData->Args.RegisterCallback.SmmImageHandle;
960 Buffer->CallbackAddress = FunctionData->Args.RegisterCallback.CallbackAddress;
961
962 ///
963 /// Register the thunk code as a root SMI handler
964 ///
965 FunctionData->Status = gSmst->SmiHandlerRegister (
966 CallbackThunk,
967 NULL,
968 &Buffer->DispatchHandle
969 );
970 if (EFI_ERROR (FunctionData->Status)) {
971 FreePool (Buffer);
972 return;
973 }
974
975 ///
976 /// Save this callback info
977 ///
978 InsertTailList (&mCallbackInfoListHead, &Buffer->Link);
979 }
980
981
982 /**
983 Thunk service of EFI_SMM_BASE_PROTOCOL.SmmAllocatePool().
984
985 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
986 **/
987 VOID
988 HelperAllocatePool (
989 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
990 )
991 {
992 if (mLocked) {
993 FunctionData->Status = EFI_UNSUPPORTED;
994 } else {
995 FunctionData->Status = gSmst->SmmAllocatePool (
996 FunctionData->Args.AllocatePool.PoolType,
997 FunctionData->Args.AllocatePool.Size,
998 FunctionData->Args.AllocatePool.Buffer
999 );
1000 }
1001 }
1002
1003 /**
1004 Thunk service of EFI_SMM_BASE_PROTOCOL.SmmFreePool().
1005
1006 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
1007 **/
1008 VOID
1009 HelperFreePool (
1010 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
1011 )
1012 {
1013 if (mLocked) {
1014 FunctionData->Status = EFI_UNSUPPORTED;
1015 } else {
1016 FreePool (FunctionData->Args.FreePool.Buffer);
1017 FunctionData->Status = EFI_SUCCESS;
1018 }
1019 }
1020
1021 /**
1022 Thunk service of EFI_SMM_BASE_PROTOCOL.Communicate().
1023
1024 @param[in, out] FunctionData Pointer to SMMBASE_FUNCTION_DATA.
1025 **/
1026 VOID
1027 HelperCommunicate (
1028 IN OUT SMMBASE_FUNCTION_DATA *FunctionData
1029 )
1030 {
1031 LIST_ENTRY *Node;
1032 CALLBACK_INFO *CallbackInfo;
1033
1034 if (FunctionData->Args.Communicate.CommunicationBuffer == NULL) {
1035 FunctionData->Status = EFI_INVALID_PARAMETER;
1036 return;
1037 }
1038
1039 Node = GetFirstNode (&mCallbackInfoListHead);
1040 while (!IsNull (&mCallbackInfoListHead, Node)) {
1041 CallbackInfo = (CALLBACK_INFO *)Node;
1042
1043 if (FunctionData->Args.Communicate.ImageHandle == CallbackInfo->SmmImageHandle) {
1044 CallbackInfo->CommunicationBuffer = FunctionData->Args.Communicate.CommunicationBuffer;
1045 CallbackInfo->SourceSize = FunctionData->Args.Communicate.SourceSize;
1046
1047 ///
1048 /// The message was successfully posted.
1049 ///
1050 FunctionData->Status = EFI_SUCCESS;
1051 return;
1052 }
1053 Node = GetNextNode (&mCallbackInfoListHead, Node);
1054 }
1055
1056 FunctionData->Status = EFI_INVALID_PARAMETER;
1057 }
1058
1059 /**
1060 Communication service SMI Handler entry.
1061
1062 This SMI handler provides services for the SMM Base Thunk driver.
1063
1064 Caution: This function may receive untrusted input during runtime.
1065 The communicate buffer is external input, so this function will do operations only if the communicate
1066 buffer is outside of SMRAM so that returning the status code in the buffer won't overwrite anywhere in SMRAM.
1067
1068 @param[in] DispatchHandle The unique handle assigned to this handler by SmiHandlerRegister().
1069 @param[in] RegisterContext Points to an optional handler context which was specified when the
1070 handler was registered.
1071 @param[in, out] CommBuffer A pointer to a collection of data in memory that will
1072 be conveyed from a non-SMM environment into an SMM environment.
1073 @param[in, out] CommBufferSize The size of the CommBuffer.
1074
1075 @retval EFI_SUCCESS The interrupt was handled and quiesced. No other handlers
1076 should still be called.
1077 @retval EFI_WARN_INTERRUPT_SOURCE_QUIESCED The interrupt has been quiesced but other handlers should
1078 still be called.
1079 @retval EFI_WARN_INTERRUPT_SOURCE_PENDING The interrupt is still pending and other handlers should still
1080 be called.
1081 @retval EFI_INTERRUPT_PENDING The interrupt could not be quiesced.
1082 **/
1083 EFI_STATUS
1084 EFIAPI
1085 SmmHandlerEntry (
1086 IN EFI_HANDLE DispatchHandle,
1087 IN CONST VOID *RegisterContext,
1088 IN OUT VOID *CommBuffer,
1089 IN OUT UINTN *CommBufferSize
1090 )
1091 {
1092 SMMBASE_FUNCTION_DATA *FunctionData;
1093
1094 ASSERT (CommBuffer != NULL);
1095 ASSERT (CommBufferSize != NULL);
1096
1097 if (*CommBufferSize == sizeof (SMMBASE_FUNCTION_DATA) &&
1098 IsAddressValid ((UINTN)CommBuffer, *CommBufferSize)) {
1099 FunctionData = (SMMBASE_FUNCTION_DATA *)CommBuffer;
1100
1101 switch (FunctionData->Function) {
1102 case SmmBaseFunctionRegister:
1103 Register (FunctionData);
1104 break;
1105 case SmmBaseFunctionUnregister:
1106 UnRegister (FunctionData);
1107 break;
1108 case SmmBaseFunctionRegisterCallback:
1109 RegisterCallback (FunctionData);
1110 break;
1111 case SmmBaseFunctionAllocatePool:
1112 HelperAllocatePool (FunctionData);
1113 break;
1114 case SmmBaseFunctionFreePool:
1115 HelperFreePool (FunctionData);
1116 break;
1117 case SmmBaseFunctionCommunicate:
1118 HelperCommunicate (FunctionData);
1119 break;
1120 default:
1121 DEBUG ((EFI_D_WARN, "SmmBaseHelper: invalid SMM Base function.\n"));
1122 FunctionData->Status = EFI_UNSUPPORTED;
1123 }
1124 }
1125 return EFI_SUCCESS;
1126 }
1127
1128 /**
1129 Smm Ready To Lock event notification handler.
1130
1131 It sets a flag indicating that SMRAM has been locked.
1132
1133 @param[in] Protocol Points to the protocol's unique identifier.
1134 @param[in] Interface Points to the interface instance.
1135 @param[in] Handle The handle on which the interface was installed.
1136
1137 @retval EFI_SUCCESS Notification handler runs successfully.
1138 **/
1139 EFI_STATUS
1140 EFIAPI
1141 SmmReadyToLockEventNotify (
1142 IN CONST EFI_GUID *Protocol,
1143 IN VOID *Interface,
1144 IN EFI_HANDLE Handle
1145 )
1146 {
1147 mLocked = TRUE;
1148 return EFI_SUCCESS;
1149 }
1150
1151 /**
1152 Entry point function of the SMM Base Helper SMM driver.
1153
1154 @param[in] ImageHandle The firmware allocated handle for the EFI image.
1155 @param[in] SystemTable A pointer to the EFI System Table.
1156
1157 @retval EFI_SUCCESS The entry point is executed successfully.
1158 @retval other Some error occurs when executing this entry point.
1159 **/
1160 EFI_STATUS
1161 EFIAPI
1162 SmmBaseHelperMain (
1163 IN EFI_HANDLE ImageHandle,
1164 IN EFI_SYSTEM_TABLE *SystemTable
1165 )
1166 {
1167 EFI_STATUS Status;
1168 EFI_MP_SERVICES_PROTOCOL *MpServices;
1169 EFI_HANDLE Handle;
1170 UINTN NumberOfEnabledProcessors;
1171 VOID *Registration;
1172 EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;
1173 UINTN Size;
1174
1175 Handle = NULL;
1176 ///
1177 /// Locate SMM CPU Protocol which is used later to retrieve/update CPU Save States
1178 ///
1179 Status = gSmst->SmmLocateProtocol (&gEfiSmmCpuProtocolGuid, NULL, (VOID **) &mSmmCpu);
1180 ASSERT_EFI_ERROR (Status);
1181
1182 ///
1183 /// Locate PE32 Image Protocol which is used later to load Framework SMM driver
1184 ///
1185 Status = SystemTable->BootServices->LocateProtocol (&gEfiLoadPeImageProtocolGuid, NULL, (VOID **) &mLoadPe32Image);
1186 ASSERT_EFI_ERROR (Status);
1187
1188 //
1189 // Get MP Services Protocol
1190 //
1191 Status = SystemTable->BootServices->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpServices);
1192 ASSERT_EFI_ERROR (Status);
1193
1194 //
1195 // Use MP Services Protocol to retrieve the number of processors and number of enabled processors
1196 //
1197 Status = MpServices->GetNumberOfProcessors (MpServices, &mNumberOfProcessors, &NumberOfEnabledProcessors);
1198 ASSERT_EFI_ERROR (Status);
1199
1200 ///
1201 /// Interface structure of SMM BASE Helper Ready Protocol is allocated from UEFI pool
1202 /// instead of SMM pool so that SMM Base Thunk driver can access it in Non-SMM mode.
1203 ///
1204 Status = gBS->AllocatePool (
1205 EfiBootServicesData,
1206 sizeof (EFI_SMM_BASE_HELPER_READY_PROTOCOL),
1207 (VOID **)&mSmmBaseHelperReady
1208 );
1209 ASSERT_EFI_ERROR (Status);
1210
1211 ///
1212 /// Construct Framework SMST from PI SMST
1213 ///
1214 mFrameworkSmst = ConstructFrameworkSmst ();
1215 mSmmBaseHelperReady->FrameworkSmst = mFrameworkSmst;
1216 mSmmBaseHelperReady->ServiceEntry = SmmHandlerEntry;
1217
1218 //
1219 // Get SMRAM information
1220 //
1221 Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **)&SmmAccess);
1222 ASSERT_EFI_ERROR (Status);
1223
1224 Size = 0;
1225 Status = SmmAccess->GetCapabilities (SmmAccess, &Size, NULL);
1226 ASSERT (Status == EFI_BUFFER_TOO_SMALL);
1227
1228 Status = gSmst->SmmAllocatePool (
1229 EfiRuntimeServicesData,
1230 Size,
1231 (VOID **)&mSmramRanges
1232 );
1233 ASSERT_EFI_ERROR (Status);
1234
1235 Status = SmmAccess->GetCapabilities (SmmAccess, &Size, mSmramRanges);
1236 ASSERT_EFI_ERROR (Status);
1237
1238 mSmramRangeCount = Size / sizeof (EFI_SMRAM_DESCRIPTOR);
1239
1240 //
1241 // Register SMM Ready To Lock Protocol notification
1242 //
1243 Status = gSmst->SmmRegisterProtocolNotify (
1244 &gEfiSmmReadyToLockProtocolGuid,
1245 SmmReadyToLockEventNotify,
1246 &Registration
1247 );
1248 ASSERT_EFI_ERROR (Status);
1249
1250 ///
1251 /// Register SMM Base Helper services for SMM Base Thunk driver
1252 ///
1253 Status = gSmst->SmiHandlerRegister (SmmHandlerEntry, &gEfiSmmBaseThunkCommunicationGuid, &mDispatchHandle);
1254 ASSERT_EFI_ERROR (Status);
1255
1256 ///
1257 /// Install EFI SMM Base Helper Protocol in the UEFI handle database
1258 ///
1259 Status = gBS->InstallProtocolInterface (
1260 &Handle,
1261 &gEfiSmmBaseHelperReadyProtocolGuid,
1262 EFI_NATIVE_INTERFACE,
1263 mSmmBaseHelperReady
1264 );
1265 ASSERT_EFI_ERROR (Status);
1266
1267 return Status;
1268 }
1269