EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/CpuIA32.h

   1 /*++
   2
   3 Copyright (c) 2004 - 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   CpuIA32.h
  15
  16 Abstract:
  17
  18 --*/
  19
  20 #ifndef _CPU_IA32_H
  21 #define _CPU_IA32_H
  22
  23 #include "Tiano.h"
  24
  25 #define IA32API __cdecl
  26
  27 typedef struct {
  28   UINT32  RegEax;
  29   UINT32  RegEbx;
  30   UINT32  RegEcx;
  31   UINT32  RegEdx;
  32 } EFI_CPUID_REGISTER;
  33
  34 typedef struct {
  35   UINT32  HeaderVersion;
  36   UINT32  UpdateRevision;
  37   UINT32  Date;
  38   UINT32  ProcessorId;
  39   UINT32  Checksum;
  40   UINT32  LoaderRevision;
  41   UINT32  ProcessorFlags;
  42   UINT32  DataSize;
  43   UINT32  TotalSize;
  44   UINT8   Reserved[12];
  45 } EFI_CPU_MICROCODE_HEADER;
  46
  47 typedef struct {
  48   UINT32  ExtendedSignatureCount;
  49   UINT32  ExtendedTableChecksum;
  50   UINT8   Reserved[12];
  51 } EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
  52
  53 typedef struct {
  54   UINT32  ProcessorSignature;
  55   UINT32  ProcessorFlag;
  56   UINT32  ProcessorChecksum;
  57 } EFI_CPU_MICROCODE_EXTENDED_TABLE;
  58
  59 typedef struct {
  60   UINT32  Stepping       : 4;
  61   UINT32  Model          : 4;
  62   UINT32  Family         : 4;
  63   UINT32  Type           : 2;
  64   UINT32  Reserved1      : 2;
  65   UINT32  ExtendedModel  : 4;
  66   UINT32  ExtendedFamily : 8;
  67   UINT32  Reserved2      : 4;
  68 } EFI_CPU_VERSION;
  69
  70 #define EFI_CPUID_SIGNATURE                   0x0
  71 #define EFI_CPUID_VERSION_INFO                0x1
  72 #define EFI_CPUID_CACHE_INFO                  0x2
  73 #define EFI_CPUID_SERIAL_NUMBER               0x3
  74 #define EFI_CPUID_EXTENDED_FUNCTION           0x80000000
  75 #define EFI_CPUID_EXTENDED_CPU_SIG            0x80000001
  76 #define EFI_CPUID_BRAND_STRING1               0x80000002
  77 #define EFI_CPUID_BRAND_STRING2               0x80000003
  78 #define EFI_CPUID_BRAND_STRING3               0x80000004
  79
  80 #define EFI_MSR_IA32_PLATFORM_ID              0x17
  81 #define EFI_MSR_IA32_APIC_BASE                0x1B
  82 #define EFI_MSR_EBC_HARD_POWERON              0x2A
  83 #define EFI_MSR_EBC_SOFT_POWERON              0x2B
  84 #define BINIT_DRIVER_DISABLE                  0x40
  85 #define INTERNAL_MCERR_DISABLE                0x20
  86 #define INITIATOR_MCERR_DISABLE               0x10
  87 #define EFI_MSR_EBC_FREQUENCY_ID              0x2C
  88 #define EFI_MSR_IA32_BIOS_UPDT_TRIG           0x79
  89 #define EFI_MSR_IA32_BIOS_SIGN_ID             0x8B
  90 #define EFI_MSR_PSB_CLOCK_STATUS              0xCD
  91 #define EFI_APIC_GLOBAL_ENABLE                0x800
  92 #define EFI_MSR_IA32_MISC_ENABLE              0x1A0
  93 #define LIMIT_CPUID_MAXVAL_ENABLE_BIT         0x00400000
  94 #define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT  0x00000008
  95 #define COMPATIBLE_FPU_OPCODE_ENABLE_BIT      0x00000004
  96 #define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
  97 #define FAST_STRING_ENABLE_BIT                0x00000001
  98
  99 #define EFI_CACHE_VARIABLE_MTRR_BASE          0x200
 100 #define EFI_CACHE_VARIABLE_MTRR_END           0x20F
 101 #define EFI_CACHE_IA32_MTRR_DEF_TYPE          0x2FF
 102 #define EFI_CACHE_MTRR_VALID                  0x800
 103 #define EFI_CACHE_FIXED_MTRR_VALID            0x400
 104 #define EFI_CACHE_VALID_ADDRESS               0xFFFFFF000
 105 #define EFI_MSR_VALID_MASK                    0xFFFFFFFFF
 106 #define EFI_CACHE_VALID_EXTENDED_ADDRESS      0xFFFFFFFFFF000
 107 #define EFI_MSR_VALID_EXTENDED_MASK           0xFFFFFFFFFFFFF
 108
 109 #define EFI_IA32_MTRR_FIX64K_00000            0x250
 110 #define EFI_IA32_MTRR_FIX16K_80000            0x258
 111 #define EFI_IA32_MTRR_FIX16K_A0000            0x259
 112 #define EFI_IA32_MTRR_FIX4K_C0000             0x268
 113 #define EFI_IA32_MTRR_FIX4K_C8000             0x269
 114 #define EFI_IA32_MTRR_FIX4K_D0000             0x26A
 115 #define EFI_IA32_MTRR_FIX4K_D8000             0x26B
 116 #define EFI_IA32_MTRR_FIX4K_E0000             0x26C
 117 #define EFI_IA32_MTRR_FIX4K_E8000             0x26D
 118 #define EFI_IA32_MTRR_FIX4K_F0000             0x26E
 119 #define EFI_IA32_MTRR_FIX4K_F8000             0x26F
 120
 121 #define EFI_IA32_MCG_CAP                      0x179
 122 #define EFI_IA32_MCG_CTL                      0x17B
 123 #define EFI_IA32_MC0_CTL                      0x400
 124 #define EFI_IA32_MC0_STATUS                   0x401
 125
 126 #define EFI_IA32_PERF_STATUS                  0x198
 127 #define EFI_IA32_PERF_CTL                     0x199
 128
 129 #define EFI_CACHE_UNCACHEABLE                 0
 130 #define EFI_CACHE_WRITECOMBINING              1
 131 #define EFI_CACHE_WRITETHROUGH                4
 132 #define EFI_CACHE_WRITEPROTECTED              5
 133 #define EFI_CACHE_WRITEBACK                   6
 134
 135 //
 136 // Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
 137 //
 138 #define EfiMakeCpuVersion(f, m, s)         \
 139   (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
 140
 141 VOID
 142 IA32API
 143 EfiHalt (
 144   VOID
 145   );
 146
 147 /*++
 148 Routine Description:
 149   Halt the Cpu
 150 Arguments:
 151    None
 152 Returns:
 153    None
 154 --*/
 155 VOID
 156 IA32API
 157 EfiWbinvd (
 158   VOID
 159   );
 160
 161 /*++
 162 Routine Description:
 163   Write back and invalidate the Cpu cache
 164 Arguments:
 165    None
 166 Returns:
 167    None
 168 --*/
 169 VOID
 170 IA32API
 171 EfiInvd (
 172   VOID
 173   );
 174
 175 /*++
 176 Routine Description:
 177   Invalidate the Cpu cache
 178 Arguments:
 179    None
 180 Returns:
 181    None
 182 --*/
 183 VOID
 184 IA32API
 185 EfiCpuid (
 186   IN  UINT32                 RegisterInEax,
 187   OUT EFI_CPUID_REGISTER     *Regs
 188   );
 189
 190 /*++
 191 Routine Description:
 192   Get the Cpu info by excute the CPUID instruction
 193 Arguments:
 194    RegisterInEax: -The input value to put into register EAX
 195    Regs:          -The Output value
 196 Returns:
 197    None
 198 --*/
 199
 200 VOID
 201 IA32API
 202 EfiCpuidExt (
 203   IN  UINT32                 RegisterInEax,
 204   IN  UINT32                 CacheLevel,
 205   OUT EFI_CPUID_REGISTER     *Regs
 206   )
 207 /*++
 208 Routine Description:
 209   When RegisterInEax != 4, the functionality is the same as EfiCpuid.
 210   When RegisterInEax == 4, the function return the deterministic cache
 211   parameters by excuting the CPUID instruction
 212 Arguments:
 213    RegisterInEax: - The input value to put into register EAX
 214    CacheLevel:      - The deterministic cache level
 215    Regs:          - The Output value
 216 Returns:
 217    None
 218 --*/
 219 ;
 220
 221 UINT64
 222 IA32API
 223 EfiReadMsr (
 224   IN UINT32     Index
 225   );
 226
 227 /*++
 228 Routine Description:
 229   Read Cpu MSR
 230 Arguments:
 231   Index: -The index value to select the register
 232
 233 Returns:
 234    Return the read data
 235 --*/
 236 VOID
 237 IA32API
 238 EfiWriteMsr (
 239   IN UINT32     Index,
 240   IN UINT64     Value
 241   );
 242
 243 /*++
 244 Routine Description:
 245   Write Cpu MSR
 246 Arguments:
 247   Index: -The index value to select the register
 248   Value: -The value to write to the selected register
 249 Returns:
 250    None
 251 --*/
 252 UINT64
 253 IA32API
 254 EfiReadTsc (
 255   VOID
 256   );
 257
 258 /*++
 259 Routine Description:
 260   Read Time stamp
 261 Arguments:
 262   None
 263 Returns:
 264    Return the read data
 265 --*/
 266 VOID
 267 IA32API
 268 EfiDisableCache (
 269   VOID
 270   );
 271
 272 /*++
 273 Routine Description:
 274   Writing back and invalidate the cache,then diable it
 275 Arguments:
 276   None
 277 Returns:
 278   None
 279 --*/
 280 VOID
 281 IA32API
 282 EfiEnableCache (
 283   VOID
 284   );
 285
 286 /*++
 287 Routine Description:
 288   Invalidate the cache,then Enable it
 289 Arguments:
 290   None
 291 Returns:
 292   None
 293 --*/
 294 UINT32
 295 IA32API
 296 EfiGetEflags (
 297   VOID
 298   );
 299
 300 /*++
 301 Routine Description:
 302   Get Eflags
 303 Arguments:
 304   None
 305 Returns:
 306   Return the Eflags value
 307 --*/
 308 VOID
 309 IA32API
 310 EfiDisableInterrupts (
 311   VOID
 312   );
 313
 314 /*++
 315 Routine Description:
 316   Disable Interrupts
 317 Arguments:
 318   None
 319 Returns:
 320   None
 321 --*/
 322 VOID
 323 IA32API
 324 EfiEnableInterrupts (
 325   VOID
 326   );
 327
 328 /*++
 329 Routine Description:
 330   Enable Interrupts
 331 Arguments:
 332   None
 333 Returns:
 334   None
 335 --*/
 336
 337
 338 VOID
 339 IA32API
 340 EfiCpuVersion (
 341   IN   UINT16  *FamilyId,    OPTIONAL
 342   IN   UINT8   *Model,       OPTIONAL
 343   IN   UINT8   *SteppingId,  OPTIONAL
 344   IN   UINT8   *Processor    OPTIONAL
 345   )
 346 /*++
 347
 348 Routine Description:
 349   Extract CPU detail version infomation
 350
 351 Arguments:
 352   FamilyId   - FamilyId, including ExtendedFamilyId
 353   Model      - Model, including ExtendedModel
 354   SteppingId - SteppingId
 355   Processor  - Processor
 356
 357 --*/
 358 ;
 359
 360 #endif