3 Copyright (c) 2004 - 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 Fixes Intel Itanium(TM) specific relocation types
25 #include "TianoCommon.h"
28 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \
29 Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
31 #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \
32 *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
33 ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
35 #define IMM64_IMM7B_INST_WORD_X 3
36 #define IMM64_IMM7B_SIZE_X 7
37 #define IMM64_IMM7B_INST_WORD_POS_X 4
38 #define IMM64_IMM7B_VAL_POS_X 0
40 #define IMM64_IMM9D_INST_WORD_X 3
41 #define IMM64_IMM9D_SIZE_X 9
42 #define IMM64_IMM9D_INST_WORD_POS_X 18
43 #define IMM64_IMM9D_VAL_POS_X 7
45 #define IMM64_IMM5C_INST_WORD_X 3
46 #define IMM64_IMM5C_SIZE_X 5
47 #define IMM64_IMM5C_INST_WORD_POS_X 13
48 #define IMM64_IMM5C_VAL_POS_X 16
50 #define IMM64_IC_INST_WORD_X 3
51 #define IMM64_IC_SIZE_X 1
52 #define IMM64_IC_INST_WORD_POS_X 12
53 #define IMM64_IC_VAL_POS_X 21
55 #define IMM64_IMM41a_INST_WORD_X 1
56 #define IMM64_IMM41a_SIZE_X 10
57 #define IMM64_IMM41a_INST_WORD_POS_X 14
58 #define IMM64_IMM41a_VAL_POS_X 22
60 #define IMM64_IMM41b_INST_WORD_X 1
61 #define IMM64_IMM41b_SIZE_X 8
62 #define IMM64_IMM41b_INST_WORD_POS_X 24
63 #define IMM64_IMM41b_VAL_POS_X 32
65 #define IMM64_IMM41c_INST_WORD_X 2
66 #define IMM64_IMM41c_SIZE_X 23
67 #define IMM64_IMM41c_INST_WORD_POS_X 0
68 #define IMM64_IMM41c_VAL_POS_X 40
70 #define IMM64_SIGN_INST_WORD_X 3
71 #define IMM64_SIGN_SIZE_X 1
72 #define IMM64_SIGN_INST_WORD_POS_X 27
73 #define IMM64_SIGN_VAL_POS_X 63
76 PeCoffLoaderRelocateImageEx (
79 IN OUT CHAR8
**FixupData
,
86 Performs an Itanium-based specific relocation fixup
90 Reloc - Pointer to the relocation record
92 Fixup - Pointer to the address to fix up
94 FixupData - Pointer to a buffer to log the fixups
96 Adjust - The offset to adjust the fixup
107 switch ((*Reloc
) >> 12) {
109 case EFI_IMAGE_REL_BASED_IA64_IMM64
:
112 // Align it to bundle address before fixing up the
113 // 64-bit immediate value of the movl instruction.
116 Fixup
= (CHAR8
*)((UINTN
) Fixup
& (UINTN
) ~(15));
117 FixupVal
= (UINT64
)0;
120 // Extract the lower 32 bits of IMM64 from bundle
123 (UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
,
125 IMM64_IMM7B_INST_WORD_POS_X
,
126 IMM64_IMM7B_VAL_POS_X
130 (UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
,
132 IMM64_IMM9D_INST_WORD_POS_X
,
133 IMM64_IMM9D_VAL_POS_X
137 (UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
,
139 IMM64_IMM5C_INST_WORD_POS_X
,
140 IMM64_IMM5C_VAL_POS_X
144 (UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
,
146 IMM64_IC_INST_WORD_POS_X
,
151 (UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
,
153 IMM64_IMM41a_INST_WORD_POS_X
,
154 IMM64_IMM41a_VAL_POS_X
158 // Update 64-bit address
163 // Insert IMM64 into bundle
166 ((UINT32
*)Fixup
+ IMM64_IMM7B_INST_WORD_X
),
168 IMM64_IMM7B_INST_WORD_POS_X
,
169 IMM64_IMM7B_VAL_POS_X
173 ((UINT32
*)Fixup
+ IMM64_IMM9D_INST_WORD_X
),
175 IMM64_IMM9D_INST_WORD_POS_X
,
176 IMM64_IMM9D_VAL_POS_X
180 ((UINT32
*)Fixup
+ IMM64_IMM5C_INST_WORD_X
),
182 IMM64_IMM5C_INST_WORD_POS_X
,
183 IMM64_IMM5C_VAL_POS_X
187 ((UINT32
*)Fixup
+ IMM64_IC_INST_WORD_X
),
189 IMM64_IC_INST_WORD_POS_X
,
194 ((UINT32
*)Fixup
+ IMM64_IMM41a_INST_WORD_X
),
196 IMM64_IMM41a_INST_WORD_POS_X
,
197 IMM64_IMM41a_VAL_POS_X
201 ((UINT32
*)Fixup
+ IMM64_IMM41b_INST_WORD_X
),
203 IMM64_IMM41b_INST_WORD_POS_X
,
204 IMM64_IMM41b_VAL_POS_X
208 ((UINT32
*)Fixup
+ IMM64_IMM41c_INST_WORD_X
),
210 IMM64_IMM41c_INST_WORD_POS_X
,
211 IMM64_IMM41c_VAL_POS_X
215 ((UINT32
*)Fixup
+ IMM64_SIGN_INST_WORD_X
),
217 IMM64_SIGN_INST_WORD_POS_X
,
221 F64
= (UINT64
*) Fixup
;
222 if (*FixupData
!= NULL
) {
223 *FixupData
= ALIGN_POINTER(*FixupData
, sizeof(UINT64
));
224 *(UINT64
*)(*FixupData
) = *F64
;
225 *FixupData
= *FixupData
+ sizeof(UINT64
);
230 return EFI_UNSUPPORTED
;
237 PeCoffLoaderImageFormatSupported (
243 Returns TRUE if the machine type of PE/COFF image is supported. Supported
244 does not mean the image can be executed it means the PE/COFF loader supports
245 loading and relocating of the image type. It's up to the caller to support
248 This function implies the basic PE/COFF loader/relocator supports IPF, EBC,
249 images. Calling the entry point in a correct mannor is up to the
250 consumer of this library.
254 Machine - Machine type from the PE Header.
258 TRUE - if this PE/COFF loader can load the image
259 FALSE - if this PE/COFF loader cannot load the image
263 if ((Machine
== EFI_IMAGE_MACHINE_IA64
) || (Machine
== EFI_IMAGE_MACHINE_EBC
)) {