3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 PciEnumeratorSupport.c
25 #include "PciEnumeratorSupport.h"
26 #include "PciCommand.h"
31 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
,
41 This routine is used to check whether the pci device is present
50 // TODO: PciRootBridgeIo - add argument and description to function comment
51 // TODO: Pci - add argument and description to function comment
52 // TODO: Bus - add argument and description to function comment
53 // TODO: Device - add argument and description to function comment
54 // TODO: Func - add argument and description to function comment
55 // TODO: EFI_SUCCESS - add return value to function comment
56 // TODO: EFI_NOT_FOUND - add return value to function comment
62 // Create PCI address map in terms of Bus, Device and Func
64 Address
= EFI_PCI_ADDRESS (Bus
, Device
, Func
, 0);
67 // Read the Vendor Id register
69 Status
= PciRootBridgeIo
->Pci
.Read (
77 if (!EFI_ERROR (Status
) && (Pci
->Hdr
).VendorId
!= 0xffff) {
80 // Read the entire config header for the device
83 Status
= PciRootBridgeIo
->Pci
.Read (
87 sizeof (PCI_TYPE00
) / sizeof (UINT32
),
98 PciPciDeviceInfoCollector (
99 IN PCI_IO_DEVICE
*Bridge
,
113 // TODO: Bridge - add argument and description to function comment
114 // TODO: StartBusNumber - add argument and description to function comment
115 // TODO: EFI_SUCCESS - add return value to function comment
122 PCI_IO_DEVICE
*PciIoDevice
;
123 EFI_PCI_IO_PROTOCOL
*PciIo
;
125 Status
= EFI_SUCCESS
;
128 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
130 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
133 // Check to see whether PCI device is present
136 Status
= PciDevicePresent (
137 Bridge
->PciRootBridgeIo
,
139 (UINT8
) StartBusNumber
,
144 if (!EFI_ERROR (Status
)) {
147 // Call back to host bridge function
149 PreprocessController (Bridge
, (UINT8
) StartBusNumber
, Device
, Func
, EfiPciBeforeResourceCollection
);
152 // Collect all the information about the PCI device discovered
154 Status
= PciSearchDevice (
157 (UINT8
) StartBusNumber
,
164 // Recursively scan PCI busses on the other side of PCI-PCI bridges
168 if (!EFI_ERROR (Status
) && (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
))) {
171 // If it is PPB, we need to get the secondary bus to continue the enumeration
173 PciIo
= &(PciIoDevice
->PciIo
);
175 Status
= PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint8
, 0x19, 1, &SecBus
);
177 if (EFI_ERROR (Status
)) {
182 // Get resource padding for PPB
184 GetResourcePaddingPpb (PciIoDevice
);
187 // Deep enumerate the next level bus
189 Status
= PciPciDeviceInfoCollector (
196 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
199 // Skip sub functions, this is not a multi function device
213 IN PCI_IO_DEVICE
*Bridge
,
218 OUT PCI_IO_DEVICE
**PciDevice
224 Search required device.
228 Bridge - A pointer to the PCI_IO_DEVICE.
229 Pci - A pointer to the PCI_TYPE00.
231 Device - Device number.
232 Func - Function number.
233 PciDevice - The Required pci device.
240 // TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
241 // TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
242 // TODO: EFI_SUCCESS - add return value to function comment
244 PCI_IO_DEVICE
*PciIoDevice
;
248 if (!IS_PCI_BRIDGE (Pci
)) {
250 if (IS_CARDBUS_BRIDGE (Pci
)) {
251 PciIoDevice
= GatherP2CInfo (
258 if (gFullEnumeration
) {
259 InitializeP2C (PciIoDevice
);
264 // Create private data for Pci Device
266 PciIoDevice
= GatherDeviceInfo (
279 // Create private data for PPB
281 PciIoDevice
= GatherPpbInfo (
290 // Special initialization for PPB including making the PPB quiet
292 if (gFullEnumeration
) {
293 InitializePpb (PciIoDevice
);
298 return EFI_OUT_OF_RESOURCES
;
302 // Update the bar information for this PCI device so as to support some specific device
304 UpdatePciInfo (PciIoDevice
);
306 if (PciIoDevice
->DevicePath
== NULL
) {
307 return EFI_OUT_OF_RESOURCES
;
311 // Detect this function has option rom
313 if (gFullEnumeration
) {
315 if (!IS_CARDBUS_BRIDGE (Pci
)) {
317 GetOpRomInfo (PciIoDevice
);
321 ResetPowerManagementFeature (PciIoDevice
);
326 // Insert it into a global tree for future reference
328 InsertPciDevice (Bridge
, PciIoDevice
);
331 // Determine PCI device attributes
334 if (PciDevice
!= NULL
) {
335 *PciDevice
= PciIoDevice
;
343 IN PCI_IO_DEVICE
*Bridge
,
360 // TODO: Bridge - add argument and description to function comment
361 // TODO: Pci - add argument and description to function comment
362 // TODO: Bus - add argument and description to function comment
363 // TODO: Device - add argument and description to function comment
364 // TODO: Func - add argument and description to function comment
368 PCI_IO_DEVICE
*PciIoDevice
;
369 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
371 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
372 PciIoDevice
= CreatePciIoDevice (
385 // Create a device path for this PCI device and store it into its private data
387 CreatePciDevicePath (
393 // If it is a full enumeration, disconnect the device in advance
395 if (gFullEnumeration
) {
397 PciSetCommandRegister (PciIoDevice
, 0);
402 // Start to parse the bars
404 for (Offset
= 0x10, BarIndex
= 0; Offset
<= 0x24; BarIndex
++) {
405 Offset
= PciParseBar (PciIoDevice
, Offset
, BarIndex
);
413 IN PCI_IO_DEVICE
*Bridge
,
430 // TODO: Bridge - add argument and description to function comment
431 // TODO: Pci - add argument and description to function comment
432 // TODO: Bus - add argument and description to function comment
433 // TODO: Device - add argument and description to function comment
434 // TODO: Func - add argument and description to function comment
436 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
437 PCI_IO_DEVICE
*PciIoDevice
;
440 EFI_PCI_IO_PROTOCOL
*PciIo
;
443 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
444 PciIoDevice
= CreatePciIoDevice (
457 // Create a device path for this PCI device and store it into its private data
459 CreatePciDevicePath (
464 if (gFullEnumeration
) {
465 PciSetCommandRegister (PciIoDevice
, 0);
468 // Initalize the bridge control register
470 PciSetBridgeControlRegister (PciIoDevice
, 0);
475 // PPB can have two BARs
477 if (PciParseBar (PciIoDevice
, 0x10, PPB_BAR_0
) == 0x14) {
481 PciParseBar (PciIoDevice
, 0x14, PPB_BAR_1
);
484 PciIo
= &PciIoDevice
->PciIo
;
487 // Test whether it support 32 decode or not
489 PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint8
, 0x1C, 1, &Temp
);
490 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x1C, 1, &gAllOne
);
491 PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint8
, 0x1C, 1, &Value
);
492 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x1C, 1, &Temp
);
496 PciIoDevice
->Decodes
|= EFI_BRIDGE_IO32_DECODE_SUPPORTED
;
498 PciIoDevice
->Decodes
|= EFI_BRIDGE_IO16_DECODE_SUPPORTED
;
502 Status
= BarExisted (
510 // test if it supports 64 memory or not
512 if (!EFI_ERROR (Status
)) {
514 Status
= BarExisted (
521 if (!EFI_ERROR (Status
)) {
522 PciIoDevice
->Decodes
|= EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
;
523 PciIoDevice
->Decodes
|= EFI_BRIDGE_PMEM64_DECODE_SUPPORTED
;
525 PciIoDevice
->Decodes
|= EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
;
530 // Memory 32 code is required for ppb
532 PciIoDevice
->Decodes
|= EFI_BRIDGE_MEM32_DECODE_SUPPORTED
;
534 GetResourcePaddingPpb (PciIoDevice
);
541 IN PCI_IO_DEVICE
*Bridge
,
558 // TODO: Bridge - add argument and description to function comment
559 // TODO: Pci - add argument and description to function comment
560 // TODO: Bus - add argument and description to function comment
561 // TODO: Device - add argument and description to function comment
562 // TODO: Func - add argument and description to function comment
564 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
565 PCI_IO_DEVICE
*PciIoDevice
;
567 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
568 PciIoDevice
= CreatePciIoDevice (
581 // Create a device path for this PCI device and store it into its private data
583 CreatePciDevicePath (
588 if (gFullEnumeration
) {
589 PciSetCommandRegister (PciIoDevice
, 0);
592 // Initalize the bridge control register
594 PciSetBridgeControlRegister (PciIoDevice
, 0);
598 // P2C only has one bar that is in 0x10
600 PciParseBar (PciIoDevice
, 0x10, P2C_BAR_0
);
603 // Read PciBar information from the bar register
605 GetBackPcCardBar (PciIoDevice
);
606 PciIoDevice
->Decodes
= EFI_BRIDGE_MEM32_DECODE_SUPPORTED
|
607 EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
|
608 EFI_BRIDGE_IO32_DECODE_SUPPORTED
;
613 EFI_DEVICE_PATH_PROTOCOL
*
614 CreatePciDevicePath (
615 IN EFI_DEVICE_PATH_PROTOCOL
*ParentDevicePath
,
616 IN PCI_IO_DEVICE
*PciIoDevice
629 // TODO: ParentDevicePath - add argument and description to function comment
630 // TODO: PciIoDevice - add argument and description to function comment
633 PCI_DEVICE_PATH PciNode
;
636 // Create PCI device path
638 PciNode
.Header
.Type
= HARDWARE_DEVICE_PATH
;
639 PciNode
.Header
.SubType
= HW_PCI_DP
;
640 SetDevicePathNodeLength (&PciNode
.Header
, sizeof (PciNode
));
642 PciNode
.Device
= PciIoDevice
->DeviceNumber
;
643 PciNode
.Function
= PciIoDevice
->FunctionNumber
;
644 PciIoDevice
->DevicePath
= AppendDevicePathNode (ParentDevicePath
, &PciNode
.Header
);
646 return PciIoDevice
->DevicePath
;
651 IN PCI_IO_DEVICE
*PciIoDevice
,
653 OUT UINT32
*BarLengthValue
,
654 OUT UINT32
*OriginalBarValue
660 Check the bar is existed or not.
664 PciIoDevice - A pointer to the PCI_IO_DEVICE.
666 BarLengthValue - The bar length value.
667 OriginalBarValue - The original bar value.
671 EFI_NOT_FOUND - The bar don't exist.
672 EFI_SUCCESS - The bar exist.
676 EFI_PCI_IO_PROTOCOL
*PciIo
;
677 UINT32 OriginalValue
;
681 PciIo
= &PciIoDevice
->PciIo
;
684 // Preserve the original value
687 PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint32
, (UINT8
) Offset
, 1, &OriginalValue
);
690 // Raise TPL to high level to disable timer interrupt while the BAR is probed
692 OldTpl
= gBS
->RaiseTPL (EFI_TPL_HIGH_LEVEL
);
694 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, (UINT8
) Offset
, 1, &gAllOne
);
695 PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint32
, (UINT8
) Offset
, 1, &Value
);
698 // Write back the original value
700 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, (UINT8
) Offset
, 1, &OriginalValue
);
703 // Restore TPL to its original level
705 gBS
->RestoreTPL (OldTpl
);
707 if (BarLengthValue
!= NULL
) {
708 *BarLengthValue
= Value
;
711 if (OriginalBarValue
!= NULL
) {
712 *OriginalBarValue
= OriginalValue
;
716 return EFI_NOT_FOUND
;
723 PciTestSupportedAttribute (
724 IN PCI_IO_DEVICE
*PciIoDevice
,
726 IN UINT16
*BridgeControl
,
727 IN UINT16
*OldCommand
,
728 IN UINT16
*OldBridgeControl
741 // TODO: PciIoDevice - add argument and description to function comment
742 // TODO: Command - add argument and description to function comment
743 // TODO: BridgeControl - add argument and description to function comment
744 // TODO: OldCommand - add argument and description to function comment
745 // TODO: OldBridgeControl - add argument and description to function comment
746 // TODO: EFI_SUCCESS - add return value to function comment
751 // Preserve the original value
753 PciReadCommandRegister (PciIoDevice
, OldCommand
);
756 // Raise TPL to high level to disable timer interrupt while the BAR is probed
758 OldTpl
= gBS
->RaiseTPL (EFI_TPL_HIGH_LEVEL
);
760 PciSetCommandRegister (PciIoDevice
, *Command
);
761 PciReadCommandRegister (PciIoDevice
, Command
);
764 // Write back the original value
766 PciSetCommandRegister (PciIoDevice
, *OldCommand
);
769 // Restore TPL to its original level
771 gBS
->RestoreTPL (OldTpl
);
773 if (IS_PCI_BRIDGE (&PciIoDevice
->Pci
) || IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
776 // Preserve the original value
778 PciReadBridgeControlRegister (PciIoDevice
, OldBridgeControl
);
781 // Raise TPL to high level to disable timer interrupt while the BAR is probed
783 OldTpl
= gBS
->RaiseTPL (EFI_TPL_HIGH_LEVEL
);
785 PciSetBridgeControlRegister (PciIoDevice
, *BridgeControl
);
786 PciReadBridgeControlRegister (PciIoDevice
, BridgeControl
);
789 // Write back the original value
791 PciSetBridgeControlRegister (PciIoDevice
, *OldBridgeControl
);
794 // Restore TPL to its original level
796 gBS
->RestoreTPL (OldTpl
);
799 *OldBridgeControl
= 0;
807 PciSetDeviceAttribute (
808 IN PCI_IO_DEVICE
*PciIoDevice
,
810 IN UINT16 BridgeControl
,
816 Set the supported or current attributes of a PCI device
819 PciIoDevice - Structure pointer for PCI device.
820 Command - Command register value.
821 BridgeControl - Bridge control value for PPB or P2C.
822 Option - Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
839 EFI_SUCCESS Always success
848 if (Command
& EFI_PCI_COMMAND_IO_SPACE
) {
849 Attributes
|= EFI_PCI_IO_ATTRIBUTE_IO
;
852 if (Command
& EFI_PCI_COMMAND_MEMORY_SPACE
) {
853 Attributes
|= EFI_PCI_IO_ATTRIBUTE_MEMORY
;
856 if (Command
& EFI_PCI_COMMAND_BUS_MASTER
) {
857 Attributes
|= EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
;
860 if (Command
& EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
) {
861 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
;
864 if (BridgeControl
& EFI_PCI_BRIDGE_CONTROL_ISA
) {
865 Attributes
|= EFI_PCI_IO_ATTRIBUTE_ISA_IO
;
868 if (BridgeControl
& EFI_PCI_BRIDGE_CONTROL_VGA
) {
869 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_IO
;
870 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
;
871 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO
;
874 if (Option
== EFI_SET_SUPPORTS
) {
876 Attributes
|= EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE
|
877 EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED
|
878 EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE
|
879 EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE
|
880 EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM
|
881 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
;
883 if (Attributes
& EFI_PCI_IO_ATTRIBUTE_IO
) {
884 Attributes
|= EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO
;
885 Attributes
|= EFI_PCI_IO_ATTRIBUTE_ISA_IO
;
888 if (IS_PCI_BRIDGE (&PciIoDevice
->Pci
) || IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
890 // For bridge, it should support IDE attributes
892 Attributes
|= EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO
;
893 Attributes
|= EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO
;
896 if (IS_PCI_IDE (&PciIoDevice
->Pci
)) {
897 Attributes
|= EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO
;
898 Attributes
|= EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO
;
901 if (IS_PCI_VGA (&PciIoDevice
->Pci
)) {
902 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
;
903 Attributes
|= EFI_PCI_IO_ATTRIBUTE_VGA_IO
;
907 PciIoDevice
->Supports
= Attributes
;
908 PciIoDevice
->Supports
&= ( (PciIoDevice
->Parent
->Supports
) | \
909 EFI_PCI_IO_ATTRIBUTE_IO
| EFI_PCI_IO_ATTRIBUTE_MEMORY
| \
910 EFI_PCI_IO_ATTRIBUTE_BUS_MASTER
);
913 PciIoDevice
->Attributes
= Attributes
;
920 GetFastBackToBackSupport (
921 IN PCI_IO_DEVICE
*PciIoDevice
,
928 Determine if the device can support Fast Back to Back attribute
937 // TODO: PciIoDevice - add argument and description to function comment
938 // TODO: StatusIndex - add argument and description to function comment
939 // TODO: EFI_UNSUPPORTED - add return value to function comment
940 // TODO: EFI_SUCCESS - add return value to function comment
941 // TODO: EFI_UNSUPPORTED - add return value to function comment
943 EFI_PCI_IO_PROTOCOL
*PciIo
;
945 UINT32 StatusRegister
;
948 // Read the status register
950 PciIo
= &PciIoDevice
->PciIo
;
951 Status
= PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint16
, StatusIndex
, 1, &StatusRegister
);
952 if (EFI_ERROR (Status
)) {
953 return EFI_UNSUPPORTED
;
957 // Check the Fast B2B bit
959 if (StatusRegister
& EFI_PCI_FAST_BACK_TO_BACK_CAPABLE
) {
962 return EFI_UNSUPPORTED
;
968 ProcessOptionRomLight (
969 IN PCI_IO_DEVICE
*PciIoDevice
975 Process the option ROM for all the children of the specified parent PCI device.
976 It can only be used after the first full Option ROM process.
985 // TODO: PciIoDevice - add argument and description to function comment
986 // TODO: EFI_SUCCESS - add return value to function comment
989 LIST_ENTRY
*CurrentLink
;
992 // For RootBridge, PPB , P2C, go recursively to traverse all its children
994 CurrentLink
= PciIoDevice
->ChildList
.ForwardLink
;
995 while (CurrentLink
&& CurrentLink
!= &PciIoDevice
->ChildList
) {
997 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
999 if (!IsListEmpty (&Temp
->ChildList
)) {
1000 ProcessOptionRomLight (Temp
);
1003 PciRomGetImageMapping (Temp
);
1004 CurrentLink
= CurrentLink
->ForwardLink
;
1011 DetermineDeviceAttribute (
1012 IN PCI_IO_DEVICE
*PciIoDevice
1016 Routine Description:
1018 Determine the related attributes of all devices under a Root Bridge
1027 // TODO: PciIoDevice - add argument and description to function comment
1028 // TODO: EFI_SUCCESS - add return value to function comment
1031 UINT16 BridgeControl
;
1033 UINT16 OldBridgeControl
;
1034 BOOLEAN FastB2BSupport
;
1038 EFI_PCI_IO_PROTOCOL *PciIo;
1040 PCI_IO_DEVICE
*Temp
;
1041 LIST_ENTRY
*CurrentLink
;
1045 // For Root Bridge, just copy it by RootBridgeIo proctocol
1046 // so as to keep consistent with the actual attribute
1048 if (!PciIoDevice
->Parent
) {
1049 Status
= PciIoDevice
->PciRootBridgeIo
->GetAttributes (
1050 PciIoDevice
->PciRootBridgeIo
,
1051 &PciIoDevice
->Supports
,
1052 &PciIoDevice
->Attributes
1054 if (EFI_ERROR (Status
)) {
1060 // Set the attributes to be checked for common PCI devices and PPB or P2C
1061 // Since some devices only support part of them, it is better to set the
1062 // attribute according to its command or bridge control register
1064 Command
= EFI_PCI_COMMAND_IO_SPACE
|
1065 EFI_PCI_COMMAND_MEMORY_SPACE
|
1066 EFI_PCI_COMMAND_BUS_MASTER
|
1067 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP
;
1069 BridgeControl
= EFI_PCI_BRIDGE_CONTROL_ISA
| EFI_PCI_BRIDGE_CONTROL_VGA
;
1072 // Test whether the device can support attributes above
1074 PciTestSupportedAttribute (PciIoDevice
, &Command
, &BridgeControl
, &OldCommand
, &OldBridgeControl
);
1077 // Set the supported attributes for specified PCI device
1079 PciSetDeviceAttribute (PciIoDevice
, Command
, BridgeControl
, EFI_SET_SUPPORTS
);
1082 // Set the current attributes for specified PCI device
1084 PciSetDeviceAttribute (PciIoDevice
, OldCommand
, OldBridgeControl
, EFI_SET_ATTRIBUTES
);
1087 // Enable other supported attributes but not defined in PCI_IO_PROTOCOL
1089 PciEnableCommandRegister (PciIoDevice
, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE
);
1092 // Enable IDE native mode
1095 if (IS_PCI_IDE(&PciIoDevice->Pci)) {
1097 PciIo = &PciIoDevice->PciIo;
1108 // Set native mode if it can be supported
1110 IdePI |= (((IdePI & 0x0F) >> 1) & 0x05);
1124 FastB2BSupport
= TRUE
;
1127 // P2C can not support FB2B on the secondary side
1129 if (IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
1130 FastB2BSupport
= FALSE
;
1134 // For RootBridge, PPB , P2C, go recursively to traverse all its children
1136 CurrentLink
= PciIoDevice
->ChildList
.ForwardLink
;
1137 while (CurrentLink
&& CurrentLink
!= &PciIoDevice
->ChildList
) {
1139 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1140 Status
= DetermineDeviceAttribute (Temp
);
1141 if (EFI_ERROR (Status
)) {
1145 // Detect Fast Bact to Bact support for the device under the bridge
1147 Status
= GetFastBackToBackSupport (Temp
, PCI_PRIMARY_STATUS_OFFSET
);
1148 if (FastB2BSupport
&& EFI_ERROR (Status
)) {
1149 FastB2BSupport
= FALSE
;
1152 CurrentLink
= CurrentLink
->ForwardLink
;
1155 // Set or clear Fast Back to Back bit for the whole bridge
1157 if (!IsListEmpty (&PciIoDevice
->ChildList
)) {
1159 if (IS_PCI_BRIDGE (&PciIoDevice
->Pci
)) {
1161 Status
= GetFastBackToBackSupport (PciIoDevice
, PCI_BRIDGE_STATUS_REGISTER_OFFSET
);
1163 if (EFI_ERROR (Status
) || (!FastB2BSupport
)) {
1164 FastB2BSupport
= FALSE
;
1165 PciDisableBridgeControlRegister (PciIoDevice
, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK
);
1167 PciEnableBridgeControlRegister (PciIoDevice
, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK
);
1171 CurrentLink
= PciIoDevice
->ChildList
.ForwardLink
;
1172 while (CurrentLink
&& CurrentLink
!= &PciIoDevice
->ChildList
) {
1173 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1174 if (FastB2BSupport
) {
1175 PciEnableCommandRegister (Temp
, EFI_PCI_COMMAND_FAST_BACK_TO_BACK
);
1177 PciDisableCommandRegister (Temp
, EFI_PCI_COMMAND_FAST_BACK_TO_BACK
);
1180 CurrentLink
= CurrentLink
->ForwardLink
;
1184 // End for IsListEmpty
1191 IN PCI_IO_DEVICE
*PciIoDevice
1195 Routine Description:
1197 This routine is used to update the bar information for those incompatible PCI device
1206 // TODO: PciIoDevice - add argument and description to function comment
1207 // TODO: EFI_UNSUPPORTED - add return value to function comment
1213 VOID
*Configuration
;
1214 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
1216 Configuration
= NULL
;
1219 // It can only be supported after the Incompatible PCI Device
1220 // Support Protocol has been installed
1222 if (gEfiIncompatiblePciDeviceSupport
== NULL
) {
1224 Status
= gBS
->LocateProtocol (
1225 &gEfiIncompatiblePciDeviceSupportProtocolGuid
,
1227 (VOID
**) &gEfiIncompatiblePciDeviceSupport
1229 if (EFI_ERROR (Status
)) {
1230 return EFI_UNSUPPORTED
;
1235 // Check whether the device belongs to incompatible devices or not
1236 // If it is , then get its special requirement in the ACPI table
1238 Status
= gEfiIncompatiblePciDeviceSupport
->CheckDevice (
1239 gEfiIncompatiblePciDeviceSupport
,
1240 PciIoDevice
->Pci
.Hdr
.VendorId
,
1241 PciIoDevice
->Pci
.Hdr
.DeviceId
,
1242 PciIoDevice
->Pci
.Hdr
.RevisionID
,
1243 PciIoDevice
->Pci
.Device
.SubsystemVendorID
,
1244 PciIoDevice
->Pci
.Device
.SubsystemID
,
1248 if (EFI_ERROR (Status
)) {
1253 // Update PCI device information from the ACPI table
1255 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Configuration
;
1257 while (Ptr
->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
1259 if (Ptr
->Desc
!= ACPI_ADDRESS_SPACE_DESCRIPTOR
) {
1261 // The format is not support
1266 BarIndex
= (UINTN
) Ptr
->AddrTranslationOffset
;
1267 BarEndIndex
= BarIndex
;
1270 // Update all the bars in the device
1272 if (BarIndex
== PCI_BAR_ALL
) {
1274 BarEndIndex
= PCI_MAX_BAR
- 1;
1277 if (BarIndex
>= PCI_MAX_BAR
) {
1282 for (; BarIndex
<= BarEndIndex
; BarIndex
++) {
1284 switch (Ptr
->ResType
) {
1285 case ACPI_ADDRESS_SPACE_TYPE_MEM
:
1288 // Make sure the bar is memory type
1290 if (CheckBarType (PciIoDevice
, (UINT8
) BarIndex
, PciBarTypeMem
)) {
1295 case ACPI_ADDRESS_SPACE_TYPE_IO
:
1298 // Make sure the bar is IO type
1300 if (CheckBarType (PciIoDevice
, (UINT8
) BarIndex
, PciBarTypeIo
)) {
1309 // Update the new alignment for the device
1311 SetNewAlign (&(PciIoDevice
->PciBar
[BarIndex
].Alignment
), Ptr
->AddrRangeMax
);
1314 // Update the new length for the device
1316 if (Ptr
->AddrLen
!= PCI_BAR_NOCHANGE
) {
1317 PciIoDevice
->PciBar
[BarIndex
].Length
= Ptr
->AddrLen
;
1325 gBS
->FreePool (Configuration
);
1332 IN UINT64
*Alignment
,
1333 IN UINT64 NewAlignment
1337 Routine Description:
1339 This routine will update the alignment with the new alignment
1348 // TODO: Alignment - add argument and description to function comment
1349 // TODO: NewAlignment - add argument and description to function comment
1351 UINT64 OldAlignment
;
1355 // The new alignment is the same as the original,
1358 if (NewAlignment
== PCI_BAR_OLD_ALIGN
) {
1362 // Check the validity of the parameter
1364 if (NewAlignment
!= PCI_BAR_EVEN_ALIGN
&&
1365 NewAlignment
!= PCI_BAR_SQUAD_ALIGN
&&
1366 NewAlignment
!= PCI_BAR_DQUAD_ALIGN
) {
1367 *Alignment
= NewAlignment
;
1371 OldAlignment
= (*Alignment
) + 1;
1375 // Get the first non-zero hex value of the length
1377 while ((OldAlignment
& 0x0F) == 0x00) {
1378 OldAlignment
= RShiftU64 (OldAlignment
, 4);
1383 // Adjust the alignment to even, quad or double quad boundary
1385 if (NewAlignment
== PCI_BAR_EVEN_ALIGN
) {
1386 if (OldAlignment
& 0x01) {
1387 OldAlignment
= OldAlignment
+ 2 - (OldAlignment
& 0x01);
1389 } else if (NewAlignment
== PCI_BAR_SQUAD_ALIGN
) {
1390 if (OldAlignment
& 0x03) {
1391 OldAlignment
= OldAlignment
+ 4 - (OldAlignment
& 0x03);
1393 } else if (NewAlignment
== PCI_BAR_DQUAD_ALIGN
) {
1394 if (OldAlignment
& 0x07) {
1395 OldAlignment
= OldAlignment
+ 8 - (OldAlignment
& 0x07);
1400 // Update the old value
1402 NewAlignment
= LShiftU64 (OldAlignment
, ShiftBit
) - 1;
1403 *Alignment
= NewAlignment
;
1410 IN PCI_IO_DEVICE
*PciIoDevice
,
1416 Routine Description:
1425 // TODO: PciIoDevice - add argument and description to function comment
1426 // TODO: Offset - add argument and description to function comment
1427 // TODO: BarIndex - add argument and description to function comment
1431 UINT32 OriginalValue
;
1441 Status
= BarExisted (
1448 if (EFI_ERROR (Status
)) {
1449 PciIoDevice
->PciBar
[BarIndex
].BaseAddress
= 0;
1450 PciIoDevice
->PciBar
[BarIndex
].Length
= 0;
1451 PciIoDevice
->PciBar
[BarIndex
].Alignment
= 0;
1454 // Some devices don't fully comply to PCI spec 2.2. So be to scan all the BARs anyway
1456 PciIoDevice
->PciBar
[BarIndex
].Offset
= (UINT8
) Offset
;
1460 PciIoDevice
->PciBar
[BarIndex
].Offset
= (UINT8
) Offset
;
1467 if (Value
& 0xFFFF0000) {
1471 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeIo32
;
1472 PciIoDevice
->PciBar
[BarIndex
].Length
= ((~(Value
& Mask
)) + 1);
1473 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1479 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeIo16
;
1480 PciIoDevice
->PciBar
[BarIndex
].Length
= 0x0000FFFF & ((~(Value
& Mask
)) + 1);
1481 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1485 // Workaround. Some platforms inplement IO bar with 0 length
1486 // Need to treat it as no-bar
1488 if (PciIoDevice
->PciBar
[BarIndex
].Length
== 0) {
1489 PciIoDevice
->PciBar
[BarIndex
].BarType
= 0;
1492 PciIoDevice
->PciBar
[BarIndex
].Prefetchable
= FALSE
;
1493 PciIoDevice
->PciBar
[BarIndex
].BaseAddress
= OriginalValue
& Mask
;
1499 PciIoDevice
->PciBar
[BarIndex
].BaseAddress
= OriginalValue
& Mask
;
1501 switch (Value
& 0x07) {
1504 //memory space; anywhere in 32 bit address space
1508 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypePMem32
;
1510 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeMem32
;
1513 PciIoDevice
->PciBar
[BarIndex
].Length
= (~(Value
& Mask
)) + 1;
1514 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1519 // memory space; anywhere in 64 bit address space
1523 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypePMem64
;
1525 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeMem64
;
1529 // According to PCI 2.2,if the bar indicates a memory 64 decoding, next bar
1530 // is regarded as an extension for the first bar. As a result
1531 // the sizing will be conducted on combined 64 bit value
1532 // Here just store the masked first 32bit value for future size
1535 PciIoDevice
->PciBar
[BarIndex
].Length
= Value
& Mask
;
1536 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1539 // Increment the offset to point to next DWORD
1543 Status
= BarExisted (
1550 if (EFI_ERROR (Status
)) {
1555 // Fix the length to support some spefic 64 bit BAR
1559 for (Data
= Value
; Data
!= 0; Data
>>= 1) {
1562 Value
|= ((UINT32
)(-1) << Index
);
1565 // Calculate the size of 64bit bar
1567 PciIoDevice
->PciBar
[BarIndex
].BaseAddress
|= LShiftU64 ((UINT64
) OriginalValue
, 32);
1569 PciIoDevice
->PciBar
[BarIndex
].Length
= PciIoDevice
->PciBar
[BarIndex
].Length
| LShiftU64 ((UINT64
) Value
, 32);
1570 PciIoDevice
->PciBar
[BarIndex
].Length
= (~(PciIoDevice
->PciBar
[BarIndex
].Length
)) + 1;
1571 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1579 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeUnknown
;
1580 PciIoDevice
->PciBar
[BarIndex
].Length
= (~(Value
& Mask
)) + 1;
1581 PciIoDevice
->PciBar
[BarIndex
].Alignment
= PciIoDevice
->PciBar
[BarIndex
].Length
- 1;
1588 // Check the length again so as to keep compatible with some special bars
1590 if (PciIoDevice
->PciBar
[BarIndex
].Length
== 0) {
1591 PciIoDevice
->PciBar
[BarIndex
].BarType
= PciBarTypeUnknown
;
1592 PciIoDevice
->PciBar
[BarIndex
].BaseAddress
= 0;
1593 PciIoDevice
->PciBar
[BarIndex
].Alignment
= 0;
1597 // Increment number of bar
1603 InitializePciDevice (
1604 IN PCI_IO_DEVICE
*PciIoDevice
1608 Routine Description:
1610 This routine is used to initialize the bar of a PCI device
1611 It can be called typically when a device is going to be rejected
1620 // TODO: PciIoDevice - add argument and description to function comment
1621 // TODO: EFI_SUCCESS - add return value to function comment
1623 EFI_PCI_IO_PROTOCOL
*PciIo
;
1626 PciIo
= &(PciIoDevice
->PciIo
);
1629 // Put all the resource apertures
1630 // Resource base is set to all ones so as to indicate its resource
1631 // has not been alloacted
1633 for (Offset
= 0x10; Offset
<= 0x24; Offset
+= sizeof (UINT32
)) {
1634 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, Offset
, 1, &gAllOne
);
1642 IN PCI_IO_DEVICE
*PciIoDevice
1646 Routine Description:
1655 // TODO: PciIoDevice - add argument and description to function comment
1656 // TODO: EFI_SUCCESS - add return value to function comment
1658 EFI_PCI_IO_PROTOCOL
*PciIo
;
1660 PciIo
= &(PciIoDevice
->PciIo
);
1663 // Put all the resource apertures including IO16
1664 // Io32, pMem32, pMem64 to quiescent state
1665 // Resource base all ones, Resource limit all zeros
1667 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x1C, 1, &gAllOne
);
1668 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x1D, 1, &gAllZero
);
1670 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x20, 1, &gAllOne
);
1671 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x22, 1, &gAllZero
);
1673 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x24, 1, &gAllOne
);
1674 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x26, 1, &gAllZero
);
1676 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x28, 1, &gAllOne
);
1677 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x2C, 1, &gAllZero
);
1680 // don't support use io32 as for now
1682 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x30, 1, &gAllOne
);
1683 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint16
, 0x32, 1, &gAllZero
);
1686 // Force Interrupt line to zero for cards that come up randomly
1688 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x3C, 1, &gAllZero
);
1695 IN PCI_IO_DEVICE
*PciIoDevice
1699 Routine Description:
1708 // TODO: PciIoDevice - add argument and description to function comment
1709 // TODO: EFI_SUCCESS - add return value to function comment
1711 EFI_PCI_IO_PROTOCOL
*PciIo
;
1713 PciIo
= &(PciIoDevice
->PciIo
);
1716 // Put all the resource apertures including IO16
1717 // Io32, pMem32, pMem64 to quiescent state(
1718 // Resource base all ones, Resource limit all zeros
1720 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x1c, 1, &gAllOne
);
1721 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x20, 1, &gAllZero
);
1723 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x24, 1, &gAllOne
);
1724 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x28, 1, &gAllZero
);
1726 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x2c, 1, &gAllOne
);
1727 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x30, 1, &gAllZero
);
1729 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x34, 1, &gAllOne
);
1730 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint32
, 0x38, 1, &gAllZero
);
1733 // Force Interrupt line to zero for cards that come up randomly
1735 PciIo
->Pci
.Write (PciIo
, EfiPciIoWidthUint8
, 0x3C, 1, &gAllZero
);
1741 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
,
1749 Routine Description:
1758 // TODO: PciRootBridgeIo - add argument and description to function comment
1759 // TODO: Pci - add argument and description to function comment
1760 // TODO: Bus - add argument and description to function comment
1761 // TODO: Device - add argument and description to function comment
1762 // TODO: Func - add argument and description to function comment
1766 PCI_IO_DEVICE
*PciIoDevice
;
1770 Status
= gBS
->AllocatePool (
1771 EfiBootServicesData
,
1772 sizeof (PCI_IO_DEVICE
),
1773 (VOID
**) &PciIoDevice
1776 if (EFI_ERROR (Status
)) {
1780 ZeroMem (PciIoDevice
, sizeof (PCI_IO_DEVICE
));
1782 PciIoDevice
->Signature
= PCI_IO_DEVICE_SIGNATURE
;
1783 PciIoDevice
->Handle
= NULL
;
1784 PciIoDevice
->PciRootBridgeIo
= PciRootBridgeIo
;
1785 PciIoDevice
->DevicePath
= NULL
;
1786 PciIoDevice
->BusNumber
= Bus
;
1787 PciIoDevice
->DeviceNumber
= Device
;
1788 PciIoDevice
->FunctionNumber
= Func
;
1789 PciIoDevice
->Decodes
= 0;
1790 if (gFullEnumeration
) {
1791 PciIoDevice
->Allocated
= FALSE
;
1793 PciIoDevice
->Allocated
= TRUE
;
1796 PciIoDevice
->Registered
= FALSE
;
1797 PciIoDevice
->Attributes
= 0;
1798 PciIoDevice
->Supports
= 0;
1799 PciIoDevice
->BusOverride
= FALSE
;
1800 PciIoDevice
->AllOpRomProcessed
= FALSE
;
1802 PciIoDevice
->IsPciExp
= FALSE
;
1804 CopyMem (&(PciIoDevice
->Pci
), Pci
, sizeof (PCI_TYPE01
));
1807 // Initialize the PCI I/O instance structure
1810 Status
= InitializePciIoInstance (PciIoDevice
);
1811 Status
= InitializePciDriverOverrideInstance (PciIoDevice
);
1813 if (EFI_ERROR (Status
)) {
1814 gBS
->FreePool (PciIoDevice
);
1819 // Initialize the reserved resource list
1821 InitializeListHead (&PciIoDevice
->ReservedResourceList
);
1824 // Initialize the driver list
1826 InitializeListHead (&PciIoDevice
->OptionRomDriverList
);
1829 // Initialize the child list
1831 InitializeListHead (&PciIoDevice
->ChildList
);
1837 PciEnumeratorLight (
1838 IN EFI_HANDLE Controller
1842 Routine Description:
1844 This routine is used to enumerate entire pci bus system
1854 // TODO: Controller - add argument and description to function comment
1855 // TODO: EFI_SUCCESS - add return value to function comment
1856 // TODO: EFI_SUCCESS - add return value to function comment
1860 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1861 PCI_IO_DEVICE
*RootBridgeDev
;
1864 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
1867 MaxBus
= PCI_MAX_BUS
;
1871 // If this host bridge has been already enumerated, then return successfully
1873 if (RootBridgeExisted (Controller
)) {
1878 // Open pci root bridge io protocol
1880 Status
= gBS
->OpenProtocol (
1882 &gEfiPciRootBridgeIoProtocolGuid
,
1883 (VOID
**) &PciRootBridgeIo
,
1884 gPciBusDriverBinding
.DriverBindingHandle
,
1886 EFI_OPEN_PROTOCOL_BY_DRIVER
1888 if (EFI_ERROR (Status
) && Status
!= EFI_ALREADY_STARTED
) {
1892 Status
= PciRootBridgeIo
->Configuration (PciRootBridgeIo
, (VOID
**) &Descriptors
);
1894 if (EFI_ERROR (Status
)) {
1898 while (PciGetBusRange (&Descriptors
, &MinBus
, &MaxBus
, NULL
) == EFI_SUCCESS
) {
1901 // Create a device node for root bridge device with a NULL host bridge controller handle
1903 RootBridgeDev
= CreateRootBridge (Controller
);
1905 if (!RootBridgeDev
) {
1911 // Record the root bridge io protocol
1913 RootBridgeDev
->PciRootBridgeIo
= PciRootBridgeIo
;
1915 Status
= PciPciDeviceInfoCollector (
1920 if (!EFI_ERROR (Status
)) {
1923 // Remove those PCI devices which are rejected when full enumeration
1925 RemoveRejectedPciDevices (RootBridgeDev
->Handle
, RootBridgeDev
);
1928 // Process option rom light
1930 ProcessOptionRomLight (RootBridgeDev
);
1933 // Determine attributes for all devices under this root bridge
1935 DetermineDeviceAttribute (RootBridgeDev
);
1938 // If successfully, insert the node into device pool
1940 InsertRootBridge (RootBridgeDev
);
1944 // If unsuccessly, destroy the entire node
1946 DestroyRootBridge (RootBridgeDev
);
1957 IN EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
**Descriptors
,
1960 OUT UINT16
*BusRange
1964 Routine Description:
1970 Descriptors - A pointer to the address space descriptor.
1971 MinBus - The min bus.
1972 MaxBus - The max bus.
1973 BusRange - The bus range.
1980 // TODO: EFI_SUCCESS - add return value to function comment
1981 // TODO: EFI_NOT_FOUND - add return value to function comment
1984 while ((*Descriptors
)->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
1985 if ((*Descriptors
)->ResType
== ACPI_ADDRESS_SPACE_TYPE_BUS
) {
1986 if (MinBus
!= NULL
) {
1987 *MinBus
= (UINT16
) (*Descriptors
)->AddrRangeMin
;
1990 if (MaxBus
!= NULL
) {
1991 *MaxBus
= (UINT16
) (*Descriptors
)->AddrRangeMax
;
1994 if (BusRange
!= NULL
) {
1995 *BusRange
= (UINT16
) (*Descriptors
)->AddrLen
;
2004 return EFI_NOT_FOUND
;
2008 StartManagingRootBridge (
2009 IN PCI_IO_DEVICE
*RootBridgeDev
2013 Routine Description:
2023 // TODO: RootBridgeDev - add argument and description to function comment
2024 // TODO: EFI_SUCCESS - add return value to function comment
2026 EFI_HANDLE RootBridgeHandle
;
2028 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
2031 // Get the root bridge handle
2033 RootBridgeHandle
= RootBridgeDev
->Handle
;
2034 PciRootBridgeIo
= NULL
;
2037 // Get the pci root bridge io protocol
2039 Status
= gBS
->OpenProtocol (
2041 &gEfiPciRootBridgeIoProtocolGuid
,
2042 (VOID
**) &PciRootBridgeIo
,
2043 gPciBusDriverBinding
.DriverBindingHandle
,
2045 EFI_OPEN_PROTOCOL_BY_DRIVER
2048 if (EFI_ERROR (Status
) && Status
!= EFI_ALREADY_STARTED
) {
2053 // Store the PciRootBridgeIo protocol into root bridge private data
2055 RootBridgeDev
->PciRootBridgeIo
= PciRootBridgeIo
;
2062 IsPciDeviceRejected (
2063 IN PCI_IO_DEVICE
*PciIoDevice
2067 Routine Description:
2069 This routine can be used to check whether a PCI device should be rejected when light enumeration
2075 TRUE This device should be rejected
2076 FALSE This device shouldn't be rejected
2079 // TODO: PciIoDevice - add argument and description to function comment
2088 // PPB should be skip!
2090 if (IS_PCI_BRIDGE (&PciIoDevice
->Pci
)) {
2094 if (IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
2096 // Only test base registers for P2C
2098 for (BarOffset
= 0x1C; BarOffset
<= 0x38; BarOffset
+= 2 * sizeof (UINT32
)) {
2100 Mask
= (BarOffset
< 0x2C) ? 0xFFFFF000 : 0xFFFFFFFC;
2101 Status
= BarExisted (PciIoDevice
, BarOffset
, &TestValue
, &OldValue
);
2102 if (EFI_ERROR (Status
)) {
2106 TestValue
= TestValue
& Mask
;
2107 if ((TestValue
!= 0) && (TestValue
== (OldValue
& Mask
))) {
2109 // The bar isn't programed, so it should be rejected
2118 for (BarOffset
= 0x14; BarOffset
<= 0x24; BarOffset
+= sizeof (UINT32
)) {
2122 Status
= BarExisted (PciIoDevice
, BarOffset
, &TestValue
, &OldValue
);
2123 if (EFI_ERROR (Status
)) {
2127 if (TestValue
& 0x01) {
2134 TestValue
= TestValue
& Mask
;
2135 if ((TestValue
!= 0) && (TestValue
== (OldValue
& Mask
))) {
2146 TestValue
= TestValue
& Mask
;
2148 if ((TestValue
& 0x07) == 0x04) {
2153 BarOffset
+= sizeof (UINT32
);
2154 if ((TestValue
!= 0) && (TestValue
== (OldValue
& Mask
))) {
2157 // Test its high 32-Bit BAR
2160 Status
= BarExisted (PciIoDevice
, BarOffset
, &TestValue
, &OldValue
);
2161 if (TestValue
== OldValue
) {
2171 if ((TestValue
!= 0) && (TestValue
== (OldValue
& Mask
))) {
2183 IN PCI_IO_DEVICE
*Bridge
,
2184 IN UINT8 StartBusNumber
2188 Routine Description:
2190 TODO: Add function description
2194 Bridge - TODO: add argument description
2195 StartBusNumber - TODO: add argument description
2199 EFI_SUCCESS - TODO: Add description for return value
2209 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
2211 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
2213 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
2214 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
2217 // Check to see whether a pci device is present
2219 Status
= PciDevicePresent (
2227 if (!EFI_ERROR (Status
) && (IS_PCI_BRIDGE (&Pci
))) {
2229 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x18);
2230 Status
= PciRootBridgeIo
->Pci
.Read (
2238 // Reset register 18h, 19h, 1Ah on PCI Bridge
2240 Register
&= 0xFF000000;
2241 Status
= PciRootBridgeIo
->Pci
.Write (
2250 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
2252 // Skip sub functions, this is not a multi function device
2254 Func
= PCI_MAX_FUNC
;