3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
26 * Universal Host Controller Interface data structures and defines
29 #include <IndustryStandard/pci22.h>
31 #define EFI_D_UHCI EFI_D_INFO
36 #define STALL_1_MILLI_SECOND 1000
37 #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND
39 #define FORCE_GLOBAL_RESUME_TIME 20 * STALL_1_MILLI_SECOND
41 #define ROOT_PORT_REST_TIME 50 * STALL_1_MILLI_SECOND
43 #define PORT_RESET_RECOVERY_TIME 10 * STALL_1_MILLI_SECOND
48 #define INTERRUPT_POLLING_TIME 50 * 1000 * 10
51 // UHCI IO Space Address Register Register locates at
52 // offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),
53 // so, its BAR Index is 4.
55 #define USB_BAR_INDEX 4
58 // One memory block uses 1 page (common buffer for QH,TD use.)
60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1
62 #define bit(a) (1 << (a))
65 // ////////////////////////////////////////////////////////////////////////
67 // Universal Host Controller Registers Definitions
69 //////////////////////////////////////////////////////////////////////////
70 extern UINT16 USBBaseAddr
;
72 /* Command register */
73 #define USBCMD 0 /* Command Register Offset 00-01h */
74 #define USBCMD_RS bit (0) /* Run/Stop */
75 #define USBCMD_HCRESET bit (1) /* Host reset */
76 #define USBCMD_GRESET bit (2) /* Global reset */
77 #define USBCMD_EGSM bit (3) /* Global Suspend Mode */
78 #define USBCMD_FGR bit (4) /* Force Global Resume */
79 #define USBCMD_SWDBG bit (5) /* SW Debug mode */
80 #define USBCMD_CF bit (6) /* Config Flag (sw only) */
81 #define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */
84 #define USBSTS 2 /* Status Register Offset 02-03h */
85 #define USBSTS_USBINT bit (0) /* Interrupt due to IOC */
86 #define USBSTS_ERROR bit (1) /* Interrupt due to error */
87 #define USBSTS_RD bit (2) /* Resume Detect */
88 #define USBSTS_HSE bit (3) /* Host System Error*/
89 #define USBSTS_HCPE bit (4) /* Host Controller Process Error*/
90 #define USBSTS_HCH bit (5) /* HC Halted */
92 /* Interrupt enable register */
93 #define USBINTR 4 /* Interrupt Enable Register 04-05h */
94 #define USBINTR_TIMEOUT bit (0) /* Timeout/CRC error enable */
95 #define USBINTR_RESUME bit (1) /* Resume interrupt enable */
96 #define USBINTR_IOC bit (2) /* Interrupt On Complete enable */
97 #define USBINTR_SP bit (3) /* Short packet interrupt enable */
99 /* Frame Number Register Offset 06-08h */
102 /* Frame List Base Address Register Offset 08-0Bh */
103 #define USBFLBASEADD 8
105 /* Start of Frame Modify Register Offset 0Ch */
108 /* USB port status and control registers */
109 #define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
110 #define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
112 #define USBPORTSC_CCS bit (0) /* Current Connect Status*/
113 #define USBPORTSC_CSC bit (1) /* Connect Status Change */
114 #define USBPORTSC_PED bit (2) /* Port Enable / Disable */
115 #define USBPORTSC_PEDC bit (3) /* Port Enable / Disable Change */
116 #define USBPORTSC_LSL bit (4) /* Line Status Low bit*/
117 #define USBPORTSC_LSH bit (5) /* Line Status High bit*/
118 #define USBPORTSC_RD bit (6) /* Resume Detect */
119 #define USBPORTSC_LSDA bit (8) /* Low Speed Device Attached */
120 #define USBPORTSC_PR bit (9) /* Port Reset */
121 #define USBPORTSC_SUSP bit (12) /* Suspend */
123 /* PCI Configuration Registers for USB */
126 // Class Code Register offset
130 // USB IO Space Base Address Register offset
135 // USB legacy Support
137 #define USB_EMULATION 0xc0
140 // USB Base Class Code,Sub-Class Code and Programming Interface.
142 #define PCI_CLASSC_PI_UHCI 0x00
144 #define SETUP_PACKET_ID 0x2D
145 #define INPUT_PACKET_ID 0x69
146 #define OUTPUT_PACKET_ID 0xE1
147 #define ERROR_PACKET_ID 0x55
150 // ////////////////////////////////////////////////////////////////////////
152 // USB Transfer Mechanism Data Structures
154 //////////////////////////////////////////////////////////////////////////
157 // USB Class Code structure
166 UINT32 QHHorizontalTerminate
: 1;
167 UINT32 QHHorizontalQSelect
: 1;
168 UINT32 QHHorizontalRsvd
: 2;
169 UINT32 QHHorizontalPtr
: 28;
170 UINT32 QHVerticalTerminate
: 1;
171 UINT32 QHVerticalQSelect
: 1;
172 UINT32 QHVerticalRsvd
: 2;
173 UINT32 QHVerticalPtr
: 28;
177 UINT32 TDLinkPtrTerminate
: 1;
178 UINT32 TDLinkPtrQSelect
: 1;
179 UINT32 TDLinkPtrDepthSelect
: 1;
180 UINT32 TDLinkPtrRsvd
: 1;
181 UINT32 TDLinkPtr
: 28;
182 UINT32 TDStatusActualLength
: 11;
183 UINT32 TDStatusRsvd
: 5;
185 UINT32 TDStatusIOC
: 1;
186 UINT32 TDStatusIOS
: 1;
187 UINT32 TDStatusLS
: 1;
188 UINT32 TDStatusErr
: 2;
189 UINT32 TDStatusSPD
: 1;
190 UINT32 TDStatusRsvd2
: 2;
191 UINT32 TDTokenPID
: 8;
192 UINT32 TDTokenDevAddr
: 7;
193 UINT32 TDTokenEndPt
: 4;
194 UINT32 TDTokenDataToggle
: 1;
195 UINT32 TDTokenRsvd
: 1;
196 UINT32 TDTokenMaxLen
: 11;
206 VOID
*ptrNextIntQH
; // for interrupt transfer's special use
215 UINT16 TDBufferLength
;
220 // ////////////////////////////////////////////////////////////////////////
222 // Universal Host Controller Device Data Structure
224 //////////////////////////////////////////////////////////////////////////
225 #define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)
226 #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)
228 #define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')
229 #define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')
238 TD_STRUCT
*PtrFirstTD
;
243 UINT8
*DataBuffer
; // allocated host memory, not mapped memory
244 EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack
;
245 VOID
*InterruptContext
;
248 #define INTERRUPT_LIST_FROM_LINK(a) CR (a, INTERRUPT_LIST, Link, INTERRUPT_LIST_SIGNATURE)
251 UINT32 FrameListPtrTerminate
: 1;
252 UINT32 FrameListPtrQSelect
: 1;
253 UINT32 FrameListRsvd
: 2;
254 UINT32 FrameListPtr
: 28;
258 typedef struct _MEMORY_MANAGE_HEADER
{
260 UINTN BitArraySizeInBytes
;
261 UINT8
*MemoryBlockPtr
;
262 UINTN MemoryBlockSizeInBytes
;
264 struct _MEMORY_MANAGE_HEADER
*Next
;
265 } MEMORY_MANAGE_HEADER
;
269 EFI_USB_HC_PROTOCOL UsbHc
;
270 EFI_USB2_HC_PROTOCOL Usb2Hc
;
271 EFI_PCI_IO_PROTOCOL
*PciIo
;
276 LIST_ENTRY InterruptListHead
;
277 FRAMELIST_ENTRY
*FrameListEntry
;
278 VOID
*FrameListMapping
;
279 MEMORY_MANAGE_HEADER
*MemoryHeader
;
280 EFI_EVENT InterruptTransTimer
;
281 EFI_UNICODE_STRING_TABLE
*ControllerNameTable
;
285 extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding
;
286 extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName
;
289 // EFI Component Name Functions
293 UhciComponentNameGetDriverName (
294 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
296 OUT CHAR16
**DriverName
301 UhciComponentNameGetControllerName (
302 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
303 IN EFI_HANDLE ControllerHandle
,
304 IN EFI_HANDLE ChildHandle
, OPTIONAL
306 OUT CHAR16
**ControllerName
311 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
312 IN UINT32 CmdAddrOffset
,
319 Write UHCI Command Register
323 PciIo - EFI_PCI_IO_PROTOCOL
324 CmdAddrOffset - Command address offset
325 UsbCmd - Data to write
336 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
337 IN UINT32 CmdAddrOffset
,
344 Read UHCI Command Register
348 PciIo - EFI_PCI_IO_PROTOCOL
349 CmdAddrOffset - Command address offset
350 Data - Data to return
361 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
362 IN UINT32 StatusAddrOffset
,
369 Write UHCI Staus Register
373 PciIo - EFI_PCI_IO_PROTOCOL
374 StatusAddrOffset - Status address offset
375 UsbSts - Data to write
386 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
387 IN UINT32 StatusAddrOffset
,
394 Read UHCI Staus Register
398 PciIo - EFI_PCI_IO_PROTOCOL
399 StatusAddrOffset - Status address offset
400 UsbSts - Data to return
411 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
412 IN UINT32 StatusAddrOffset
418 Clear the content of UHC's Status Register
422 PciIo - EFI_PCI_IO_PROTOCOL
423 StatusAddrOffset - Status address offset
433 ReadUHCFrameNumberReg (
434 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
435 IN UINT32 FrameNumAddrOffset
,
442 Read from UHC's Frame Number Register
446 PciIo - EFI_PCI_IO_PROTOCOL
447 FrameNumAddrOffset - Frame number register offset
448 Data - Data to return
457 WriteUHCFrameListBaseReg (
458 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
459 IN UINT32 FlBaseAddrOffset
,
460 IN UINT32 UsbFrameListBaseAddr
466 Write to UHC's Frame List Base Register
470 PciIo - EFI_PCI_IO_PROTOCOL
471 FlBaseAddrOffset - Frame Base address register
472 UsbFrameListBaseAddr - Address to write
483 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
484 IN UINT32 PortAddrOffset
,
491 Read from UHC's Root Port Register
495 PciIo - EFI_PCI_IO_PROTOCOL
496 PortAddrOffset - Port Addrress Offset,
497 Data - Data to return
507 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
508 IN UINT32 PortAddrOffset
,
509 IN UINT16 ControlBits
515 Write to UHC's Root Port Register
519 PciIo - EFI_PCI_IO_PROTOCOL
520 PortAddrOffset - Port Addrress Offset,
521 ControlBits - Data to write
531 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
532 IN UINT32 StatusRegAddr
,
539 Wait until UHCI halt or timeout
543 PciIo - EFI_PCI_IO_PROTOCOL
544 StatusRegAddr - Status Register Address
545 Timeout - Time out value in us
549 EFI_DEVICE_ERROR - Unable to read the status register
550 EFI_TIMEOUT - Time out
551 EFI_SUCCESS - Success
558 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
559 IN UINT32 StatusRegAddr
565 Judge whether the host controller operates well
569 PciIo - EFI_PCI_IO_PROTOCOL
570 StatusRegAddr - Status register address
574 TRUE - Status is good
575 FALSE - Status is bad
581 IsHostSysOrProcessErr (
582 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
583 IN UINT32 StatusRegAddr
589 Judge the status is HostSys,ProcessErr error or good
593 PciIo - EFI_PCI_IO_PROTOCOL
594 StatusRegAddr - Status register address
598 TRUE - Status is good
599 FALSE - Status is bad
605 GetCurrentFrameNumber (
606 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
607 IN UINT32 FrameNumAddrOffset
613 Get Current Frame Number
617 PciIo - EFI_PCI_IO_PROTOCOL
618 FrameNumAddrOffset - FrameNum register AddrOffset
628 SetFrameListBaseAddress (
629 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
630 IN UINT32 FLBASEADDRReg
,
637 Set FrameListBase Address
641 PciIo - EFI_PCI_IO_PROTOCOL
642 FlBaseAddrReg - FrameListBase register
643 Addr - Address to set
653 GetFrameListBaseAddress (
654 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
661 Get Current Frame Number
665 PciIo - EFI_PCI_IO_PROTOCOL
666 FrameNumAddrOffset - FrameNum register AddrOffset
677 IN USB_HC_DEV
*HcDev
,
678 IN UINT32 FLBASEADDRReg
689 FlBaseAddrReg - Frame List register
693 EFI_OUT_OF_RESOURCES - Can't allocate memory resources
694 EFI_UNSUPPORTED - Map memory fail
695 EFI_SUCCESS - Success
702 IN USB_HC_DEV
*UhcDev
708 Free FrameList buffer
716 EFI_SUCCESS - success
743 IN USB_HC_DEV
*HcDev
,
744 OUT QH_STRUCT
**pptrQH
755 pptrQH - QH_STRUCT content to return
758 EFI_SUCCESS - Success
759 EFI_OUT_OF_RESOURCES - Can't allocate memory
765 SetQHHorizontalLinkPtr (
773 Set QH Horizontal Link Pointer
778 ptrNext - Data to write
788 GetQHHorizontalLinkPtr (
795 Get QH Horizontal Link Pointer
810 SetQHHorizontalQHorTDSelect (
818 Set QH Horizontal QH or TD
823 bQH - TRUE is QH FALSE is TD
832 SetQHHorizontalValidorInvalid (
840 Set QH Horizontal Valid or Invalid
845 bValid - TRUE is Valid FALSE is Invalid
854 SetQHVerticalLinkPtr (
862 Set QH Vertical Link Pointer
867 ptrNext - Data to write
876 GetQHVerticalLinkPtr (
883 Get QH Vertical Link Pointer
897 SetQHVerticalQHorTDSelect (
905 Set QH Vertical QH or TD
910 bQH - TRUE is QH FALSE is TD
920 IsQHHorizontalQHSelect (
927 Is QH Horizontal QH Select
942 SetQHVerticalValidorInvalid (
950 Set QH Vertical Valid or Invalid
955 IsValid - TRUE is valid FALSE is invalid
965 GetQHVerticalValidorInvalid (
972 Get QH Vertical Valid or Invalid
988 IN USB_HC_DEV
*HcDev
,
989 OUT TD_STRUCT
**ppTDStruct
1000 ppTDStruct - place to store TD_STRUCT pointer
1010 IN USB_HC_DEV
*HcDev
,
1011 OUT TD_STRUCT
**pptrTD
1015 Routine Description:
1022 pptrTD - TD_STRUCT pointer to store
1026 EFI_OUT_OF_RESOURCES - Can't allocate resources
1027 EFI_SUCCESS - Success
1035 IN USB_HC_DEV
*HcDev
,
1040 IN UINT8 RequestLen
,
1041 OUT TD_STRUCT
**ppTD
1045 Routine Description:
1047 Generate Setup Stage TD
1052 DevAddr - Device address
1053 Endpoint - Endpoint number
1054 bSlow - Full speed or low speed
1055 pDevReq - Device request
1056 RequestLen - Request length
1057 ppTD - TD_STRUCT to return
1060 EFI_OUT_OF_RESOURCES - Can't allocate memory
1061 EFI_SUCCESS - Success
1068 IN USB_HC_DEV
*HcDev
,
1076 OUT TD_STRUCT
**ppTD
1080 Routine Description:
1082 Generate Data Stage TD
1087 DevAddr - Device address
1088 Endpoint - Endpoint number
1092 Toggle - Data toggle value
1093 bSlow - Full speed or low speed
1094 ppTD - TD_STRUCT to return
1097 EFI_OUT_OF_RESOURCES - Can't allocate memory
1098 EFI_SUCCESS - Success
1105 IN USB_HC_DEV
*HcDev
,
1110 OUT TD_STRUCT
**ppTD
1114 Routine Description:
1116 Generate Setup Stage TD
1121 DevAddr - Device address
1122 Endpoint - Endpoint number
1123 bSlow - Full speed or low speed
1124 pDevReq - Device request
1125 RequestLen - Request length
1126 ppTD - TD_STRUCT to return
1129 EFI_OUT_OF_RESOURCES - Can't allocate memory
1130 EFI_SUCCESS - Success
1136 SetTDLinkPtrValidorInvalid (
1137 IN TD_STRUCT
*ptrTDStruct
,
1142 Routine Description:
1144 Set TD Link Pointer Valid or Invalid
1148 ptrTDStruct - TD_STRUCT
1149 bValid - TRUE is valid FALSE is invalid
1159 SetTDLinkPtrQHorTDSelect (
1160 IN TD_STRUCT
*ptrTDStruct
,
1165 Routine Description:
1167 Set TD Link Pointer QH or TD Select
1171 ptrTDStruct - TD_STRUCT
1172 bQH - TRUE is QH FALSE is TD
1182 SetTDLinkPtrDepthorBreadth (
1183 IN TD_STRUCT
*ptrTDStruct
,
1188 Routine Description:
1190 Set TD Link Pointer depth or bread priority
1194 ptrTDStruct - TD_STRUCT
1195 bDepth - TRUE is Depth FALSE is Breadth
1206 IN TD_STRUCT
*ptrTDStruct
,
1211 Routine Description:
1217 ptrTDStruct - TD_STRUCT
1218 ptrNext - Pointer to set
1229 IN TD_STRUCT
*ptrTDStruct
1233 Routine Description:
1239 ptrTDStruct - TD_STRUCT
1249 EnableorDisableTDShortPacket (
1250 IN TD_STRUCT
*ptrTDStruct
,
1255 Routine Description:
1257 Enable or Disable TD ShortPacket
1261 ptrTDStruct - TD_STRUCT
1262 bEnable - TRUE is Enanble FALSE is Disable
1272 SetTDControlErrorCounter (
1273 IN TD_STRUCT
*ptrTDStruct
,
1278 Routine Description:
1280 Set TD Control ErrorCounter
1284 ptrTDStruct - TD_STRUCT
1285 nMaxErrors - Error counter number
1295 SetTDLoworFullSpeedDevice (
1296 IN TD_STRUCT
*ptrTDStruct
,
1297 IN BOOLEAN bLowSpeedDevice
1301 Routine Description:
1303 Set TD status low speed or full speed
1307 ptrTDStruct - A point to TD_STRUCT
1308 bLowSpeedDevice - Show low speed or full speed
1318 SetTDControlIsochronousorNot (
1319 IN TD_STRUCT
*ptrTDStruct
,
1320 IN BOOLEAN bIsochronous
1324 Routine Description:
1326 Set TD status Isochronous or not
1330 ptrTDStruct - A point to TD_STRUCT
1331 IsIsochronous - Show Isochronous or not
1341 SetorClearTDControlIOC (
1342 IN TD_STRUCT
*ptrTDStruct
,
1347 Routine Description:
1349 Set TD status IOC IsSet
1353 ptrTDStruct - A point to TD_STRUCT
1354 IsSet - Show IOC set or not
1364 SetTDStatusActiveorInactive (
1365 IN TD_STRUCT
*ptrTDStruct
,
1370 Routine Description:
1372 Set TD status active or not
1375 ptrTDStruct - A point to TD_STRUCT
1376 IsActive - Active or not
1386 SetTDTokenMaxLength (
1387 IN TD_STRUCT
*ptrTDStruct
,
1392 Routine Description:
1394 Set TD Token maxlength
1398 ptrTDStruct - A point to TD_STRUCT
1399 MaximumLength - Maximum length of TD Token
1403 Real maximum length set to TD Token
1409 SetTDTokenDataToggle1 (
1410 IN TD_STRUCT
*ptrTDStruct
1414 Routine Description:
1416 Set TD Token data toggle1
1420 ptrTDStruct - A point to TD_STRUCT
1430 SetTDTokenDataToggle0 (
1431 IN TD_STRUCT
*ptrTDStruct
1435 Routine Description:
1437 Set TD Token data toggle0
1441 ptrTDStruct - A point to TD_STRUCT
1451 GetTDTokenDataToggle (
1452 IN TD_STRUCT
*ptrTDStruct
1456 Routine Description:
1458 Get TD Token data toggle
1462 ptrTDStruct - A point to TD_STRUCT
1472 SetTDTokenEndPoint (
1473 IN TD_STRUCT
*ptrTDStruct
,
1478 Routine Description:
1480 Set Data Token endpoint number
1484 ptrTDStruct - A point to TD_STRUCT
1485 EndPoint - End point number
1495 SetTDTokenDeviceAddress (
1496 IN TD_STRUCT
*ptrTDStruct
,
1501 Routine Description:
1503 Set TD Token device address
1507 ptrTDStruct - A point to TD_STRUCT
1508 DeviceAddress - Device address
1518 SetTDTokenPacketID (
1519 IN TD_STRUCT
*ptrTDStruct
,
1524 Routine Description:
1526 Set TD Token packet ID
1530 ptrTDStruct - A point to TD_STRUCT
1542 IN TD_STRUCT
*ptrTDStruct
1546 Routine Description:
1552 ptrTDStruct - A point to TD_STRUCT
1563 IN TD_STRUCT
*ptrTDStruct
1567 Routine Description:
1569 Indicate whether TD status active or not
1573 ptrTDStruct - A point to TD_STRUCT
1585 IN TD_STRUCT
*ptrTDStruct
1589 Routine Description:
1591 Indicate whether TD status stalled or not
1595 ptrTDStruct - A point to TD_STRUCT
1606 IsTDStatusBufferError (
1607 IN TD_STRUCT
*ptrTDStruct
1611 Routine Description:
1613 Indicate whether TD status buffer error or not
1617 ptrTDStruct - A point to TD_STRUCT
1628 IsTDStatusBabbleError (
1629 IN TD_STRUCT
*ptrTDStruct
1633 Routine Description:
1635 Indicate whether TD status babble error or not
1639 ptrTDStruct - A point to TD_STRUCT
1650 IsTDStatusNAKReceived (
1651 IN TD_STRUCT
*ptrTDStruct
1655 Routine Description:
1657 Indicate whether TD status NAK received
1660 ptrTDStruct - A point to TD_STRUCT
1665 FALSE - NAK not received
1671 IsTDStatusCRCTimeOutError (
1672 IN TD_STRUCT
*ptrTDStruct
1676 Routine Description:
1678 Indicate whether TD status CRC timeout error or not
1682 ptrTDStruct - A point to TD_STRUCT
1686 TRUE - CRC timeout error
1687 FALSE - CRC timeout no error
1693 IsTDStatusBitStuffError (
1694 IN TD_STRUCT
*ptrTDStruct
1698 Routine Description:
1700 Indicate whether TD status bit stuff error or not
1704 ptrTDStruct - A point to TD_STRUCT
1708 TRUE - Bit stuff error
1709 FALSE - Bit stuff no error
1715 GetTDStatusActualLength (
1716 IN TD_STRUCT
*ptrTDStruct
1720 Routine Description:
1722 Get TD status length
1726 ptrTDStruct - A point to TD_STRUCT
1730 Return Td status length
1736 GetTDTokenMaxLength (
1737 IN TD_STRUCT
*ptrTDStruct
1741 Routine Description:
1743 Get TD Token maximum length
1747 ptrTDStruct - A point to TD_STRUCT
1751 Return TD token maximum length
1757 GetTDTokenEndPoint (
1758 IN TD_STRUCT
*ptrTDStruct
1762 Routine Description:
1764 Get TD Token endpoint number
1768 ptrTDStruct - A point to TD_STRUCT
1772 Return TD Token endpoint number
1778 GetTDTokenDeviceAddress (
1779 IN TD_STRUCT
*ptrTDStruct
1783 Routine Description:
1785 Get TD Token device address
1789 ptrTDStruct - A point to TD_STRUCT
1793 Return TD Token device address
1799 GetTDTokenPacketID (
1800 IN TD_STRUCT
*ptrTDStruct
1804 Routine Description:
1806 Get TD Token packet ID
1810 ptrTDStruct - A point to TD_STRUCT
1814 Return TD Token packet ID
1821 IN TD_STRUCT
*ptrTDStruct
1825 Routine Description:
1827 Get the point to TD data buffer
1831 ptrTDStruct - A point to TD_STRUCT
1835 Return a point to TD data buffer
1841 GetTDLinkPtrValidorInvalid (
1842 IN TD_STRUCT
*ptrTDStruct
1846 Routine Description:
1848 Get TD LinkPtr valid or not
1852 ptrTDStruct - A point to TD_STRUCT
1864 IN TD_STRUCT
*ptrFirstTD
1868 Routine Description:
1870 Get the number of TDs
1874 PtrFirstTD - A point to the first TD_STRUCT
1878 Return the number of TDs
1885 IN QH_STRUCT
*ptrQH
,
1890 Routine Description:
1907 IN TD_STRUCT
*ptrPreTD
,
1912 Routine Description:
1918 ptrPreTD - Previous TD_STRUCT to be linked
1919 PtrTD - TD_STRUCT to link
1928 SetorClearCurFrameListTerminate (
1929 IN FRAMELIST_ENTRY
*pCurEntry
,
1934 Routine Description:
1936 Set or clear current framelist terminate
1940 pCurEntry - A point to FRAMELIST_ENTITY
1941 IsSet - TRUE to empty the frame and indicate the Pointer field is valid
1951 SetCurFrameListQHorTD (
1952 IN FRAMELIST_ENTRY
*pCurEntry
,
1957 Routine Description:
1959 Set current framelist QH or TD
1963 pCurEntry - A point to FRAMELIST_ENTITY
1964 IsQH - TRUE to set QH and FALSE to set TD
1974 GetCurFrameListTerminate (
1975 IN FRAMELIST_ENTRY
*pCurEntry
1979 Routine Description:
1981 Get current framelist terminate
1985 pCurEntry - A point to FRAMELIST_ENTITY
1990 FALSE - Not terminate
1996 SetCurFrameListPointer (
1997 IN FRAMELIST_ENTRY
*pCurEntry
,
2002 Routine Description:
2004 Set current framelist pointer
2008 pCurEntry - A point to FRAMELIST_ENTITY
2009 ptr - A point to FrameListPtr point to
2019 GetCurFrameListPointer (
2020 IN FRAMELIST_ENTRY
*pCurEntry
2024 Routine Description:
2026 Get current framelist pointer
2030 pCurEntry - A point to FRAMELIST_ENTITY
2034 A point FrameListPtr point to
2041 IN FRAMELIST_ENTRY
*pEntry
,
2042 IN UINT16 FrameListIndex
,
2047 Routine Description:
2049 Link QH To Frame List
2053 pEntry - FRAMELIST_ENTRY
2054 FrameListIndex - Frame List Index
2065 IN USB_HC_DEV
*HcDev
,
2066 IN QH_STRUCT
*ptrQH
,
2067 IN UINT16 FrameListIndex
,
2068 IN BOOLEAN SearchOther
,
2073 Routine Description:
2075 Unlink from frame list and delete single QH
2081 FrameListIndex - Frame List Index
2082 SearchOther - Search Other QH
2083 Delete - TRUE is to delete the QH
2094 IN USB_HC_DEV
*HcDev
,
2095 IN TD_STRUCT
*ptrFirstTD
2099 Routine Description:
2106 PtrFirstTD - TD link list head
2116 InsertQHTDToINTList (
2117 IN USB_HC_DEV
*HcDev
,
2118 IN QH_STRUCT
*ptrQH
,
2119 IN TD_STRUCT
*ptrFirstTD
,
2120 IN UINT8 DeviceAddress
,
2121 IN UINT8 EndPointAddress
,
2122 IN UINT8 DataToggle
,
2123 IN UINTN DataLength
,
2124 IN UINTN PollingInterval
,
2126 IN UINT8
*DataBuffer
,
2127 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction
,
2131 Routine Description:
2133 Insert QH and TD To Interrupt List
2139 PtrFirstTD - First TD_STRUCT
2140 DeviceAddress - Device Address
2141 EndPointAddress - EndPoint Address
2142 DataToggle - Data Toggle
2143 DataLength - Data length
2144 PollingInterval - Polling Interval when inserted to frame list
2145 Mapping - Mapping alue
2146 DataBuffer - Data buffer
2147 CallBackFunction- CallBackFunction after interrupt transfeer
2148 Context - CallBackFunction Context passed as function parameter
2152 EFI_SUCCESS - Sucess
2153 EFI_INVALID_PARAMETER - Paremeter is error
2159 DeleteAsyncINTQHTDs (
2160 IN USB_HC_DEV
*HcDev
,
2161 IN UINT8 DeviceAddress
,
2162 IN UINT8 EndPointAddress
,
2163 OUT UINT8
*DataToggle
2166 Routine Description:
2168 Delete Async INT QH and TDs
2173 DeviceAddress - Device Address
2174 EndPointAddress - EndPoint Address
2175 DataToggle - Data Toggle
2179 EFI_SUCCESS - Sucess
2180 EFI_INVALID_PARAMETER - Paremeter is error
2187 IN TD_STRUCT
*ptrTD
,
2188 IN UINTN RequiredLen
,
2190 OUT UINTN
*ErrTDPos
,
2191 OUT UINTN
*ActualTransferSize
2195 Routine Description:
2201 PtrTD - TD_STRUCT to check
2202 RequiredLen - Required Len
2203 Result - Transfer result
2204 ErrTDPos - Error TD Position
2205 ActualTransferSize - Actual Transfer Size
2216 ExecuteAsyncINTTDs (
2217 IN USB_HC_DEV
*HcDev
,
2218 IN INTERRUPT_LIST
*ptrList
,
2220 OUT UINTN
*ErrTDPos
,
2221 OUT UINTN
*ActualLen
2225 Routine Description:
2227 Execute Async Interrupt TDs
2232 PtrList - INTERRUPT_LIST
2233 Result - Transfer result
2234 ErrTDPos - Error TD Position
2235 ActualTransferSize - Actual Transfer Size
2245 UpdateAsyncINTQHTDs (
2246 IN INTERRUPT_LIST
*ptrList
,
2252 Routine Description:
2254 Update Async Interrupt QH and TDs
2258 PtrList - INTERRUPT_LIST
2259 Result - Transfer reslut
2260 ErrTDPos - Error TD Position
2270 ReleaseInterruptList (
2271 IN USB_HC_DEV
*HcDev
,
2272 IN LIST_ENTRY
*ListHead
2276 Routine Description:
2278 Release Interrupt List
2283 ListHead - List head
2293 ExecuteControlTransfer (
2294 IN USB_HC_DEV
*HcDev
,
2295 IN TD_STRUCT
*ptrTD
,
2297 OUT UINTN
*ActualLen
,
2299 OUT UINT32
*TransferResult
2303 Routine Description:
2305 Execute Control Transfer
2312 ActualLen - Actual transfered Len
2313 TimeOut - TimeOut value in milliseconds
2314 TransferResult - Transfer result
2317 EFI_SUCCESS - Sucess
2318 EFI_DEVICE_ERROR - Error
2325 ExecBulkorSyncInterruptTransfer (
2326 IN USB_HC_DEV
*HcDev
,
2327 IN TD_STRUCT
*ptrTD
,
2329 OUT UINTN
*ActualLen
,
2330 OUT UINT8
*DataToggle
,
2332 OUT UINT32
*TransferResult
2336 Routine Description:
2338 Execute Bulk or SyncInterrupt Transfer
2345 ActualLen - Actual transfered Len
2346 DataToggle - Data Toggle
2347 TimeOut - TimeOut value in milliseconds
2348 TransferResult - Transfer result
2351 EFI_SUCCESS - Sucess
2352 EFI_DEVICE_ERROR - Error
2357 InitializeMemoryManagement (
2358 IN USB_HC_DEV
*HcDev
2362 Routine Description:
2364 Initialize Memory Management
2372 EFI_SUCCESS - Success
2379 IN USB_HC_DEV
*HcDev
,
2380 IN MEMORY_MANAGE_HEADER
**MemoryHeader
,
2381 IN UINTN MemoryBlockSizeInPages
2385 Routine Description:
2387 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
2388 and use PciIo->Map to map the common buffer for Bus Master Read/Write.
2394 MemoryHeader - MEMORY_MANAGE_HEADER to output
2395 MemoryBlockSizeInPages - MemoryBlockSizeInPages
2399 EFI_SUCCESS - Success
2400 EFI_OUT_OF_RESOURCES - Out of resources
2401 EFI_UNSUPPORTED - Unsupported
2408 IN USB_HC_DEV
*HcDev
,
2409 IN MEMORY_MANAGE_HEADER
*MemoryHeader
2413 Routine Description:
2420 MemoryHeader - MemoryHeader to be freed
2424 EFI_INVALID_PARAMETER - Parameter is error
2425 EFI_SUCCESS - Success
2432 IN USB_HC_DEV
*UhcDev
,
2438 Routine Description:
2445 Pool - Place to store pointer to the memory buffer
2446 AllocSize - Alloc Size
2450 EFI_SUCCESS - Success
2457 IN USB_HC_DEV
*HcDev
,
2463 Routine Description:
2471 AllocSize - Pool size
2481 InsertMemoryHeaderToList (
2482 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
2483 IN MEMORY_MANAGE_HEADER
*NewMemoryHeader
2487 Routine Description:
2489 Insert Memory Header To List
2493 MemoryHeader - MEMORY_MANAGE_HEADER
2494 NewMemoryHeader - MEMORY_MANAGE_HEADER
2504 AllocMemInMemoryBlock (
2505 IN MEMORY_MANAGE_HEADER
*MemoryHeader
,
2507 IN UINTN NumberOfMemoryUnit
2511 Routine Description:
2513 Alloc Memory In MemoryBlock
2517 MemoryHeader - MEMORY_MANAGE_HEADER
2518 Pool - Place to store pointer to memory
2519 NumberOfMemoryUnit - Number Of Memory Unit
2523 EFI_NOT_FOUND - Can't find the free memory
2524 EFI_SUCCESS - Success
2530 IsMemoryBlockEmptied (
2531 IN MEMORY_MANAGE_HEADER
*MemoryHeaderPtr
2535 Routine Description:
2537 Is Memory Block Emptied
2541 MemoryHeaderPtr - MEMORY_MANAGE_HEADER
2553 IN MEMORY_MANAGE_HEADER
*FirstMemoryHeader
,
2554 IN MEMORY_MANAGE_HEADER
*FreeMemoryHeader
2558 Routine Description:
2564 FirstMemoryHeader - MEMORY_MANAGE_HEADER
2565 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER
2575 DelMemoryManagement (
2576 IN USB_HC_DEV
*HcDev
2580 Routine Description:
2582 Delete Memory Management
2590 EFI_SUCCESS - Success
2596 EnableMaxPacketSize (
2597 IN USB_HC_DEV
*HcDev
2601 Routine Description:
2603 Enable Max Packet Size
2617 CleanUsbTransactions (
2618 IN USB_HC_DEV
*HcDev
2622 Routine Description:
2624 Clean USB Transactions
2628 HcDev - A point to USB_HC_DEV
2638 TurnOffUSBEmulation (
2639 IN EFI_PCI_IO_PROTOCOL
*PciIo
2643 Routine Description:
2645 Set current framelist QH or TD
2649 pCurEntry - A point to FRAMELIST_ENTITY
2650 IsQH - TRUE to set QH and FALSE to set TD
2661 // Driver model protocol interface
2666 UHCIDriverBindingSupported (
2667 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
2668 IN EFI_HANDLE Controller
,
2669 IN EFI_DEVICE_PATH_PROTOCOL
*RemainingDevicePath
2674 UHCIDriverBindingStart (
2675 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
2676 IN EFI_HANDLE Controller
,
2677 IN EFI_DEVICE_PATH_PROTOCOL
*RemainingDevicePath
2682 UHCIDriverBindingStop (
2683 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
2684 IN EFI_HANDLE Controller
,
2685 IN UINTN NumberOfChildren
,
2686 IN EFI_HANDLE
*ChildHandleBuffer
2690 // UHCI interface functions
2696 IN EFI_USB_HC_PROTOCOL
*This
,
2697 IN UINT16 Attributes
2703 IN EFI_USB_HC_PROTOCOL
*This
,
2704 OUT EFI_USB_HC_STATE
*State
2710 IN EFI_USB_HC_PROTOCOL
*This
,
2711 IN EFI_USB_HC_STATE State
2716 UHCIControlTransfer (
2717 IN EFI_USB_HC_PROTOCOL
*This
,
2718 IN UINT8 DeviceAddress
,
2719 IN BOOLEAN IsSlowDevice
,
2720 IN UINT8 MaximumPacketLength
,
2721 IN EFI_USB_DEVICE_REQUEST
*Request
,
2722 IN EFI_USB_DATA_DIRECTION TransferDirection
,
2723 IN OUT VOID
*Data
, OPTIONAL
2724 IN OUT UINTN
*DataLength
, OPTIONAL
2726 OUT UINT32
*TransferResult
2732 IN EFI_USB_HC_PROTOCOL
*This
,
2733 IN UINT8 DeviceAddress
,
2734 IN UINT8 EndPointAddress
,
2735 IN UINT8 MaximumPacketLength
,
2737 IN OUT UINTN
*DataLength
,
2738 IN OUT UINT8
*DataToggle
,
2740 OUT UINT32
*TransferResult
2745 UHCIAsyncInterruptTransfer (
2746 IN EFI_USB_HC_PROTOCOL
* This
,
2747 IN UINT8 DeviceAddress
,
2748 IN UINT8 EndPointAddress
,
2749 IN BOOLEAN IsSlowDevice
,
2750 IN UINT8 MaximumPacketLength
,
2751 IN BOOLEAN IsNewTransfer
,
2752 IN OUT UINT8
*DataToggle
,
2753 IN UINTN PollingInterval
, OPTIONAL
2754 IN UINTN DataLength
, OPTIONAL
2755 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction
, OPTIONAL
2756 IN VOID
*Context OPTIONAL
2761 UHCISyncInterruptTransfer (
2762 IN EFI_USB_HC_PROTOCOL
*This
,
2763 IN UINT8 DeviceAddress
,
2764 IN UINT8 EndPointAddress
,
2765 IN BOOLEAN IsSlowDevice
,
2766 IN UINT8 MaximumPacketLength
,
2768 IN OUT UINTN
*DataLength
,
2769 IN OUT UINT8
*DataToggle
,
2771 OUT UINT32
*TransferResult
2776 UHCIIsochronousTransfer (
2777 IN EFI_USB_HC_PROTOCOL
*This
,
2778 IN UINT8 DeviceAddress
,
2779 IN UINT8 EndPointAddress
,
2780 IN UINT8 MaximumPacketLength
,
2782 IN UINTN DataLength
,
2783 OUT UINT32
*TransferResult
2788 UHCIAsyncIsochronousTransfer (
2789 IN EFI_USB_HC_PROTOCOL
* This
,
2790 IN UINT8 DeviceAddress
,
2791 IN UINT8 EndPointAddress
,
2792 IN UINT8 MaximumPacketLength
,
2794 IN UINTN DataLength
,
2795 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack
,
2796 IN VOID
*Context OPTIONAL
2801 UHCIGetRootHubPortNumber (
2802 IN EFI_USB_HC_PROTOCOL
*This
,
2803 OUT UINT8
*PortNumber
2808 UHCIGetRootHubPortStatus (
2809 IN EFI_USB_HC_PROTOCOL
*This
,
2810 IN UINT8 PortNumber
,
2811 OUT EFI_USB_PORT_STATUS
*PortStatus
2816 UHCISetRootHubPortFeature (
2817 IN EFI_USB_HC_PROTOCOL
*This
,
2818 IN UINT8 PortNumber
,
2819 IN EFI_USB_PORT_FEATURE PortFeature
2824 UHCIClearRootHubPortFeature (
2825 IN EFI_USB_HC_PROTOCOL
*This
,
2826 IN UINT8 PortNumber
,
2827 IN EFI_USB_PORT_FEATURE PortFeature
2831 // UEFI 2.0 Protocol
2837 IN EFI_USB2_HC_PROTOCOL
* This
,
2838 OUT UINT8
*MaxSpeed
,
2839 OUT UINT8
*PortNumber
,
2840 OUT UINT8
*Is64BitCapable
2846 IN EFI_USB2_HC_PROTOCOL
* This
,
2847 IN UINT16 Attributes
2853 IN EFI_USB2_HC_PROTOCOL
* This
,
2854 OUT EFI_USB_HC_STATE
* State
2860 IN EFI_USB2_HC_PROTOCOL
* This
,
2861 IN EFI_USB_HC_STATE State
2866 UHCI2ControlTransfer (
2867 IN EFI_USB2_HC_PROTOCOL
* This
,
2868 IN UINT8 DeviceAddress
,
2869 IN UINT8 DeviceSpeed
,
2870 IN UINTN MaximumPacketLength
,
2871 IN EFI_USB_DEVICE_REQUEST
* Request
,
2872 IN EFI_USB_DATA_DIRECTION TransferDirection
,
2873 IN OUT VOID
*Data
, OPTIONAL
2874 IN OUT UINTN
*DataLength
, OPTIONAL
2876 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2877 OUT UINT32
*TransferResult
2883 IN EFI_USB2_HC_PROTOCOL
* This
,
2884 IN UINT8 DeviceAddress
,
2885 IN UINT8 EndPointAddress
,
2886 IN UINT8 DeviceSpeed
,
2887 IN UINTN MaximumPacketLength
,
2888 IN UINT8 DataBuffersNumber
,
2889 IN OUT VOID
*Data
[EFI_USB_MAX_BULK_BUFFER_NUM
],
2890 IN OUT UINTN
*DataLength
,
2891 IN OUT UINT8
*DataToggle
,
2893 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2894 OUT UINT32
*TransferResult
2899 UHCI2AsyncInterruptTransfer (
2900 IN EFI_USB2_HC_PROTOCOL
* This
,
2901 IN UINT8 DeviceAddress
,
2902 IN UINT8 EndPointAddress
,
2903 IN UINT8 DeviceSpeed
,
2904 IN UINTN MaximumPacketLength
,
2905 IN BOOLEAN IsNewTransfer
,
2906 IN OUT UINT8
*DataToggle
,
2907 IN UINTN PollingInterval
, OPTIONAL
2908 IN UINTN DataLength
, OPTIONAL
2909 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2910 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction
, OPTIONAL
2911 IN VOID
*Context OPTIONAL
2916 UHCI2SyncInterruptTransfer (
2917 IN EFI_USB2_HC_PROTOCOL
* This
,
2918 IN UINT8 DeviceAddress
,
2919 IN UINT8 EndPointAddress
,
2920 IN UINT8 DeviceSpeed
,
2921 IN UINTN MaximumPacketLength
,
2923 IN OUT UINTN
*DataLength
,
2924 IN OUT UINT8
*DataToggle
,
2926 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2927 OUT UINT32
*TransferResult
2932 UHCI2IsochronousTransfer (
2933 IN EFI_USB2_HC_PROTOCOL
* This
,
2934 IN UINT8 DeviceAddress
,
2935 IN UINT8 EndPointAddress
,
2936 IN UINT8 DeviceSpeed
,
2937 IN UINTN MaximumPacketLength
,
2938 IN UINT8 DataBuffersNumber
,
2939 IN OUT VOID
*Data
[EFI_USB_MAX_ISO_BUFFER_NUM
],
2940 IN UINTN DataLength
,
2941 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2942 OUT UINT32
*TransferResult
2947 UHCI2AsyncIsochronousTransfer (
2948 IN EFI_USB2_HC_PROTOCOL
* This
,
2949 IN UINT8 DeviceAddress
,
2950 IN UINT8 EndPointAddress
,
2951 IN UINT8 DeviceSpeed
,
2952 IN UINTN MaximumPacketLength
,
2953 IN UINT8 DataBuffersNumber
,
2954 IN OUT VOID
*Data
[EFI_USB_MAX_ISO_BUFFER_NUM
],
2955 IN UINTN DataLength
,
2956 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
2957 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack
,
2958 IN VOID
*Context OPTIONAL
2963 UHCI2GetRootHubPortStatus (
2964 IN EFI_USB2_HC_PROTOCOL
* This
,
2965 IN UINT8 PortNumber
,
2966 OUT EFI_USB_PORT_STATUS
* PortStatus
2971 UHCI2SetRootHubPortFeature (
2972 IN EFI_USB2_HC_PROTOCOL
* This
,
2973 IN UINT8 PortNumber
,
2974 IN EFI_USB_PORT_FEATURE PortFeature
2979 UHCI2ClearRootHubPortFeature (
2980 IN EFI_USB2_HC_PROTOCOL
* This
,
2981 IN UINT8 PortNumber
,
2982 IN EFI_USB_PORT_FEATURE PortFeature
2986 // Asynchronous interrupt transfer monitor function
2990 MonitorInterruptTrans (