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1 /*++
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 Uhci.h
15
16 Abstract:
17
18
19 Revision History
20 --*/
21
22 #ifndef _UHCI_H
23 #define _UHCI_H
24
25 /*
26 * Universal Host Controller Interface data structures and defines
27 */
28
29 #include <IndustryStandard/pci22.h>
30
31 #define EFI_D_UHCI EFI_D_INFO
32
33 //
34 // stall time
35 //
36 #define STALL_1_MILLI_SECOND 1000
37 #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND
38
39 #define FORCE_GLOBAL_RESUME_TIME 20 * STALL_1_MILLI_SECOND
40
41 #define ROOT_PORT_REST_TIME 50 * STALL_1_MILLI_SECOND
42
43 #define PORT_RESET_RECOVERY_TIME 10 * STALL_1_MILLI_SECOND
44
45 //
46 // 50 ms
47 //
48 #define INTERRUPT_POLLING_TIME 50 * 1000 * 10
49
50 //
51 // UHCI IO Space Address Register Register locates at
52 // offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),
53 // so, its BAR Index is 4.
54 //
55 #define USB_BAR_INDEX 4
56
57 //
58 // One memory block uses 1 page (common buffer for QH,TD use.)
59 //
60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1
61
62 #define bit(a) (1 << (a))
63
64 //
65 // ////////////////////////////////////////////////////////////////////////
66 //
67 // Universal Host Controller Registers Definitions
68 //
69 //////////////////////////////////////////////////////////////////////////
70 extern UINT16 USBBaseAddr;
71
72 /* Command register */
73 #define USBCMD 0 /* Command Register Offset 00-01h */
74 #define USBCMD_RS bit (0) /* Run/Stop */
75 #define USBCMD_HCRESET bit (1) /* Host reset */
76 #define USBCMD_GRESET bit (2) /* Global reset */
77 #define USBCMD_EGSM bit (3) /* Global Suspend Mode */
78 #define USBCMD_FGR bit (4) /* Force Global Resume */
79 #define USBCMD_SWDBG bit (5) /* SW Debug mode */
80 #define USBCMD_CF bit (6) /* Config Flag (sw only) */
81 #define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */
82
83 /* Status register */
84 #define USBSTS 2 /* Status Register Offset 02-03h */
85 #define USBSTS_USBINT bit (0) /* Interrupt due to IOC */
86 #define USBSTS_ERROR bit (1) /* Interrupt due to error */
87 #define USBSTS_RD bit (2) /* Resume Detect */
88 #define USBSTS_HSE bit (3) /* Host System Error*/
89 #define USBSTS_HCPE bit (4) /* Host Controller Process Error*/
90 #define USBSTS_HCH bit (5) /* HC Halted */
91
92 /* Interrupt enable register */
93 #define USBINTR 4 /* Interrupt Enable Register 04-05h */
94 #define USBINTR_TIMEOUT bit (0) /* Timeout/CRC error enable */
95 #define USBINTR_RESUME bit (1) /* Resume interrupt enable */
96 #define USBINTR_IOC bit (2) /* Interrupt On Complete enable */
97 #define USBINTR_SP bit (3) /* Short packet interrupt enable */
98
99 /* Frame Number Register Offset 06-08h */
100 #define USBFRNUM 6
101
102 /* Frame List Base Address Register Offset 08-0Bh */
103 #define USBFLBASEADD 8
104
105 /* Start of Frame Modify Register Offset 0Ch */
106 #define USBSOF 0x0c
107
108 /* USB port status and control registers */
109 #define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
110 #define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
111
112 #define USBPORTSC_CCS bit (0) /* Current Connect Status*/
113 #define USBPORTSC_CSC bit (1) /* Connect Status Change */
114 #define USBPORTSC_PED bit (2) /* Port Enable / Disable */
115 #define USBPORTSC_PEDC bit (3) /* Port Enable / Disable Change */
116 #define USBPORTSC_LSL bit (4) /* Line Status Low bit*/
117 #define USBPORTSC_LSH bit (5) /* Line Status High bit*/
118 #define USBPORTSC_RD bit (6) /* Resume Detect */
119 #define USBPORTSC_LSDA bit (8) /* Low Speed Device Attached */
120 #define USBPORTSC_PR bit (9) /* Port Reset */
121 #define USBPORTSC_SUSP bit (12) /* Suspend */
122
123 /* PCI Configuration Registers for USB */
124
125 //
126 // Class Code Register offset
127 //
128 #define CLASSC 0x09
129 //
130 // USB IO Space Base Address Register offset
131 //
132 #define USBBASE 0x20
133
134 //
135 // USB legacy Support
136 //
137 #define USB_EMULATION 0xc0
138
139 //
140 // USB Base Class Code,Sub-Class Code and Programming Interface.
141 //
142 #define PCI_CLASSC_PI_UHCI 0x00
143
144 #define SETUP_PACKET_ID 0x2D
145 #define INPUT_PACKET_ID 0x69
146 #define OUTPUT_PACKET_ID 0xE1
147 #define ERROR_PACKET_ID 0x55
148
149 //
150 // ////////////////////////////////////////////////////////////////////////
151 //
152 // USB Transfer Mechanism Data Structures
153 //
154 //////////////////////////////////////////////////////////////////////////
155 #pragma pack(1)
156 //
157 // USB Class Code structure
158 //
159 typedef struct {
160 UINT8 PI;
161 UINT8 SubClassCode;
162 UINT8 BaseCode;
163 } USB_CLASSC;
164
165 typedef struct {
166 UINT32 QHHorizontalTerminate : 1;
167 UINT32 QHHorizontalQSelect : 1;
168 UINT32 QHHorizontalRsvd : 2;
169 UINT32 QHHorizontalPtr : 28;
170 UINT32 QHVerticalTerminate : 1;
171 UINT32 QHVerticalQSelect : 1;
172 UINT32 QHVerticalRsvd : 2;
173 UINT32 QHVerticalPtr : 28;
174 } QUEUE_HEAD;
175
176 typedef struct {
177 UINT32 TDLinkPtrTerminate : 1;
178 UINT32 TDLinkPtrQSelect : 1;
179 UINT32 TDLinkPtrDepthSelect : 1;
180 UINT32 TDLinkPtrRsvd : 1;
181 UINT32 TDLinkPtr : 28;
182 UINT32 TDStatusActualLength : 11;
183 UINT32 TDStatusRsvd : 5;
184 UINT32 TDStatus : 8;
185 UINT32 TDStatusIOC : 1;
186 UINT32 TDStatusIOS : 1;
187 UINT32 TDStatusLS : 1;
188 UINT32 TDStatusErr : 2;
189 UINT32 TDStatusSPD : 1;
190 UINT32 TDStatusRsvd2 : 2;
191 UINT32 TDTokenPID : 8;
192 UINT32 TDTokenDevAddr : 7;
193 UINT32 TDTokenEndPt : 4;
194 UINT32 TDTokenDataToggle : 1;
195 UINT32 TDTokenRsvd : 1;
196 UINT32 TDTokenMaxLen : 11;
197 UINT32 TDBufferPtr;
198 } TD;
199
200 #pragma pack()
201
202 typedef struct {
203 QUEUE_HEAD QH;
204 VOID *ptrNext;
205 VOID *ptrDown;
206 VOID *ptrNextIntQH; // for interrupt transfer's special use
207 VOID *LoopPtr;
208 } QH_STRUCT;
209
210 typedef struct {
211 TD TDData;
212 UINT8 *pTDBuffer;
213 VOID *ptrNextTD;
214 VOID *ptrNextQH;
215 UINT16 TDBufferLength;
216 UINT16 reserved;
217 } TD_STRUCT;
218
219 //
220 // ////////////////////////////////////////////////////////////////////////
221 //
222 // Universal Host Controller Device Data Structure
223 //
224 //////////////////////////////////////////////////////////////////////////
225 #define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)
226 #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)
227
228 #define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')
229 #define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')
230 typedef struct {
231 UINTN Signature;
232
233 LIST_ENTRY Link;
234 UINT8 DevAddr;
235 UINT8 EndPoint;
236 UINT8 DataToggle;
237 UINT8 Reserved[5];
238 TD_STRUCT *PtrFirstTD;
239 QH_STRUCT *PtrQH;
240 UINTN DataLen;
241 UINTN PollInterval;
242 VOID *Mapping;
243 UINT8 *DataBuffer; // allocated host memory, not mapped memory
244 EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack;
245 VOID *InterruptContext;
246 } INTERRUPT_LIST;
247
248 #define INTERRUPT_LIST_FROM_LINK(a) CR (a, INTERRUPT_LIST, Link, INTERRUPT_LIST_SIGNATURE)
249
250 typedef struct {
251 UINT32 FrameListPtrTerminate : 1;
252 UINT32 FrameListPtrQSelect : 1;
253 UINT32 FrameListRsvd : 2;
254 UINT32 FrameListPtr : 28;
255
256 } FRAMELIST_ENTRY;
257
258 typedef struct _MEMORY_MANAGE_HEADER {
259 UINT8 *BitArrayPtr;
260 UINTN BitArraySizeInBytes;
261 UINT8 *MemoryBlockPtr;
262 UINTN MemoryBlockSizeInBytes;
263 VOID *Mapping;
264 struct _MEMORY_MANAGE_HEADER *Next;
265 } MEMORY_MANAGE_HEADER;
266
267 typedef struct {
268 UINTN Signature;
269 EFI_USB_HC_PROTOCOL UsbHc;
270 EFI_USB2_HC_PROTOCOL Usb2Hc;
271 EFI_PCI_IO_PROTOCOL *PciIo;
272
273 //
274 // local data
275 //
276 LIST_ENTRY InterruptListHead;
277 FRAMELIST_ENTRY *FrameListEntry;
278 VOID *FrameListMapping;
279 MEMORY_MANAGE_HEADER *MemoryHeader;
280 EFI_EVENT InterruptTransTimer;
281 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
282
283 } USB_HC_DEV;
284
285 extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;
286 extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;
287
288 //
289 // EFI Component Name Functions
290 //
291 EFI_STATUS
292 EFIAPI
293 UhciComponentNameGetDriverName (
294 IN EFI_COMPONENT_NAME_PROTOCOL *This,
295 IN CHAR8 *Language,
296 OUT CHAR16 **DriverName
297 );
298
299 EFI_STATUS
300 EFIAPI
301 UhciComponentNameGetControllerName (
302 IN EFI_COMPONENT_NAME_PROTOCOL *This,
303 IN EFI_HANDLE ControllerHandle,
304 IN EFI_HANDLE ChildHandle, OPTIONAL
305 IN CHAR8 *Language,
306 OUT CHAR16 **ControllerName
307 );
308
309 EFI_STATUS
310 WriteUHCCommandReg (
311 IN EFI_PCI_IO_PROTOCOL *PciIo,
312 IN UINT32 CmdAddrOffset,
313 IN UINT16 UsbCmd
314 )
315 /*++
316
317 Routine Description:
318
319 Write UHCI Command Register
320
321 Arguments:
322
323 PciIo - EFI_PCI_IO_PROTOCOL
324 CmdAddrOffset - Command address offset
325 UsbCmd - Data to write
326
327 Returns:
328
329 EFI_SUCCESS
330
331 --*/
332 ;
333
334 EFI_STATUS
335 ReadUHCCommandReg (
336 IN EFI_PCI_IO_PROTOCOL *PciIo,
337 IN UINT32 CmdAddrOffset,
338 IN OUT UINT16 *Data
339 )
340 /*++
341
342 Routine Description:
343
344 Read UHCI Command Register
345
346 Arguments:
347
348 PciIo - EFI_PCI_IO_PROTOCOL
349 CmdAddrOffset - Command address offset
350 Data - Data to return
351
352 Returns:
353
354 EFI_SUCCESS
355
356 --*/
357 ;
358
359 EFI_STATUS
360 WriteUHCStatusReg (
361 IN EFI_PCI_IO_PROTOCOL *PciIo,
362 IN UINT32 StatusAddrOffset,
363 IN UINT16 UsbSts
364 )
365 /*++
366
367 Routine Description:
368
369 Write UHCI Staus Register
370
371 Arguments:
372
373 PciIo - EFI_PCI_IO_PROTOCOL
374 StatusAddrOffset - Status address offset
375 UsbSts - Data to write
376
377 Returns:
378
379 EFI_SUCCESS
380
381 --*/
382 ;
383
384 EFI_STATUS
385 ReadUHCStatusReg (
386 IN EFI_PCI_IO_PROTOCOL *PciIo,
387 IN UINT32 StatusAddrOffset,
388 IN OUT UINT16 *Data
389 )
390 /*++
391
392 Routine Description:
393
394 Read UHCI Staus Register
395
396 Arguments:
397
398 PciIo - EFI_PCI_IO_PROTOCOL
399 StatusAddrOffset - Status address offset
400 UsbSts - Data to return
401
402 Returns:
403
404 EFI_SUCCESS
405
406 --*/
407 ;
408
409 EFI_STATUS
410 ClearStatusReg (
411 IN EFI_PCI_IO_PROTOCOL *PciIo,
412 IN UINT32 StatusAddrOffset
413 )
414 /*++
415
416 Routine Description:
417
418 Clear the content of UHC's Status Register
419
420 Arguments:
421
422 PciIo - EFI_PCI_IO_PROTOCOL
423 StatusAddrOffset - Status address offset
424
425 Returns:
426
427 EFI_SUCCESS
428
429 --*/
430 ;
431
432 EFI_STATUS
433 ReadUHCFrameNumberReg (
434 IN EFI_PCI_IO_PROTOCOL *PciIo,
435 IN UINT32 FrameNumAddrOffset,
436 IN OUT UINT16 *Data
437 )
438 /*++
439
440 Routine Description:
441
442 Read from UHC's Frame Number Register
443
444 Arguments:
445
446 PciIo - EFI_PCI_IO_PROTOCOL
447 FrameNumAddrOffset - Frame number register offset
448 Data - Data to return
449 Returns:
450
451 EFI_SUCCESS
452
453 --*/
454 ;
455
456 EFI_STATUS
457 WriteUHCFrameListBaseReg (
458 IN EFI_PCI_IO_PROTOCOL *PciIo,
459 IN UINT32 FlBaseAddrOffset,
460 IN UINT32 UsbFrameListBaseAddr
461 )
462 /*++
463
464 Routine Description:
465
466 Write to UHC's Frame List Base Register
467
468 Arguments:
469
470 PciIo - EFI_PCI_IO_PROTOCOL
471 FlBaseAddrOffset - Frame Base address register
472 UsbFrameListBaseAddr - Address to write
473
474 Returns:
475
476 EFI_SUCCESS
477
478 --*/
479 ;
480
481 EFI_STATUS
482 ReadRootPortReg (
483 IN EFI_PCI_IO_PROTOCOL *PciIo,
484 IN UINT32 PortAddrOffset,
485 IN OUT UINT16 *Data
486 )
487 /*++
488
489 Routine Description:
490
491 Read from UHC's Root Port Register
492
493 Arguments:
494
495 PciIo - EFI_PCI_IO_PROTOCOL
496 PortAddrOffset - Port Addrress Offset,
497 Data - Data to return
498 Returns:
499
500 EFI_SUCCESS
501
502 --*/
503 ;
504
505 EFI_STATUS
506 WriteRootPortReg (
507 IN EFI_PCI_IO_PROTOCOL *PciIo,
508 IN UINT32 PortAddrOffset,
509 IN UINT16 ControlBits
510 )
511 /*++
512
513 Routine Description:
514
515 Write to UHC's Root Port Register
516
517 Arguments:
518
519 PciIo - EFI_PCI_IO_PROTOCOL
520 PortAddrOffset - Port Addrress Offset,
521 ControlBits - Data to write
522 Returns:
523
524 EFI_SUCCESS
525
526 --*/
527 ;
528
529 EFI_STATUS
530 WaitForUHCHalt (
531 IN EFI_PCI_IO_PROTOCOL *PciIo,
532 IN UINT32 StatusRegAddr,
533 IN UINTN Timeout
534 )
535 /*++
536
537 Routine Description:
538
539 Wait until UHCI halt or timeout
540
541 Arguments:
542
543 PciIo - EFI_PCI_IO_PROTOCOL
544 StatusRegAddr - Status Register Address
545 Timeout - Time out value in us
546
547 Returns:
548
549 EFI_DEVICE_ERROR - Unable to read the status register
550 EFI_TIMEOUT - Time out
551 EFI_SUCCESS - Success
552
553 --*/
554 ;
555
556 BOOLEAN
557 IsStatusOK (
558 IN EFI_PCI_IO_PROTOCOL *PciIo,
559 IN UINT32 StatusRegAddr
560 )
561 /*++
562
563 Routine Description:
564
565 Judge whether the host controller operates well
566
567 Arguments:
568
569 PciIo - EFI_PCI_IO_PROTOCOL
570 StatusRegAddr - Status register address
571
572 Returns:
573
574 TRUE - Status is good
575 FALSE - Status is bad
576
577 --*/
578 ;
579
580 BOOLEAN
581 IsHostSysOrProcessErr (
582 IN EFI_PCI_IO_PROTOCOL *PciIo,
583 IN UINT32 StatusRegAddr
584 )
585 /*++
586
587 Routine Description:
588
589 Judge the status is HostSys,ProcessErr error or good
590
591 Arguments:
592
593 PciIo - EFI_PCI_IO_PROTOCOL
594 StatusRegAddr - Status register address
595
596 Returns:
597
598 TRUE - Status is good
599 FALSE - Status is bad
600
601 --*/
602 ;
603
604 UINT16
605 GetCurrentFrameNumber (
606 IN EFI_PCI_IO_PROTOCOL *PciIo,
607 IN UINT32 FrameNumAddrOffset
608 )
609 /*++
610
611 Routine Description:
612
613 Get Current Frame Number
614
615 Arguments:
616
617 PciIo - EFI_PCI_IO_PROTOCOL
618 FrameNumAddrOffset - FrameNum register AddrOffset
619
620 Returns:
621
622 Frame number
623
624 --*/
625 ;
626
627 EFI_STATUS
628 SetFrameListBaseAddress (
629 IN EFI_PCI_IO_PROTOCOL *PciIo,
630 IN UINT32 FLBASEADDRReg,
631 IN UINT32 Addr
632 )
633 /*++
634
635 Routine Description:
636
637 Set FrameListBase Address
638
639 Arguments:
640
641 PciIo - EFI_PCI_IO_PROTOCOL
642 FlBaseAddrReg - FrameListBase register
643 Addr - Address to set
644
645 Returns:
646
647 EFI_SUCCESS
648
649 --*/
650 ;
651
652 UINT32
653 GetFrameListBaseAddress (
654 IN EFI_PCI_IO_PROTOCOL *PciIo,
655 IN UINT32 FLBAddr
656 )
657 /*++
658
659 Routine Description:
660
661 Get Current Frame Number
662
663 Arguments:
664
665 PciIo - EFI_PCI_IO_PROTOCOL
666 FrameNumAddrOffset - FrameNum register AddrOffset
667
668 Returns:
669
670 Frame number
671
672 --*/
673 ;
674
675 EFI_STATUS
676 CreateFrameList (
677 IN USB_HC_DEV *HcDev,
678 IN UINT32 FLBASEADDRReg
679 )
680 /*++
681
682 Routine Description:
683
684 CreateFrameList
685
686 Arguments:
687
688 HcDev - USB_HC_DEV
689 FlBaseAddrReg - Frame List register
690
691 Returns:
692
693 EFI_OUT_OF_RESOURCES - Can't allocate memory resources
694 EFI_UNSUPPORTED - Map memory fail
695 EFI_SUCCESS - Success
696
697 --*/
698 ;
699
700 EFI_STATUS
701 FreeFrameListEntry (
702 IN USB_HC_DEV *UhcDev
703 )
704 /*++
705
706 Routine Description:
707
708 Free FrameList buffer
709
710 Arguments:
711
712 HcDev - USB_HC_DEV
713
714 Returns:
715
716 EFI_SUCCESS - success
717
718 --*/
719 ;
720
721 VOID
722 InitFrameList (
723 IN USB_HC_DEV *HcDev
724 )
725 /*++
726
727 Routine Description:
728
729 Initialize FrameList
730
731 Arguments:
732
733 HcDev - USB_HC_DEV
734
735 Returns:
736 VOID
737
738 --*/
739 ;
740
741 EFI_STATUS
742 CreateQH (
743 IN USB_HC_DEV *HcDev,
744 OUT QH_STRUCT **pptrQH
745 )
746 /*++
747
748 Routine Description:
749
750 CreateQH
751
752 Arguments:
753
754 HcDev - USB_HC_DEV
755 pptrQH - QH_STRUCT content to return
756 Returns:
757
758 EFI_SUCCESS - Success
759 EFI_OUT_OF_RESOURCES - Can't allocate memory
760
761 --*/
762 ;
763
764 VOID
765 SetQHHorizontalLinkPtr (
766 IN QH_STRUCT *ptrQH,
767 IN VOID *ptrNext
768 )
769 /*++
770
771 Routine Description:
772
773 Set QH Horizontal Link Pointer
774
775 Arguments:
776
777 PtrQH - QH_STRUCT
778 ptrNext - Data to write
779
780 Returns:
781
782 VOID
783
784 --*/
785 ;
786
787 VOID *
788 GetQHHorizontalLinkPtr (
789 IN QH_STRUCT *ptrQH
790 )
791 /*++
792
793 Routine Description:
794
795 Get QH Horizontal Link Pointer
796
797 Arguments:
798
799 PtrQH - QH_STRUCT
800
801
802 Returns:
803
804 Data to return
805
806 --*/
807 ;
808
809 VOID
810 SetQHHorizontalQHorTDSelect (
811 IN QH_STRUCT *ptrQH,
812 IN BOOLEAN bQH
813 )
814 /*++
815
816 Routine Description:
817
818 Set QH Horizontal QH or TD
819
820 Arguments:
821
822 PtrQH - QH_STRUCT
823 bQH - TRUE is QH FALSE is TD
824
825 Returns:
826 VOID
827
828 --*/
829 ;
830
831 VOID
832 SetQHHorizontalValidorInvalid (
833 IN QH_STRUCT *ptrQH,
834 IN BOOLEAN bValid
835 )
836 /*++
837
838 Routine Description:
839
840 Set QH Horizontal Valid or Invalid
841
842 Arguments:
843
844 PtrQH - QH_STRUCT
845 bValid - TRUE is Valid FALSE is Invalid
846
847 Returns:
848 VOID
849
850 --*/
851 ;
852
853 VOID
854 SetQHVerticalLinkPtr (
855 IN QH_STRUCT *ptrQH,
856 IN VOID *ptrNext
857 )
858 /*++
859
860 Routine Description:
861
862 Set QH Vertical Link Pointer
863
864 Arguments:
865
866 PtrQH - QH_STRUCT
867 ptrNext - Data to write
868 Returns:
869
870 VOID
871
872 --*/
873 ;
874
875 VOID *
876 GetQHVerticalLinkPtr (
877 IN QH_STRUCT *ptrQH
878 )
879 /*++
880
881 Routine Description:
882
883 Get QH Vertical Link Pointer
884
885 Arguments:
886
887 PtrQH - QH_STRUCT
888
889 Returns:
890
891 Data to return
892
893 --*/
894 ;
895
896 VOID
897 SetQHVerticalQHorTDSelect (
898 IN QH_STRUCT *ptrQH,
899 IN BOOLEAN bQH
900 )
901 /*++
902
903 Routine Description:
904
905 Set QH Vertical QH or TD
906
907 Arguments:
908
909 PtrQH - QH_STRUCT
910 bQH - TRUE is QH FALSE is TD
911
912 Returns:
913
914 VOID
915
916 --*/
917 ;
918
919 BOOLEAN
920 IsQHHorizontalQHSelect (
921 IN QH_STRUCT *ptrQH
922 )
923 /*++
924
925 Routine Description:
926
927 Is QH Horizontal QH Select
928
929 Arguments:
930
931 PtrQH - QH_STRUCT
932
933 Returns:
934
935 TRUE - QH
936 FALSE - TD
937
938 --*/
939 ;
940
941 VOID
942 SetQHVerticalValidorInvalid (
943 IN QH_STRUCT *ptrQH,
944 IN BOOLEAN bValid
945 )
946 /*++
947
948 Routine Description:
949
950 Set QH Vertical Valid or Invalid
951
952 Arguments:
953
954 PtrQH - QH_STRUCT
955 IsValid - TRUE is valid FALSE is invalid
956
957 Returns:
958
959 VOID
960
961 --*/
962 ;
963
964 BOOLEAN
965 GetQHVerticalValidorInvalid (
966 IN QH_STRUCT *ptrQH
967 )
968 /*++
969
970 Routine Description:
971
972 Get QH Vertical Valid or Invalid
973
974 Arguments:
975
976 PtrQH - QH_STRUCT
977
978 Returns:
979
980 TRUE - Valid
981 FALSE - Invalid
982
983 --*/
984 ;
985
986 EFI_STATUS
987 AllocateTDStruct (
988 IN USB_HC_DEV *HcDev,
989 OUT TD_STRUCT **ppTDStruct
990 )
991 /*++
992
993 Routine Description:
994
995 Allocate TD Struct
996
997 Arguments:
998
999 HcDev - USB_HC_DEV
1000 ppTDStruct - place to store TD_STRUCT pointer
1001 Returns:
1002
1003 EFI_SUCCESS
1004
1005 --*/
1006 ;
1007
1008 EFI_STATUS
1009 CreateTD (
1010 IN USB_HC_DEV *HcDev,
1011 OUT TD_STRUCT **pptrTD
1012 )
1013 /*++
1014
1015 Routine Description:
1016
1017 Create TD
1018
1019 Arguments:
1020
1021 HcDev - USB_HC_DEV
1022 pptrTD - TD_STRUCT pointer to store
1023
1024 Returns:
1025
1026 EFI_OUT_OF_RESOURCES - Can't allocate resources
1027 EFI_SUCCESS - Success
1028
1029 --*/
1030 ;
1031
1032
1033 EFI_STATUS
1034 GenSetupStageTD (
1035 IN USB_HC_DEV *HcDev,
1036 IN UINT8 DevAddr,
1037 IN UINT8 Endpoint,
1038 IN BOOLEAN bSlow,
1039 IN UINT8 *pDevReq,
1040 IN UINT8 RequestLen,
1041 OUT TD_STRUCT **ppTD
1042 )
1043 /*++
1044
1045 Routine Description:
1046
1047 Generate Setup Stage TD
1048
1049 Arguments:
1050
1051 HcDev - USB_HC_DEV
1052 DevAddr - Device address
1053 Endpoint - Endpoint number
1054 bSlow - Full speed or low speed
1055 pDevReq - Device request
1056 RequestLen - Request length
1057 ppTD - TD_STRUCT to return
1058 Returns:
1059
1060 EFI_OUT_OF_RESOURCES - Can't allocate memory
1061 EFI_SUCCESS - Success
1062
1063 --*/
1064 ;
1065
1066 EFI_STATUS
1067 GenDataTD (
1068 IN USB_HC_DEV *HcDev,
1069 IN UINT8 DevAddr,
1070 IN UINT8 Endpoint,
1071 IN UINT8 *pData,
1072 IN UINT8 Len,
1073 IN UINT8 PktID,
1074 IN UINT8 Toggle,
1075 IN BOOLEAN bSlow,
1076 OUT TD_STRUCT **ppTD
1077 )
1078 /*++
1079
1080 Routine Description:
1081
1082 Generate Data Stage TD
1083
1084 Arguments:
1085
1086 HcDev - USB_HC_DEV
1087 DevAddr - Device address
1088 Endpoint - Endpoint number
1089 pData - Data buffer
1090 Len - Data length
1091 PktID - Packet ID
1092 Toggle - Data toggle value
1093 bSlow - Full speed or low speed
1094 ppTD - TD_STRUCT to return
1095 Returns:
1096
1097 EFI_OUT_OF_RESOURCES - Can't allocate memory
1098 EFI_SUCCESS - Success
1099
1100 --*/
1101 ;
1102
1103 EFI_STATUS
1104 CreateStatusTD (
1105 IN USB_HC_DEV *HcDev,
1106 IN UINT8 DevAddr,
1107 IN UINT8 Endpoint,
1108 IN UINT8 PktID,
1109 IN BOOLEAN bSlow,
1110 OUT TD_STRUCT **ppTD
1111 )
1112 /*++
1113
1114 Routine Description:
1115
1116 Generate Setup Stage TD
1117
1118 Arguments:
1119
1120 HcDev - USB_HC_DEV
1121 DevAddr - Device address
1122 Endpoint - Endpoint number
1123 bSlow - Full speed or low speed
1124 pDevReq - Device request
1125 RequestLen - Request length
1126 ppTD - TD_STRUCT to return
1127 Returns:
1128
1129 EFI_OUT_OF_RESOURCES - Can't allocate memory
1130 EFI_SUCCESS - Success
1131
1132 --*/
1133 ;
1134
1135 VOID
1136 SetTDLinkPtrValidorInvalid (
1137 IN TD_STRUCT *ptrTDStruct,
1138 IN BOOLEAN bValid
1139 )
1140 /*++
1141
1142 Routine Description:
1143
1144 Set TD Link Pointer Valid or Invalid
1145
1146 Arguments:
1147
1148 ptrTDStruct - TD_STRUCT
1149 bValid - TRUE is valid FALSE is invalid
1150
1151 Returns:
1152
1153 VOID
1154
1155 --*/
1156 ;
1157
1158 VOID
1159 SetTDLinkPtrQHorTDSelect (
1160 IN TD_STRUCT *ptrTDStruct,
1161 IN BOOLEAN bQH
1162 )
1163 /*++
1164
1165 Routine Description:
1166
1167 Set TD Link Pointer QH or TD Select
1168
1169 Arguments:
1170
1171 ptrTDStruct - TD_STRUCT
1172 bQH - TRUE is QH FALSE is TD
1173
1174 Returns:
1175
1176 VOID
1177
1178 --*/
1179 ;
1180
1181 VOID
1182 SetTDLinkPtrDepthorBreadth (
1183 IN TD_STRUCT *ptrTDStruct,
1184 IN BOOLEAN bDepth
1185 )
1186 /*++
1187
1188 Routine Description:
1189
1190 Set TD Link Pointer depth or bread priority
1191
1192 Arguments:
1193
1194 ptrTDStruct - TD_STRUCT
1195 bDepth - TRUE is Depth FALSE is Breadth
1196
1197 Returns:
1198
1199 VOID
1200
1201 --*/
1202 ;
1203
1204 VOID
1205 SetTDLinkPtr (
1206 IN TD_STRUCT *ptrTDStruct,
1207 IN VOID *ptrNext
1208 )
1209 /*++
1210
1211 Routine Description:
1212
1213 Set TD Link Pointer
1214
1215 Arguments:
1216
1217 ptrTDStruct - TD_STRUCT
1218 ptrNext - Pointer to set
1219
1220 Returns:
1221
1222 VOID
1223
1224 --*/
1225 ;
1226
1227 VOID *
1228 GetTDLinkPtr (
1229 IN TD_STRUCT *ptrTDStruct
1230 )
1231 /*++
1232
1233 Routine Description:
1234
1235 Get TD Link Pointer
1236
1237 Arguments:
1238
1239 ptrTDStruct - TD_STRUCT
1240
1241 Returns:
1242
1243 Pointer to get
1244
1245 --*/
1246 ;
1247
1248 VOID
1249 EnableorDisableTDShortPacket (
1250 IN TD_STRUCT *ptrTDStruct,
1251 IN BOOLEAN bEnable
1252 )
1253 /*++
1254
1255 Routine Description:
1256
1257 Enable or Disable TD ShortPacket
1258
1259 Arguments:
1260
1261 ptrTDStruct - TD_STRUCT
1262 bEnable - TRUE is Enanble FALSE is Disable
1263
1264 Returns:
1265
1266 VOID
1267
1268 --*/
1269 ;
1270
1271 VOID
1272 SetTDControlErrorCounter (
1273 IN TD_STRUCT *ptrTDStruct,
1274 IN UINT8 nMaxErrors
1275 )
1276 /*++
1277
1278 Routine Description:
1279
1280 Set TD Control ErrorCounter
1281
1282 Arguments:
1283
1284 ptrTDStruct - TD_STRUCT
1285 nMaxErrors - Error counter number
1286
1287 Returns:
1288
1289 VOID
1290
1291 --*/
1292 ;
1293
1294 VOID
1295 SetTDLoworFullSpeedDevice (
1296 IN TD_STRUCT *ptrTDStruct,
1297 IN BOOLEAN bLowSpeedDevice
1298 )
1299 /*++
1300
1301 Routine Description:
1302
1303 Set TD status low speed or full speed
1304
1305 Arguments:
1306
1307 ptrTDStruct - A point to TD_STRUCT
1308 bLowSpeedDevice - Show low speed or full speed
1309
1310 Returns:
1311
1312 VOID
1313
1314 --*/
1315 ;
1316
1317 VOID
1318 SetTDControlIsochronousorNot (
1319 IN TD_STRUCT *ptrTDStruct,
1320 IN BOOLEAN bIsochronous
1321 )
1322 /*++
1323
1324 Routine Description:
1325
1326 Set TD status Isochronous or not
1327
1328 Arguments:
1329
1330 ptrTDStruct - A point to TD_STRUCT
1331 IsIsochronous - Show Isochronous or not
1332
1333 Returns:
1334
1335 VOID
1336
1337 --*/
1338 ;
1339
1340 VOID
1341 SetorClearTDControlIOC (
1342 IN TD_STRUCT *ptrTDStruct,
1343 IN BOOLEAN bSet
1344 )
1345 /*++
1346
1347 Routine Description:
1348
1349 Set TD status IOC IsSet
1350
1351 Arguments:
1352
1353 ptrTDStruct - A point to TD_STRUCT
1354 IsSet - Show IOC set or not
1355
1356 Returns:
1357
1358 VOID
1359
1360 --*/
1361 ;
1362
1363 VOID
1364 SetTDStatusActiveorInactive (
1365 IN TD_STRUCT *ptrTDStruct,
1366 IN BOOLEAN bActive
1367 )
1368 /*++
1369
1370 Routine Description:
1371
1372 Set TD status active or not
1373 Arguments:
1374
1375 ptrTDStruct - A point to TD_STRUCT
1376 IsActive - Active or not
1377
1378 Returns:
1379
1380 VOID
1381
1382 --*/
1383 ;
1384
1385 UINT16
1386 SetTDTokenMaxLength (
1387 IN TD_STRUCT *ptrTDStruct,
1388 IN UINT16 nMaxLen
1389 )
1390 /*++
1391
1392 Routine Description:
1393
1394 Set TD Token maxlength
1395
1396 Arguments:
1397
1398 ptrTDStruct - A point to TD_STRUCT
1399 MaximumLength - Maximum length of TD Token
1400
1401 Returns:
1402
1403 Real maximum length set to TD Token
1404
1405 --*/
1406 ;
1407
1408 VOID
1409 SetTDTokenDataToggle1 (
1410 IN TD_STRUCT *ptrTDStruct
1411 )
1412 /*++
1413
1414 Routine Description:
1415
1416 Set TD Token data toggle1
1417
1418 Arguments:
1419
1420 ptrTDStruct - A point to TD_STRUCT
1421
1422 Returns:
1423
1424 VOID
1425
1426 --*/
1427 ;
1428
1429 VOID
1430 SetTDTokenDataToggle0 (
1431 IN TD_STRUCT *ptrTDStruct
1432 )
1433 /*++
1434
1435 Routine Description:
1436
1437 Set TD Token data toggle0
1438
1439 Arguments:
1440
1441 ptrTDStruct - A point to TD_STRUCT
1442
1443 Returns:
1444
1445 VOID
1446
1447 --*/
1448 ;
1449
1450 UINT8
1451 GetTDTokenDataToggle (
1452 IN TD_STRUCT *ptrTDStruct
1453 )
1454 /*++
1455
1456 Routine Description:
1457
1458 Get TD Token data toggle
1459
1460 Arguments:
1461
1462 ptrTDStruct - A point to TD_STRUCT
1463
1464 Returns:
1465
1466 data toggle value
1467
1468 --*/
1469 ;
1470
1471 VOID
1472 SetTDTokenEndPoint (
1473 IN TD_STRUCT *ptrTDStruct,
1474 IN UINTN nEndPoint
1475 )
1476 /*++
1477
1478 Routine Description:
1479
1480 Set Data Token endpoint number
1481
1482 Arguments:
1483
1484 ptrTDStruct - A point to TD_STRUCT
1485 EndPoint - End point number
1486
1487 Returns:
1488
1489 VOID
1490
1491 --*/
1492 ;
1493
1494 VOID
1495 SetTDTokenDeviceAddress (
1496 IN TD_STRUCT *ptrTDStruct,
1497 IN UINTN nDevAddr
1498 )
1499 /*++
1500
1501 Routine Description:
1502
1503 Set TD Token device address
1504
1505 Arguments:
1506
1507 ptrTDStruct - A point to TD_STRUCT
1508 DeviceAddress - Device address
1509
1510 Returns:
1511
1512 VOID
1513
1514 --*/
1515 ;
1516
1517 VOID
1518 SetTDTokenPacketID (
1519 IN TD_STRUCT *ptrTDStruct,
1520 IN UINT8 nPID
1521 )
1522 /*++
1523
1524 Routine Description:
1525
1526 Set TD Token packet ID
1527
1528 Arguments:
1529
1530 ptrTDStruct - A point to TD_STRUCT
1531 PID - Packet ID
1532
1533 Returns:
1534
1535 VOID
1536
1537 --*/
1538 ;
1539
1540 VOID
1541 SetTDDataBuffer (
1542 IN TD_STRUCT *ptrTDStruct
1543 )
1544 /*++
1545
1546 Routine Description:
1547
1548 Set TD data buffer
1549
1550 Arguments:
1551
1552 ptrTDStruct - A point to TD_STRUCT
1553
1554 Returns:
1555
1556 VOID
1557
1558 --*/
1559 ;
1560
1561 BOOLEAN
1562 IsTDStatusActive (
1563 IN TD_STRUCT *ptrTDStruct
1564 )
1565 /*++
1566
1567 Routine Description:
1568
1569 Indicate whether TD status active or not
1570
1571 Arguments:
1572
1573 ptrTDStruct - A point to TD_STRUCT
1574
1575 Returns:
1576
1577 TRUE - Active
1578 FALSE - Inactive
1579
1580 --*/
1581 ;
1582
1583 BOOLEAN
1584 IsTDStatusStalled (
1585 IN TD_STRUCT *ptrTDStruct
1586 )
1587 /*++
1588
1589 Routine Description:
1590
1591 Indicate whether TD status stalled or not
1592
1593 Arguments:
1594
1595 ptrTDStruct - A point to TD_STRUCT
1596
1597 Returns:
1598
1599 TRUE - Stalled
1600 FALSE - not stalled
1601
1602 --*/
1603 ;
1604
1605 BOOLEAN
1606 IsTDStatusBufferError (
1607 IN TD_STRUCT *ptrTDStruct
1608 )
1609 /*++
1610
1611 Routine Description:
1612
1613 Indicate whether TD status buffer error or not
1614
1615 Arguments:
1616
1617 ptrTDStruct - A point to TD_STRUCT
1618
1619 Returns:
1620
1621 TRUE - Buffer error
1622 FALSE - No error
1623
1624 --*/
1625 ;
1626
1627 BOOLEAN
1628 IsTDStatusBabbleError (
1629 IN TD_STRUCT *ptrTDStruct
1630 )
1631 /*++
1632
1633 Routine Description:
1634
1635 Indicate whether TD status babble error or not
1636
1637 Arguments:
1638
1639 ptrTDStruct - A point to TD_STRUCT
1640
1641 Returns:
1642
1643 TRUE - Babble error
1644 FALSE - No error
1645
1646 --*/
1647 ;
1648
1649 BOOLEAN
1650 IsTDStatusNAKReceived (
1651 IN TD_STRUCT *ptrTDStruct
1652 )
1653 /*++
1654
1655 Routine Description:
1656
1657 Indicate whether TD status NAK received
1658 Arguments:
1659
1660 ptrTDStruct - A point to TD_STRUCT
1661
1662 Returns:
1663
1664 TRUE - NAK received
1665 FALSE - NAK not received
1666
1667 --*/
1668 ;
1669
1670 BOOLEAN
1671 IsTDStatusCRCTimeOutError (
1672 IN TD_STRUCT *ptrTDStruct
1673 )
1674 /*++
1675
1676 Routine Description:
1677
1678 Indicate whether TD status CRC timeout error or not
1679
1680 Arguments:
1681
1682 ptrTDStruct - A point to TD_STRUCT
1683
1684 Returns:
1685
1686 TRUE - CRC timeout error
1687 FALSE - CRC timeout no error
1688
1689 --*/
1690 ;
1691
1692 BOOLEAN
1693 IsTDStatusBitStuffError (
1694 IN TD_STRUCT *ptrTDStruct
1695 )
1696 /*++
1697
1698 Routine Description:
1699
1700 Indicate whether TD status bit stuff error or not
1701
1702 Arguments:
1703
1704 ptrTDStruct - A point to TD_STRUCT
1705
1706 Returns:
1707
1708 TRUE - Bit stuff error
1709 FALSE - Bit stuff no error
1710
1711 --*/
1712 ;
1713
1714 UINT16
1715 GetTDStatusActualLength (
1716 IN TD_STRUCT *ptrTDStruct
1717 )
1718 /*++
1719
1720 Routine Description:
1721
1722 Get TD status length
1723
1724 Arguments:
1725
1726 ptrTDStruct - A point to TD_STRUCT
1727
1728 Returns:
1729
1730 Return Td status length
1731
1732 --*/
1733 ;
1734
1735 UINT16
1736 GetTDTokenMaxLength (
1737 IN TD_STRUCT *ptrTDStruct
1738 )
1739 /*++
1740
1741 Routine Description:
1742
1743 Get TD Token maximum length
1744
1745 Arguments:
1746
1747 ptrTDStruct - A point to TD_STRUCT
1748
1749 Returns:
1750
1751 Return TD token maximum length
1752
1753 --*/
1754 ;
1755
1756 UINT8
1757 GetTDTokenEndPoint (
1758 IN TD_STRUCT *ptrTDStruct
1759 )
1760 /*++
1761
1762 Routine Description:
1763
1764 Get TD Token endpoint number
1765
1766 Arguments:
1767
1768 ptrTDStruct - A point to TD_STRUCT
1769
1770 Returns:
1771
1772 Return TD Token endpoint number
1773
1774 --*/
1775 ;
1776
1777 UINT8
1778 GetTDTokenDeviceAddress (
1779 IN TD_STRUCT *ptrTDStruct
1780 )
1781 /*++
1782
1783 Routine Description:
1784
1785 Get TD Token device address
1786
1787 Arguments:
1788
1789 ptrTDStruct - A point to TD_STRUCT
1790
1791 Returns:
1792
1793 Return TD Token device address
1794
1795 --*/
1796 ;
1797
1798 UINT8
1799 GetTDTokenPacketID (
1800 IN TD_STRUCT *ptrTDStruct
1801 )
1802 /*++
1803
1804 Routine Description:
1805
1806 Get TD Token packet ID
1807
1808 Arguments:
1809
1810 ptrTDStruct - A point to TD_STRUCT
1811
1812 Returns:
1813
1814 Return TD Token packet ID
1815
1816 --*/
1817 ;
1818
1819 UINT8 *
1820 GetTDDataBuffer (
1821 IN TD_STRUCT *ptrTDStruct
1822 )
1823 /*++
1824
1825 Routine Description:
1826
1827 Get the point to TD data buffer
1828
1829 Arguments:
1830
1831 ptrTDStruct - A point to TD_STRUCT
1832
1833 Returns:
1834
1835 Return a point to TD data buffer
1836
1837 --*/
1838 ;
1839
1840 BOOLEAN
1841 GetTDLinkPtrValidorInvalid (
1842 IN TD_STRUCT *ptrTDStruct
1843 )
1844 /*++
1845
1846 Routine Description:
1847
1848 Get TD LinkPtr valid or not
1849
1850 Arguments:
1851
1852 ptrTDStruct - A point to TD_STRUCT
1853
1854 Returns:
1855
1856 TRUE - Invalid
1857 FALSE - Valid
1858
1859 --*/
1860 ;
1861
1862 UINTN
1863 CountTDsNumber (
1864 IN TD_STRUCT *ptrFirstTD
1865 )
1866 /*++
1867
1868 Routine Description:
1869
1870 Get the number of TDs
1871
1872 Arguments:
1873
1874 PtrFirstTD - A point to the first TD_STRUCT
1875
1876 Returns:
1877
1878 Return the number of TDs
1879
1880 --*/
1881 ;
1882
1883 VOID
1884 LinkTDToQH (
1885 IN QH_STRUCT *ptrQH,
1886 IN TD_STRUCT *ptrTD
1887 )
1888 /*++
1889
1890 Routine Description:
1891
1892 Link TD To QH
1893
1894 Arguments:
1895
1896 PtrQH - QH_STRUCT
1897 PtrTD - TD_STRUCT
1898 Returns:
1899
1900 VOID
1901
1902 --*/
1903 ;
1904
1905 VOID
1906 LinkTDToTD (
1907 IN TD_STRUCT *ptrPreTD,
1908 IN TD_STRUCT *ptrTD
1909 )
1910 /*++
1911
1912 Routine Description:
1913
1914 Link TD To TD
1915
1916 Arguments:
1917
1918 ptrPreTD - Previous TD_STRUCT to be linked
1919 PtrTD - TD_STRUCT to link
1920 Returns:
1921
1922 VOID
1923
1924 --*/
1925 ;
1926
1927 VOID
1928 SetorClearCurFrameListTerminate (
1929 IN FRAMELIST_ENTRY *pCurEntry,
1930 IN BOOLEAN bSet
1931 )
1932 /*++
1933
1934 Routine Description:
1935
1936 Set or clear current framelist terminate
1937
1938 Arguments:
1939
1940 pCurEntry - A point to FRAMELIST_ENTITY
1941 IsSet - TRUE to empty the frame and indicate the Pointer field is valid
1942
1943 Returns:
1944
1945 VOID
1946
1947 --*/
1948 ;
1949
1950 VOID
1951 SetCurFrameListQHorTD (
1952 IN FRAMELIST_ENTRY *pCurEntry,
1953 IN BOOLEAN bQH
1954 )
1955 /*++
1956
1957 Routine Description:
1958
1959 Set current framelist QH or TD
1960
1961 Arguments:
1962
1963 pCurEntry - A point to FRAMELIST_ENTITY
1964 IsQH - TRUE to set QH and FALSE to set TD
1965
1966 Returns:
1967
1968 VOID
1969
1970 --*/
1971 ;
1972
1973 BOOLEAN
1974 GetCurFrameListTerminate (
1975 IN FRAMELIST_ENTRY *pCurEntry
1976 )
1977 /*++
1978
1979 Routine Description:
1980
1981 Get current framelist terminate
1982
1983 Arguments:
1984
1985 pCurEntry - A point to FRAMELIST_ENTITY
1986
1987 Returns:
1988
1989 TRUE - Terminate
1990 FALSE - Not terminate
1991
1992 --*/
1993 ;
1994
1995 VOID
1996 SetCurFrameListPointer (
1997 IN FRAMELIST_ENTRY *pCurEntry,
1998 IN UINT8 *ptr
1999 )
2000 /*++
2001
2002 Routine Description:
2003
2004 Set current framelist pointer
2005
2006 Arguments:
2007
2008 pCurEntry - A point to FRAMELIST_ENTITY
2009 ptr - A point to FrameListPtr point to
2010
2011 Returns:
2012
2013 VOID
2014
2015 --*/
2016 ;
2017
2018 VOID *
2019 GetCurFrameListPointer (
2020 IN FRAMELIST_ENTRY *pCurEntry
2021 )
2022 /*++
2023
2024 Routine Description:
2025
2026 Get current framelist pointer
2027
2028 Arguments:
2029
2030 pCurEntry - A point to FRAMELIST_ENTITY
2031
2032 Returns:
2033
2034 A point FrameListPtr point to
2035
2036 --*/
2037 ;
2038
2039 VOID
2040 LinkQHToFrameList (
2041 IN FRAMELIST_ENTRY *pEntry,
2042 IN UINT16 FrameListIndex,
2043 IN QH_STRUCT *ptrQH
2044 )
2045 /*++
2046
2047 Routine Description:
2048
2049 Link QH To Frame List
2050
2051 Arguments:
2052
2053 pEntry - FRAMELIST_ENTRY
2054 FrameListIndex - Frame List Index
2055 PtrQH - QH to link
2056 Returns:
2057
2058 VOID
2059
2060 --*/
2061 ;
2062
2063 VOID
2064 DelLinkSingleQH (
2065 IN USB_HC_DEV *HcDev,
2066 IN QH_STRUCT *ptrQH,
2067 IN UINT16 FrameListIndex,
2068 IN BOOLEAN SearchOther,
2069 IN BOOLEAN Delete
2070 )
2071 /*++
2072
2073 Routine Description:
2074
2075 Unlink from frame list and delete single QH
2076
2077 Arguments:
2078
2079 HcDev - USB_HC_DEV
2080 PtrQH - QH_STRUCT
2081 FrameListIndex - Frame List Index
2082 SearchOther - Search Other QH
2083 Delete - TRUE is to delete the QH
2084
2085 Returns:
2086
2087 VOID
2088
2089 --*/
2090 ;
2091
2092 VOID
2093 DeleteQueuedTDs (
2094 IN USB_HC_DEV *HcDev,
2095 IN TD_STRUCT *ptrFirstTD
2096 )
2097 /*++
2098
2099 Routine Description:
2100
2101 Delete Queued TDs
2102
2103 Arguments:
2104
2105 HcDev - USB_HC_DEV
2106 PtrFirstTD - TD link list head
2107
2108 Returns:
2109
2110 VOID
2111
2112 --*/
2113 ;
2114
2115 VOID
2116 InsertQHTDToINTList (
2117 IN USB_HC_DEV *HcDev,
2118 IN QH_STRUCT *ptrQH,
2119 IN TD_STRUCT *ptrFirstTD,
2120 IN UINT8 DeviceAddress,
2121 IN UINT8 EndPointAddress,
2122 IN UINT8 DataToggle,
2123 IN UINTN DataLength,
2124 IN UINTN PollingInterval,
2125 IN VOID *Mapping,
2126 IN UINT8 *DataBuffer,
2127 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
2128 IN VOID *Context
2129 )
2130 /*++
2131 Routine Description:
2132
2133 Insert QH and TD To Interrupt List
2134
2135 Arguments:
2136
2137 HcDev - USB_HC_DEV
2138 PtrQH - QH_STRUCT
2139 PtrFirstTD - First TD_STRUCT
2140 DeviceAddress - Device Address
2141 EndPointAddress - EndPoint Address
2142 DataToggle - Data Toggle
2143 DataLength - Data length
2144 PollingInterval - Polling Interval when inserted to frame list
2145 Mapping - Mapping alue
2146 DataBuffer - Data buffer
2147 CallBackFunction- CallBackFunction after interrupt transfeer
2148 Context - CallBackFunction Context passed as function parameter
2149
2150 Returns:
2151
2152 EFI_SUCCESS - Sucess
2153 EFI_INVALID_PARAMETER - Paremeter is error
2154
2155 --*/
2156 ;
2157
2158 EFI_STATUS
2159 DeleteAsyncINTQHTDs (
2160 IN USB_HC_DEV *HcDev,
2161 IN UINT8 DeviceAddress,
2162 IN UINT8 EndPointAddress,
2163 OUT UINT8 *DataToggle
2164 )
2165 /*++
2166 Routine Description:
2167
2168 Delete Async INT QH and TDs
2169
2170 Arguments:
2171
2172 HcDev - USB_HC_DEV
2173 DeviceAddress - Device Address
2174 EndPointAddress - EndPoint Address
2175 DataToggle - Data Toggle
2176
2177 Returns:
2178
2179 EFI_SUCCESS - Sucess
2180 EFI_INVALID_PARAMETER - Paremeter is error
2181
2182 --*/
2183 ;
2184
2185 BOOLEAN
2186 CheckTDsResults (
2187 IN TD_STRUCT *ptrTD,
2188 IN UINTN RequiredLen,
2189 OUT UINT32 *Result,
2190 OUT UINTN *ErrTDPos,
2191 OUT UINTN *ActualTransferSize
2192 )
2193 /*++
2194
2195 Routine Description:
2196
2197 Check TDs Results
2198
2199 Arguments:
2200
2201 PtrTD - TD_STRUCT to check
2202 RequiredLen - Required Len
2203 Result - Transfer result
2204 ErrTDPos - Error TD Position
2205 ActualTransferSize - Actual Transfer Size
2206
2207 Returns:
2208
2209 TRUE - Sucess
2210 FALSE - Fail
2211
2212 --*/
2213 ;
2214
2215 VOID
2216 ExecuteAsyncINTTDs (
2217 IN USB_HC_DEV *HcDev,
2218 IN INTERRUPT_LIST *ptrList,
2219 OUT UINT32 *Result,
2220 OUT UINTN *ErrTDPos,
2221 OUT UINTN *ActualLen
2222 )
2223 /*++
2224
2225 Routine Description:
2226
2227 Execute Async Interrupt TDs
2228
2229 Arguments:
2230
2231 HcDev - USB_HC_DEV
2232 PtrList - INTERRUPT_LIST
2233 Result - Transfer result
2234 ErrTDPos - Error TD Position
2235 ActualTransferSize - Actual Transfer Size
2236
2237 Returns:
2238
2239 VOID
2240
2241 --*/
2242 ;
2243
2244 VOID
2245 UpdateAsyncINTQHTDs (
2246 IN INTERRUPT_LIST *ptrList,
2247 IN UINT32 Result,
2248 IN UINT32 ErrTDPos
2249 )
2250 /*++
2251
2252 Routine Description:
2253
2254 Update Async Interrupt QH and TDs
2255
2256 Arguments:
2257
2258 PtrList - INTERRUPT_LIST
2259 Result - Transfer reslut
2260 ErrTDPos - Error TD Position
2261
2262 Returns:
2263
2264 VOID
2265
2266 --*/
2267 ;
2268
2269 VOID
2270 ReleaseInterruptList (
2271 IN USB_HC_DEV *HcDev,
2272 IN LIST_ENTRY *ListHead
2273 )
2274 /*++
2275
2276 Routine Description:
2277
2278 Release Interrupt List
2279
2280 Arguments:
2281
2282 HcDev - USB_HC_DEV
2283 ListHead - List head
2284
2285 Returns:
2286
2287 VOID
2288
2289 --*/
2290 ;
2291
2292 EFI_STATUS
2293 ExecuteControlTransfer (
2294 IN USB_HC_DEV *HcDev,
2295 IN TD_STRUCT *ptrTD,
2296 IN UINT32 wIndex,
2297 OUT UINTN *ActualLen,
2298 IN UINTN TimeOut,
2299 OUT UINT32 *TransferResult
2300 )
2301 /*++
2302
2303 Routine Description:
2304
2305 Execute Control Transfer
2306
2307 Arguments:
2308
2309 HcDev - USB_HC_DEV
2310 PtrTD - TD_STRUCT
2311 wIndex - No use
2312 ActualLen - Actual transfered Len
2313 TimeOut - TimeOut value in milliseconds
2314 TransferResult - Transfer result
2315 Returns:
2316
2317 EFI_SUCCESS - Sucess
2318 EFI_DEVICE_ERROR - Error
2319
2320
2321 --*/
2322 ;
2323
2324 EFI_STATUS
2325 ExecBulkorSyncInterruptTransfer (
2326 IN USB_HC_DEV *HcDev,
2327 IN TD_STRUCT *ptrTD,
2328 IN UINT32 wIndex,
2329 OUT UINTN *ActualLen,
2330 OUT UINT8 *DataToggle,
2331 IN UINTN TimeOut,
2332 OUT UINT32 *TransferResult
2333 )
2334 /*++
2335
2336 Routine Description:
2337
2338 Execute Bulk or SyncInterrupt Transfer
2339
2340 Arguments:
2341
2342 HcDev - USB_HC_DEV
2343 PtrTD - TD_STRUCT
2344 wIndex - No use
2345 ActualLen - Actual transfered Len
2346 DataToggle - Data Toggle
2347 TimeOut - TimeOut value in milliseconds
2348 TransferResult - Transfer result
2349 Returns:
2350
2351 EFI_SUCCESS - Sucess
2352 EFI_DEVICE_ERROR - Error
2353 --*/
2354 ;
2355
2356 EFI_STATUS
2357 InitializeMemoryManagement (
2358 IN USB_HC_DEV *HcDev
2359 )
2360 /*++
2361
2362 Routine Description:
2363
2364 Initialize Memory Management
2365
2366 Arguments:
2367
2368 HcDev - USB_HC_DEV
2369
2370 Returns:
2371
2372 EFI_SUCCESS - Success
2373
2374 --*/
2375 ;
2376
2377 EFI_STATUS
2378 CreateMemoryBlock (
2379 IN USB_HC_DEV *HcDev,
2380 IN MEMORY_MANAGE_HEADER **MemoryHeader,
2381 IN UINTN MemoryBlockSizeInPages
2382 )
2383 /*++
2384
2385 Routine Description:
2386
2387 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
2388 and use PciIo->Map to map the common buffer for Bus Master Read/Write.
2389
2390
2391 Arguments:
2392
2393 HcDev - USB_HC_DEV
2394 MemoryHeader - MEMORY_MANAGE_HEADER to output
2395 MemoryBlockSizeInPages - MemoryBlockSizeInPages
2396
2397 Returns:
2398
2399 EFI_SUCCESS - Success
2400 EFI_OUT_OF_RESOURCES - Out of resources
2401 EFI_UNSUPPORTED - Unsupported
2402
2403 --*/
2404 ;
2405
2406 EFI_STATUS
2407 FreeMemoryHeader (
2408 IN USB_HC_DEV *HcDev,
2409 IN MEMORY_MANAGE_HEADER *MemoryHeader
2410 )
2411 /*++
2412
2413 Routine Description:
2414
2415 Free Memory Header
2416
2417 Arguments:
2418
2419 HcDev - USB_HC_DEV
2420 MemoryHeader - MemoryHeader to be freed
2421
2422 Returns:
2423
2424 EFI_INVALID_PARAMETER - Parameter is error
2425 EFI_SUCCESS - Success
2426
2427 --*/
2428 ;
2429
2430 EFI_STATUS
2431 UhciAllocatePool (
2432 IN USB_HC_DEV *UhcDev,
2433 IN UINT8 **Pool,
2434 IN UINTN AllocSize
2435 )
2436 /*++
2437
2438 Routine Description:
2439
2440 Uhci Allocate Pool
2441
2442 Arguments:
2443
2444 HcDev - USB_HC_DEV
2445 Pool - Place to store pointer to the memory buffer
2446 AllocSize - Alloc Size
2447
2448 Returns:
2449
2450 EFI_SUCCESS - Success
2451
2452 --*/
2453 ;
2454
2455 VOID
2456 UhciFreePool (
2457 IN USB_HC_DEV *HcDev,
2458 IN UINT8 *Pool,
2459 IN UINTN AllocSize
2460 )
2461 /*++
2462
2463 Routine Description:
2464
2465 Uhci Free Pool
2466
2467 Arguments:
2468
2469 HcDev - USB_HC_DEV
2470 Pool - Pool to free
2471 AllocSize - Pool size
2472
2473 Returns:
2474
2475 VOID
2476
2477 --*/
2478 ;
2479
2480 VOID
2481 InsertMemoryHeaderToList (
2482 IN MEMORY_MANAGE_HEADER *MemoryHeader,
2483 IN MEMORY_MANAGE_HEADER *NewMemoryHeader
2484 )
2485 /*++
2486
2487 Routine Description:
2488
2489 Insert Memory Header To List
2490
2491 Arguments:
2492
2493 MemoryHeader - MEMORY_MANAGE_HEADER
2494 NewMemoryHeader - MEMORY_MANAGE_HEADER
2495
2496 Returns:
2497
2498 VOID
2499
2500 --*/
2501 ;
2502
2503 EFI_STATUS
2504 AllocMemInMemoryBlock (
2505 IN MEMORY_MANAGE_HEADER *MemoryHeader,
2506 IN VOID **Pool,
2507 IN UINTN NumberOfMemoryUnit
2508 )
2509 /*++
2510
2511 Routine Description:
2512
2513 Alloc Memory In MemoryBlock
2514
2515 Arguments:
2516
2517 MemoryHeader - MEMORY_MANAGE_HEADER
2518 Pool - Place to store pointer to memory
2519 NumberOfMemoryUnit - Number Of Memory Unit
2520
2521 Returns:
2522
2523 EFI_NOT_FOUND - Can't find the free memory
2524 EFI_SUCCESS - Success
2525
2526 --*/
2527 ;
2528
2529 BOOLEAN
2530 IsMemoryBlockEmptied (
2531 IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr
2532 )
2533 /*++
2534
2535 Routine Description:
2536
2537 Is Memory Block Emptied
2538
2539 Arguments:
2540
2541 MemoryHeaderPtr - MEMORY_MANAGE_HEADER
2542
2543 Returns:
2544
2545 TRUE - Empty
2546 FALSE - Not Empty
2547
2548 --*/
2549 ;
2550
2551 VOID
2552 DelinkMemoryBlock (
2553 IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,
2554 IN MEMORY_MANAGE_HEADER *FreeMemoryHeader
2555 )
2556 /*++
2557
2558 Routine Description:
2559
2560 Delink Memory Block
2561
2562 Arguments:
2563
2564 FirstMemoryHeader - MEMORY_MANAGE_HEADER
2565 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER
2566
2567 Returns:
2568
2569 VOID
2570
2571 --*/
2572 ;
2573
2574 EFI_STATUS
2575 DelMemoryManagement (
2576 IN USB_HC_DEV *HcDev
2577 )
2578 /*++
2579
2580 Routine Description:
2581
2582 Delete Memory Management
2583
2584 Arguments:
2585
2586 HcDev - USB_HC_DEV
2587
2588 Returns:
2589
2590 EFI_SUCCESS - Success
2591
2592 --*/
2593 ;
2594
2595 VOID
2596 EnableMaxPacketSize (
2597 IN USB_HC_DEV *HcDev
2598 )
2599 /*++
2600
2601 Routine Description:
2602
2603 Enable Max Packet Size
2604
2605 Arguments:
2606
2607 HcDev - USB_HC_DEV
2608
2609 Returns:
2610
2611 VOID
2612
2613 --*/
2614 ;
2615
2616 VOID
2617 CleanUsbTransactions (
2618 IN USB_HC_DEV *HcDev
2619 )
2620 /*++
2621
2622 Routine Description:
2623
2624 Clean USB Transactions
2625
2626 Arguments:
2627
2628 HcDev - A point to USB_HC_DEV
2629
2630 Returns:
2631
2632 VOID
2633
2634 --*/
2635 ;
2636
2637 VOID
2638 TurnOffUSBEmulation (
2639 IN EFI_PCI_IO_PROTOCOL *PciIo
2640 )
2641 /*++
2642
2643 Routine Description:
2644
2645 Set current framelist QH or TD
2646
2647 Arguments:
2648
2649 pCurEntry - A point to FRAMELIST_ENTITY
2650 IsQH - TRUE to set QH and FALSE to set TD
2651
2652 Returns:
2653
2654 VOID
2655
2656 --*/
2657 ;
2658
2659 //
2660 // Prototypes
2661 // Driver model protocol interface
2662 //
2663
2664 EFI_STATUS
2665 EFIAPI
2666 UHCIDriverBindingSupported (
2667 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2668 IN EFI_HANDLE Controller,
2669 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
2670 );
2671
2672 EFI_STATUS
2673 EFIAPI
2674 UHCIDriverBindingStart (
2675 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2676 IN EFI_HANDLE Controller,
2677 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
2678 );
2679
2680 EFI_STATUS
2681 EFIAPI
2682 UHCIDriverBindingStop (
2683 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2684 IN EFI_HANDLE Controller,
2685 IN UINTN NumberOfChildren,
2686 IN EFI_HANDLE *ChildHandleBuffer
2687 );
2688
2689 //
2690 // UHCI interface functions
2691 //
2692
2693 EFI_STATUS
2694 EFIAPI
2695 UHCIReset (
2696 IN EFI_USB_HC_PROTOCOL *This,
2697 IN UINT16 Attributes
2698 );
2699
2700 EFI_STATUS
2701 EFIAPI
2702 UHCIGetState (
2703 IN EFI_USB_HC_PROTOCOL *This,
2704 OUT EFI_USB_HC_STATE *State
2705 );
2706
2707 EFI_STATUS
2708 EFIAPI
2709 UHCISetState (
2710 IN EFI_USB_HC_PROTOCOL *This,
2711 IN EFI_USB_HC_STATE State
2712 );
2713
2714 EFI_STATUS
2715 EFIAPI
2716 UHCIControlTransfer (
2717 IN EFI_USB_HC_PROTOCOL *This,
2718 IN UINT8 DeviceAddress,
2719 IN BOOLEAN IsSlowDevice,
2720 IN UINT8 MaximumPacketLength,
2721 IN EFI_USB_DEVICE_REQUEST *Request,
2722 IN EFI_USB_DATA_DIRECTION TransferDirection,
2723 IN OUT VOID *Data, OPTIONAL
2724 IN OUT UINTN *DataLength, OPTIONAL
2725 IN UINTN TimeOut,
2726 OUT UINT32 *TransferResult
2727 );
2728
2729 EFI_STATUS
2730 EFIAPI
2731 UHCIBulkTransfer (
2732 IN EFI_USB_HC_PROTOCOL *This,
2733 IN UINT8 DeviceAddress,
2734 IN UINT8 EndPointAddress,
2735 IN UINT8 MaximumPacketLength,
2736 IN OUT VOID *Data,
2737 IN OUT UINTN *DataLength,
2738 IN OUT UINT8 *DataToggle,
2739 IN UINTN TimeOut,
2740 OUT UINT32 *TransferResult
2741 );
2742
2743 EFI_STATUS
2744 EFIAPI
2745 UHCIAsyncInterruptTransfer (
2746 IN EFI_USB_HC_PROTOCOL * This,
2747 IN UINT8 DeviceAddress,
2748 IN UINT8 EndPointAddress,
2749 IN BOOLEAN IsSlowDevice,
2750 IN UINT8 MaximumPacketLength,
2751 IN BOOLEAN IsNewTransfer,
2752 IN OUT UINT8 *DataToggle,
2753 IN UINTN PollingInterval, OPTIONAL
2754 IN UINTN DataLength, OPTIONAL
2755 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction, OPTIONAL
2756 IN VOID *Context OPTIONAL
2757 );
2758
2759 EFI_STATUS
2760 EFIAPI
2761 UHCISyncInterruptTransfer (
2762 IN EFI_USB_HC_PROTOCOL *This,
2763 IN UINT8 DeviceAddress,
2764 IN UINT8 EndPointAddress,
2765 IN BOOLEAN IsSlowDevice,
2766 IN UINT8 MaximumPacketLength,
2767 IN OUT VOID *Data,
2768 IN OUT UINTN *DataLength,
2769 IN OUT UINT8 *DataToggle,
2770 IN UINTN TimeOut,
2771 OUT UINT32 *TransferResult
2772 );
2773
2774 EFI_STATUS
2775 EFIAPI
2776 UHCIIsochronousTransfer (
2777 IN EFI_USB_HC_PROTOCOL *This,
2778 IN UINT8 DeviceAddress,
2779 IN UINT8 EndPointAddress,
2780 IN UINT8 MaximumPacketLength,
2781 IN OUT VOID *Data,
2782 IN UINTN DataLength,
2783 OUT UINT32 *TransferResult
2784 );
2785
2786 EFI_STATUS
2787 EFIAPI
2788 UHCIAsyncIsochronousTransfer (
2789 IN EFI_USB_HC_PROTOCOL * This,
2790 IN UINT8 DeviceAddress,
2791 IN UINT8 EndPointAddress,
2792 IN UINT8 MaximumPacketLength,
2793 IN OUT VOID *Data,
2794 IN UINTN DataLength,
2795 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
2796 IN VOID *Context OPTIONAL
2797 );
2798
2799 EFI_STATUS
2800 EFIAPI
2801 UHCIGetRootHubPortNumber (
2802 IN EFI_USB_HC_PROTOCOL *This,
2803 OUT UINT8 *PortNumber
2804 );
2805
2806 EFI_STATUS
2807 EFIAPI
2808 UHCIGetRootHubPortStatus (
2809 IN EFI_USB_HC_PROTOCOL *This,
2810 IN UINT8 PortNumber,
2811 OUT EFI_USB_PORT_STATUS *PortStatus
2812 );
2813
2814 EFI_STATUS
2815 EFIAPI
2816 UHCISetRootHubPortFeature (
2817 IN EFI_USB_HC_PROTOCOL *This,
2818 IN UINT8 PortNumber,
2819 IN EFI_USB_PORT_FEATURE PortFeature
2820 );
2821
2822 EFI_STATUS
2823 EFIAPI
2824 UHCIClearRootHubPortFeature (
2825 IN EFI_USB_HC_PROTOCOL *This,
2826 IN UINT8 PortNumber,
2827 IN EFI_USB_PORT_FEATURE PortFeature
2828 );
2829
2830 //
2831 // UEFI 2.0 Protocol
2832 //
2833
2834 EFI_STATUS
2835 EFIAPI
2836 UHCI2GetCapability(
2837 IN EFI_USB2_HC_PROTOCOL * This,
2838 OUT UINT8 *MaxSpeed,
2839 OUT UINT8 *PortNumber,
2840 OUT UINT8 *Is64BitCapable
2841 );
2842
2843 EFI_STATUS
2844 EFIAPI
2845 UHCI2Reset (
2846 IN EFI_USB2_HC_PROTOCOL * This,
2847 IN UINT16 Attributes
2848 );
2849
2850 EFI_STATUS
2851 EFIAPI
2852 UHCI2GetState (
2853 IN EFI_USB2_HC_PROTOCOL * This,
2854 OUT EFI_USB_HC_STATE * State
2855 );
2856
2857 EFI_STATUS
2858 EFIAPI
2859 UHCI2SetState (
2860 IN EFI_USB2_HC_PROTOCOL * This,
2861 IN EFI_USB_HC_STATE State
2862 );
2863
2864 EFI_STATUS
2865 EFIAPI
2866 UHCI2ControlTransfer (
2867 IN EFI_USB2_HC_PROTOCOL * This,
2868 IN UINT8 DeviceAddress,
2869 IN UINT8 DeviceSpeed,
2870 IN UINTN MaximumPacketLength,
2871 IN EFI_USB_DEVICE_REQUEST * Request,
2872 IN EFI_USB_DATA_DIRECTION TransferDirection,
2873 IN OUT VOID *Data, OPTIONAL
2874 IN OUT UINTN *DataLength, OPTIONAL
2875 IN UINTN TimeOut,
2876 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2877 OUT UINT32 *TransferResult
2878 );
2879
2880 EFI_STATUS
2881 EFIAPI
2882 UHCI2BulkTransfer (
2883 IN EFI_USB2_HC_PROTOCOL * This,
2884 IN UINT8 DeviceAddress,
2885 IN UINT8 EndPointAddress,
2886 IN UINT8 DeviceSpeed,
2887 IN UINTN MaximumPacketLength,
2888 IN UINT8 DataBuffersNumber,
2889 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
2890 IN OUT UINTN *DataLength,
2891 IN OUT UINT8 *DataToggle,
2892 IN UINTN TimeOut,
2893 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2894 OUT UINT32 *TransferResult
2895 );
2896
2897 EFI_STATUS
2898 EFIAPI
2899 UHCI2AsyncInterruptTransfer (
2900 IN EFI_USB2_HC_PROTOCOL * This,
2901 IN UINT8 DeviceAddress,
2902 IN UINT8 EndPointAddress,
2903 IN UINT8 DeviceSpeed,
2904 IN UINTN MaximumPacketLength,
2905 IN BOOLEAN IsNewTransfer,
2906 IN OUT UINT8 *DataToggle,
2907 IN UINTN PollingInterval, OPTIONAL
2908 IN UINTN DataLength, OPTIONAL
2909 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2910 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction, OPTIONAL
2911 IN VOID *Context OPTIONAL
2912 );
2913
2914 EFI_STATUS
2915 EFIAPI
2916 UHCI2SyncInterruptTransfer (
2917 IN EFI_USB2_HC_PROTOCOL * This,
2918 IN UINT8 DeviceAddress,
2919 IN UINT8 EndPointAddress,
2920 IN UINT8 DeviceSpeed,
2921 IN UINTN MaximumPacketLength,
2922 IN OUT VOID *Data,
2923 IN OUT UINTN *DataLength,
2924 IN OUT UINT8 *DataToggle,
2925 IN UINTN TimeOut,
2926 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2927 OUT UINT32 *TransferResult
2928 );
2929
2930 EFI_STATUS
2931 EFIAPI
2932 UHCI2IsochronousTransfer (
2933 IN EFI_USB2_HC_PROTOCOL * This,
2934 IN UINT8 DeviceAddress,
2935 IN UINT8 EndPointAddress,
2936 IN UINT8 DeviceSpeed,
2937 IN UINTN MaximumPacketLength,
2938 IN UINT8 DataBuffersNumber,
2939 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
2940 IN UINTN DataLength,
2941 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2942 OUT UINT32 *TransferResult
2943 );
2944
2945 EFI_STATUS
2946 EFIAPI
2947 UHCI2AsyncIsochronousTransfer (
2948 IN EFI_USB2_HC_PROTOCOL * This,
2949 IN UINT8 DeviceAddress,
2950 IN UINT8 EndPointAddress,
2951 IN UINT8 DeviceSpeed,
2952 IN UINTN MaximumPacketLength,
2953 IN UINT8 DataBuffersNumber,
2954 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
2955 IN UINTN DataLength,
2956 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2957 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
2958 IN VOID *Context OPTIONAL
2959 );
2960
2961 EFI_STATUS
2962 EFIAPI
2963 UHCI2GetRootHubPortStatus (
2964 IN EFI_USB2_HC_PROTOCOL * This,
2965 IN UINT8 PortNumber,
2966 OUT EFI_USB_PORT_STATUS * PortStatus
2967 );
2968
2969 EFI_STATUS
2970 EFIAPI
2971 UHCI2SetRootHubPortFeature (
2972 IN EFI_USB2_HC_PROTOCOL * This,
2973 IN UINT8 PortNumber,
2974 IN EFI_USB_PORT_FEATURE PortFeature
2975 );
2976
2977 EFI_STATUS
2978 EFIAPI
2979 UHCI2ClearRootHubPortFeature (
2980 IN EFI_USB2_HC_PROTOCOL * This,
2981 IN UINT8 PortNumber,
2982 IN EFI_USB_PORT_FEATURE PortFeature
2983 );
2984
2985 //
2986 // Asynchronous interrupt transfer monitor function
2987 //
2988 VOID
2989 EFIAPI
2990 MonitorInterruptTrans (
2991 IN EFI_EVENT Event,
2992 IN VOID *Context
2993 );
2994
2995 #endif