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EmbeddedPkg: Fix various typos
[mirror_edk2.git] / EmbeddedPkg / Drivers / Isp1761UsbDxe / Isp1761UsbDxe.c
1 /** @file
2
3 Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>
4
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include <Library/DebugLib.h>
10 #include <Library/UefiBootServicesTableLib.h>
11 #include <Library/UefiDriverEntryPoint.h>
12 #include <Library/IoLib.h>
13 #include <Library/MemoryAllocationLib.h>
14
15 #include <IndustryStandard/Usb.h>
16
17 #include <Protocol/UsbDevice.h>
18
19 #include "Isp1761UsbDxe.h"
20
21 /*
22 Driver for using the NXP ISP1761 as a USB Peripheral controller.
23 Doesn't use USB OTG - just sets it in Pure Peripheral mode.
24
25 The ISP1582 datasheet has a little more info on the Peripheral controller
26 registers than the ISP1761 datasheet
27
28 We don't do string descriptors. They're optional.
29 We currently assume the device has one configuration, one interface, one IN
30 endpoint, and one OUT endpoint (plus the default control endpoint).
31
32 In fact, this driver is the minimum required to implement fastboot.
33 */
34
35 // TODO Make sure the controller isn't sending empty packets when it shouldn't
36 // (check behaviour in cases when Buffer Length isn't explicitly set)
37
38 // ISP1582 Datasheet:
39 // "Data transfers preceding the status stage must first be fully
40 // completed before the STATUS bit can be set."
41 // This variable stores whether some control data has been pended in the EP0TX
42 // Tx buffer, so that when an EP0TX interrupt is received we can set the STATUS
43 // bit to go to the Status stage of the control transfer.
44 STATIC BOOLEAN mControlTxPending = FALSE;
45
46 STATIC USB_DEVICE_DESCRIPTOR *mDeviceDescriptor;
47
48 // The config descriptor, interface descriptor, and endpoint descriptors in a
49 // buffer (in that order)
50 STATIC VOID *mDescriptors;
51 // Convenience pointers to those descriptors inside the buffer:
52 STATIC USB_INTERFACE_DESCRIPTOR *mInterfaceDescriptor;
53 STATIC USB_CONFIG_DESCRIPTOR *mConfigDescriptor;
54 STATIC USB_ENDPOINT_DESCRIPTOR *mEndpointDescriptors;
55
56 STATIC USB_DEVICE_RX_CALLBACK mDataReceivedCallback;
57 STATIC USB_DEVICE_TX_CALLBACK mDataSentCallback;
58
59 // The time between interrupt polls, in units of 100 nanoseconds
60 // 10 Microseconds
61 #define ISP1761_INTERRUPT_POLL_PERIOD 10000
62
63 STATIC
64 VOID
65 SelectEndpoint (
66 IN UINT8 Endpoint
67 )
68 {
69 // The DMA Endpoint Index must not point to the same as the
70 // Endpoint Index Register.
71 WRITE_REG32 (ISP1761_DMA_ENDPOINT_INDEX, ((Endpoint + 2) % ISP1761_NUM_ENDPOINTS));
72 WRITE_REG32 (ISP1761_ENDPOINT_INDEX, Endpoint);
73 }
74
75 // Enable going to the Data stage of a control transfer
76 STATIC
77 VOID
78 DataStageEnable (
79 IN UINT8 Endpoint
80 )
81 {
82 SelectEndpoint (Endpoint);
83 WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_DSEN);
84 }
85
86 // Go to the Status stage of a successful control transfer
87 STATIC
88 VOID
89 StatusAcknowledge (
90 IN UINT8 Endpoint
91 )
92 {
93 SelectEndpoint (Endpoint);
94 WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_STATUS);
95 }
96
97 // Read the FIFO for the endpoint indexed by Endpoint, into the buffer pointed
98 // at by Buffer, whose size is *Size bytes.
99 //
100 // If *Size is less than the number of bytes in the FIFO, return EFI_BUFFER_TOO_SMALL
101 //
102 // Update *Size with the number of bytes of data in the FIFO.
103 STATIC
104 EFI_STATUS
105 ReadEndpointBuffer (
106 IN UINT8 Endpoint,
107 IN OUT UINTN *Size,
108 IN OUT VOID *Buffer
109 )
110 {
111 UINT16 NumBytesAvailable;
112 UINT32 Val32;
113 UINTN Index;
114 UINTN NumBytesRead;
115
116 SelectEndpoint (Endpoint);
117
118 NumBytesAvailable = READ_REG16 (ISP1761_BUFFER_LENGTH);
119
120 if (NumBytesAvailable > *Size) {
121 *Size = NumBytesAvailable;
122 return EFI_BUFFER_TOO_SMALL;
123 }
124 *Size = NumBytesAvailable;
125
126 /* -- NB! --
127 The datasheet says the Data Port is 16 bits but it actually appears to
128 be 32 bits.
129 */
130
131 // Read 32-bit chunks
132 for (Index = 0; Index < NumBytesAvailable / 4; Index++) {
133 ((UINT32 *) Buffer)[Index] = READ_REG32 (ISP1761_DATA_PORT);
134 }
135
136 // Read remaining bytes
137
138 // Round NumBytesAvailable down to nearest power of 4
139 NumBytesRead = NumBytesAvailable & (~0x3);
140 if (NumBytesRead != NumBytesAvailable) {
141 Val32 = READ_REG32 (ISP1761_DATA_PORT);
142 // Copy each required byte of 32-bit word into buffer
143 for (Index = 0; Index < NumBytesAvailable % 4; Index++) {
144 ((UINT8 *) Buffer)[NumBytesRead + Index] = Val32 >> (Index * 8);
145 }
146 }
147 return EFI_SUCCESS;
148 }
149
150 /*
151 Write an endpoint buffer. Parameters:
152 Endpoint Endpoint index (see Endpoint Index Register in datasheet)
153 MaxPacketSize The MaxPacketSize this endpoint is configured for
154 Size The size of the Buffer
155 Buffer The data
156
157 Assumes MaxPacketSize is a multiple of 4.
158 (It seems that all valid values for MaxPacketSize _are_ multiples of 4)
159 */
160 STATIC
161 EFI_STATUS
162 WriteEndpointBuffer (
163 IN UINT8 Endpoint,
164 IN UINTN MaxPacketSize,
165 IN UINTN Size,
166 IN CONST VOID *Buffer
167 )
168 {
169 UINTN Index;
170 UINT32 *DwordBuffer;
171
172 DwordBuffer = (UINT32 *) Buffer;
173 SelectEndpoint (Endpoint);
174
175 /* -- NB! --
176 The datasheet says the Data Port is 16 bits but it actually appears to
177 be 32 bits.
178 */
179
180 // Write packets of size MaxPacketSize
181 while (Size > MaxPacketSize) {
182 for (Index = 0; Index < MaxPacketSize / 4; Index++) {
183 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[Index]);
184 }
185 Size -= MaxPacketSize;
186 DwordBuffer += (MaxPacketSize / sizeof (UINT32));
187 }
188
189 // Write remaining data
190
191 if (Size > 0) {
192 WRITE_REG32 (ISP1761_BUFFER_LENGTH, Size);
193
194 while (Size > 4) {
195 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
196 Size -= 4;
197 DwordBuffer++;
198 }
199
200 if (Size > 0) {
201 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
202 }
203 }
204
205 return EFI_SUCCESS;
206 }
207
208 STATIC
209 EFI_STATUS
210 HandleGetDescriptor (
211 IN USB_DEVICE_REQUEST *Request
212 )
213 {
214 EFI_STATUS Status;
215 UINT8 DescriptorType;
216 UINTN ResponseSize;
217 VOID *ResponseData;
218
219 ResponseSize = 0;
220 ResponseData = NULL;
221 Status = EFI_SUCCESS;
222
223 // Pretty confused if bmRequestType is anything but this:
224 ASSERT (Request->RequestType == USB_DEV_GET_DESCRIPTOR_REQ_TYPE);
225
226 // Choose the response
227 DescriptorType = Request->Value >> 8;
228 switch (DescriptorType) {
229 case USB_DESC_TYPE_DEVICE:
230 DEBUG ((EFI_D_INFO, "USB: Got a request for device descriptor\n"));
231 ResponseSize = sizeof (USB_DEVICE_DESCRIPTOR);
232 ResponseData = mDeviceDescriptor;
233 break;
234 case USB_DESC_TYPE_CONFIG:
235 DEBUG ((EFI_D_INFO, "USB: Got a request for config descriptor\n"));
236 ResponseSize = mConfigDescriptor->TotalLength;
237 ResponseData = mDescriptors;
238 break;
239 case USB_DESC_TYPE_STRING:
240 DEBUG ((EFI_D_INFO, "USB: Got a request for String descriptor %d\n", Request->Value & 0xFF));
241 break;
242 default:
243 DEBUG ((EFI_D_INFO, "USB: Didn't understand request for descriptor 0x%04x\n", Request->Value));
244 Status = EFI_NOT_FOUND;
245 break;
246 }
247
248 // Send the response
249 if (ResponseData) {
250 ASSERT (ResponseSize != 0);
251
252 if (Request->Length < ResponseSize) {
253 // Truncate response
254 ResponseSize = Request->Length;
255 } else if (Request->Length > ResponseSize) {
256 DEBUG ((EFI_D_INFO, "USB: Info: ResponseSize < wLength\n"));
257 }
258
259 DataStageEnable (ISP1761_EP0TX);
260 Status = WriteEndpointBuffer (
261 ISP1761_EP0TX,
262 MAX_PACKET_SIZE_CONTROL,
263 ResponseSize,
264 ResponseData
265 );
266 if (!EFI_ERROR (Status)) {
267 // Setting this value should cause us to go to the Status stage on the
268 // next EP0TX interrupt
269 mControlTxPending = TRUE;
270 }
271 }
272
273 return EFI_SUCCESS;
274 }
275
276 STATIC
277 EFI_STATUS
278 HandleSetAddress (
279 IN USB_DEVICE_REQUEST *Request
280 )
281 {
282 // Pretty confused if bmRequestType is anything but this:
283 ASSERT (Request->RequestType == USB_DEV_SET_ADDRESS_REQ_TYPE);
284 // USB Spec: "The USB device does not change its device address until after
285 // the Status stage of this request is completed successfully."
286 // ISP1582 datasheet: "The new device address is activated when the
287 // device receives an acknowledgment from the host for the empty packet
288 // token". (StatusAcknowledge causes an empty packet to be sent).
289 // So, we write the Address register _before_ acking the SET_ADDRESS.
290 DEBUG ((EFI_D_INFO, "USB: Setting address to %d\n", Request->Value));
291 WRITE_REG32 (ISP1761_ADDRESS, Request->Value | ISP1761_ADDRESS_DEVEN);
292 StatusAcknowledge (ISP1761_EP0TX);
293
294 return EFI_SUCCESS;
295 }
296
297 // Move the device to the Configured state.
298 // (This code only supports one configuration for a device, so the configuration
299 // index is ignored)
300 STATIC
301 EFI_STATUS
302 HandleSetConfiguration (
303 IN USB_DEVICE_REQUEST *Request
304 )
305 {
306 USB_ENDPOINT_DESCRIPTOR *EPDesc;
307 UINTN Index;
308 UINT8 EndpointIndex;
309
310 ASSERT (Request->RequestType == USB_DEV_SET_CONFIGURATION_REQ_TYPE);
311 DEBUG ((EFI_D_INFO, "USB: Setting configuration.\n"));
312
313 // Configure endpoints
314 for (Index = 0; Index < mInterfaceDescriptor->NumEndpoints; Index++) {
315 EPDesc = &mEndpointDescriptors[Index];
316
317 // To simplify for now, assume endpoints aren't "sparse", and are in order.
318 ASSERT ((EPDesc->EndpointAddress & 0xF) == ((Index / 2) + 1));
319
320 // Convert from USB endpoint index to ISP1761 endpoint Index
321 // USB: Endpoint number is bits [3:0], IN/OUT is bit [7]
322 // ISP1761: Endpoint number is bits [4:1], IN/OUT is bit [0]
323 EndpointIndex = ((EPDesc->EndpointAddress & 0xF) << 1) |
324 ((EPDesc->EndpointAddress & BIT7) >> 7);
325 SelectEndpoint (EndpointIndex);
326 // Set endpoint type (Bulk/Isochronous/Interrupt)
327 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, EPDesc->MaxPacketSize);
328 // Hardware foible (bug?): Although the datasheet seems to suggest it should
329 // automatically be set to MaxPacketSize, the Buffer Length register appears
330 // to be reset to 0, which causes an empty packet to be sent in response to
331 // the first IN token of the session. The NOEMPKT field of the Endpoint Type
332 // register sounds like it might fix this problem, but it doesn't
333 // (it's "applicable only in the DMA mode").
334 WRITE_REG32 (ISP1761_BUFFER_LENGTH, EPDesc->MaxPacketSize);
335 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, (EPDesc->Attributes & 0x3) |
336 ISP1761_ENDPOINT_TYPE_ENABLE);
337 }
338
339 StatusAcknowledge (ISP1761_EP0TX);
340 return EFI_SUCCESS;
341 }
342
343 STATIC
344 EFI_STATUS
345 HandleDeviceRequest (
346 IN USB_DEVICE_REQUEST *Request
347 )
348 {
349 EFI_STATUS Status;
350
351 Status = EFI_SUCCESS;
352
353 switch (Request->Request) {
354 case USB_DEV_GET_DESCRIPTOR:
355 Status = HandleGetDescriptor (Request);
356 break;
357 case USB_DEV_SET_ADDRESS:
358 Status = HandleSetAddress (Request);
359 break;
360 case USB_DEV_SET_CONFIGURATION:
361 Status = HandleSetConfiguration (Request);
362 break;
363 default:
364 DEBUG ((EFI_D_ERROR,
365 "Didn't understand RequestType 0x%x Request 0x%x\n",
366 Request->RequestType, Request->Request));
367 Status = EFI_INVALID_PARAMETER;
368 break;
369 }
370
371 return Status;
372 }
373
374 // Instead of actually registering interrupt handlers, we poll the controller's
375 // interrupt source register in this function.
376 STATIC
377 VOID
378 CheckInterrupts (
379 IN EFI_EVENT Event,
380 IN VOID *Context
381 )
382 {
383 UINT32 DcInterrupts;
384 UINTN NumBytes;
385 UINTN MoreBytes;
386 UINT8 Packet[512];
387 VOID *DataPacket;
388 UINT32 HandledInterrupts;
389 UINT32 UnhandledInterrupts;
390 EFI_STATUS Status;
391
392 // Set bits in HandledInterrupts to mark the interrupt source handled.
393 HandledInterrupts = 0;
394
395 WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);
396
397 DcInterrupts = READ_REG32 (ISP1761_DC_INTERRUPT);
398 if (DcInterrupts & ISP1761_DC_INTERRUPT_SUSP) {
399 DEBUG ((EFI_D_INFO, "USB: Suspend\n"));
400 HandledInterrupts |= ISP1761_DC_INTERRUPT_SUSP;
401 }
402 if (DcInterrupts & ISP1761_DC_INTERRUPT_RESUME) {
403 DEBUG ((EFI_D_INFO, "USB: Resume\n"));
404 HandledInterrupts |= ISP1761_DC_INTERRUPT_RESUME;
405 }
406 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0SETUP) {
407 NumBytes = 512;
408 ReadEndpointBuffer (0x20, &NumBytes, &Packet);
409 ASSERT (NumBytes == 8);
410 HandleDeviceRequest ((USB_DEVICE_REQUEST *) Packet);
411 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0SETUP;
412 }
413 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0RX) {
414 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0RX;
415 }
416 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0TX) {
417 if (mControlTxPending) {
418 // We previously put some data in the Control Endpoint's IN (Tx) FIFO.
419 // We assume that that data has now been sent in response to the IN token
420 // that triggered this interrupt. We can therefore go to the Status stage
421 // of the control transfer.
422 StatusAcknowledge (ISP1761_EP0TX);
423 mControlTxPending = FALSE;
424 }
425 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0TX;
426 }
427 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1RX) {
428 NumBytes = 512;
429 DataPacket = AllocatePool (NumBytes);
430 Status = ReadEndpointBuffer (ISP1761_EP1RX, &NumBytes, DataPacket);
431 if (EFI_ERROR (Status) || NumBytes == 0) {
432 if (EFI_ERROR (Status)) {
433 DEBUG ((EFI_D_ERROR, "Couldn't read EP1RX data: %r\n", Status));
434 }
435 FreePool (DataPacket);
436 } else {
437 // Signal this event again so we poll again ASAP
438 gBS->SignalEvent (Event);
439 mDataReceivedCallback (NumBytes, DataPacket);
440 }
441 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1RX;
442 }
443 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1TX) {
444 mDataSentCallback (1);
445 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1TX;
446 }
447 if (DcInterrupts & (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF)) {
448 // Don't care about SOFs or pseudo-SOFs
449 HandledInterrupts |= (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF);
450 }
451 if (ISP1761_DC_INTERRUPT_BRESET) {
452 HandledInterrupts |= ISP1761_DC_INTERRUPT_BRESET;
453 }
454 if (ISP1761_DC_INTERRUPT_HS_STAT) {
455 HandledInterrupts |= ISP1761_DC_INTERRUPT_HS_STAT;
456 }
457 if (ISP1761_DC_INTERRUPT_VBUS) {
458 HandledInterrupts |= ISP1761_DC_INTERRUPT_VBUS;
459 }
460
461 UnhandledInterrupts = DcInterrupts & (~HandledInterrupts) & ISP1761_DC_INTERRUPT_MASK;
462 if (UnhandledInterrupts) {
463 DEBUG ((EFI_D_ERROR, "USB: Unhandled DC Interrupts: 0x%08x\n",
464 UnhandledInterrupts));
465 }
466
467 // Check if we received any more data while we were handling the interrupt.
468 SelectEndpoint (ISP1761_EP1RX);
469 MoreBytes = READ_REG16 (ISP1761_BUFFER_LENGTH);
470 if (MoreBytes) {
471 HandledInterrupts &= ~ISP1761_DC_INTERRUPT_EP1RX;
472 }
473
474 WRITE_REG32 (ISP1761_DC_INTERRUPT, HandledInterrupts);
475 }
476
477 EFI_STATUS
478 Isp1761PeriphSend (
479 IN UINT8 EndpointIndex,
480 IN UINTN Size,
481 IN CONST VOID *Buffer
482 )
483 {
484 return WriteEndpointBuffer (
485 (EndpointIndex << 1) | 0x1, //Convert to ISP1761 endpoint index, Tx
486 MAX_PACKET_SIZE_BULK,
487 Size,
488 Buffer
489 );
490 }
491
492 EFI_STATUS
493 EFIAPI
494 Isp1761PeriphStart (
495 IN USB_DEVICE_DESCRIPTOR *DeviceDescriptor,
496 IN VOID **Descriptors,
497 IN USB_DEVICE_RX_CALLBACK RxCallback,
498 IN USB_DEVICE_TX_CALLBACK TxCallback
499 )
500 {
501 UINT16 OtgStatus;
502 UINT8 *Ptr;
503 EFI_STATUS Status;
504 EFI_EVENT TimerEvent;
505
506 ASSERT (DeviceDescriptor != NULL);
507 ASSERT (Descriptors[0] != NULL);
508 ASSERT (RxCallback != NULL);
509 ASSERT (TxCallback != NULL);
510
511 WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);
512
513 WRITE_REG32 (ISP1761_SW_RESET_REG, ISP1761_SW_RESET_ALL);
514 while (READ_REG32 (ISP1761_SW_RESET_REG) & ISP1761_SW_RESET_ALL) {
515 //busy wait
516 }
517 WRITE_REG32 (ISP1761_MODE, ISP1761_MODE_SFRESET);
518 while (READ_REG32 (ISP1761_MODE) & ISP1761_MODE_SFRESET) {
519 //busy wait
520 }
521 DEBUG ((EFI_D_INFO, "USB: Software reset done\n"));
522
523 WRITE_REG32 (ISP1761_DC_INTERRUPT_ENABLE, 0x03FFFFFF);
524 WRITE_REG32 (ISP1761_OTG_INTERRUPT_ENABLE_RISE, 0x07FF);
525
526 WRITE_REG8 (ISP1761_ADDRESS, ISP1761_ADDRESS_DEVEN);
527 WRITE_REG8 (ISP1761_MODE, ISP1761_MODE_WKUPCS | ISP1761_MODE_CLKAON);
528
529 // Use port 1 as peripheral controller (magic - disagrees with datasheet)
530 WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0xffff0000);
531 WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0x000014d1);
532
533 OtgStatus = READ_REG16 (ISP1761_OTG_STATUS);
534 if ((OtgStatus & ISP1761_OTG_STATUS_B_SESS_END) != 0) {
535 DEBUG ((EFI_D_ERROR, "USB: Vbus not powered.\n"));
536 }
537 if ((OtgStatus & ISP1761_OTG_STATUS_A_B_SESS_VLD) == 0) {
538 DEBUG ((EFI_D_ERROR, "USB: Session not valid.\n"));
539 }
540
541 // Configure Control endpoints
542 SelectEndpoint (0x20);
543 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
544 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
545 SelectEndpoint (0x0);
546 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
547 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
548 SelectEndpoint (0x1);
549 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
550 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
551
552 // Interrupt on all ACK and NAK
553 WRITE_REG32 (ISP1761_INTERRUPT_CONFIG, ISP1761_INTERRUPT_CONFIG_ACK_ONLY);
554
555 mDeviceDescriptor = DeviceDescriptor;
556 mDescriptors = Descriptors[0];
557
558 // Right now we just support one configuration
559 ASSERT (mDeviceDescriptor->NumConfigurations == 1);
560 // ... and one interface
561 mConfigDescriptor = (USB_CONFIG_DESCRIPTOR *)mDescriptors;
562 ASSERT (mConfigDescriptor->NumInterfaces == 1);
563
564 Ptr = ((UINT8 *) mDescriptors) + sizeof (USB_CONFIG_DESCRIPTOR);
565 mInterfaceDescriptor = (USB_INTERFACE_DESCRIPTOR *) Ptr;
566 Ptr += sizeof (USB_INTERFACE_DESCRIPTOR);
567
568 mEndpointDescriptors = (USB_ENDPOINT_DESCRIPTOR *) Ptr;
569
570 mDataReceivedCallback = RxCallback;
571 mDataSentCallback = TxCallback;
572
573 // Register a timer event so CheckInterrupts gets called periodically
574 Status = gBS->CreateEvent (
575 EVT_TIMER | EVT_NOTIFY_SIGNAL,
576 TPL_CALLBACK,
577 CheckInterrupts,
578 NULL,
579 &TimerEvent
580 );
581 ASSERT_EFI_ERROR (Status);
582 if (EFI_ERROR (Status)) {
583 return Status;
584 }
585
586 Status = gBS->SetTimer (
587 TimerEvent,
588 TimerPeriodic,
589 ISP1761_INTERRUPT_POLL_PERIOD
590 );
591 ASSERT_EFI_ERROR (Status);
592
593 return Status;
594 }
595
596 USB_DEVICE_PROTOCOL mUsbDevice = {
597 Isp1761PeriphStart,
598 Isp1761PeriphSend
599 };
600
601
602 EFI_STATUS
603 EFIAPI
604 Isp1761PeriphEntryPoint (
605 IN EFI_HANDLE ImageHandle,
606 IN EFI_SYSTEM_TABLE *SystemTable
607 )
608 {
609 UINT32 DeviceId;
610 EFI_HANDLE Handle;
611
612 DeviceId = READ_REG32 (ISP1761_DEVICE_ID);
613
614 if (DeviceId != ISP1761_DEVICE_ID_VAL) {
615 DEBUG ((EFI_D_ERROR,
616 "ERROR: Read incorrect device ID for ISP1761: 0x%08x, expected 0x%08x\n",
617 DeviceId , ISP1761_DEVICE_ID_VAL
618 ));
619 return EFI_DEVICE_ERROR;
620 }
621
622 Handle = NULL;
623 return gBS->InstallProtocolInterface (
624 &Handle,
625 &gUsbDeviceProtocolGuid,
626 EFI_NATIVE_INTERFACE,
627 &mUsbDevice
628 );
629 }
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