EmbeddedPkg/TemplateCpuDxe/Arm/Exceptions.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008-2009 Apple Inc. All rights reserved.
   4 #
   5 # All rights reserved. This program and the accompanying materials
   6 # are licensed and made available under the terms and conditions of the BSD License
   7 # which accompanies this distribution.  The full text of the license may be found at
   8 # http://opensource.org/licenses/bsd-license.php
   9 #
  10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #------------------------------------------------------------------------------
  14
  15 .text
  16 .align 2
  17
  18 .globl _ExceptionHandlersStart
  19 .globl _ExceptionHandlersEnd
  20 .globl _CommonExceptionEntry
  21 .globl _AsmCommonExceptionEntry
  22 .globl _gExceptionHandlers
  23
  24 _ExceptionHandlersStart:
  25
  26 _Reset:
  27         b               _ResetEntry
  28
  29 _UndefinedInstruction:
  30         b               _UndefinedInstructionEntry
  31
  32 _SoftwareInterrupt:
  33         b               _SoftwareInterruptEntry
  34
  35 _PrefetchAbort:
  36         b               _PrefetchAbortEntry
  37
  38 _DataAbort:
  39         b               _DataAbortEntry
  40
  41 _ReservedException:
  42         b               _ReservedExceptionEntry
  43
  44 _Irq:
  45         b               _IrqEntry
  46
  47 _Fiq:
  48         b               _FiqEntry
  49
  50 _ResetEntry:
  51         stmfd           sp!,{r0-r1}
  52         mov             r0,#0
  53         ldr             r1,_CommonExceptionEntry
  54         bx              r1
  55
  56 _UndefinedInstructionEntry:
  57         stmfd           sp!,{r0-r1}
  58         mov             r0,#1
  59         ldr             r1,_CommonExceptionEntry
  60         bx              r1
  61
  62 _SoftwareInterruptEntry:
  63         stmfd           sp!,{r0-r1}
  64         mov             r0,#2
  65         ldr             r1,_CommonExceptionEntry
  66         bx              r1
  67
  68 _PrefetchAbortEntry:
  69         stmfd           sp!,{r0-r1}
  70         mov             r0,#3
  71         sub             lr,lr,#4
  72         ldr             r1,_CommonExceptionEntry
  73         bx              r1
  74
  75 _DataAbortEntry:
  76         stmfd           sp!,{r0-r1}
  77         mov             r0,#4
  78         sub             lr,lr,#8
  79         ldr             r1,_CommonExceptionEntry
  80         bx              r1
  81
  82 _ReservedExceptionEntry:
  83         stmfd           sp!,{r0-r1}
  84         mov             r0,#5
  85         ldr             r1,_CommonExceptionEntry
  86         bx              r1
  87
  88 _IrqEntry:
  89         stmfd           sp!,{r0-r1}
  90         mov             r0,#6
  91         sub             lr,lr,#4
  92         ldr             r1,_CommonExceptionEntry
  93         bx              r1
  94
  95 _FiqEntry:
  96         stmfd           sp!,{r0-r1}
  97         mov             r0,#7
  98         sub             lr,lr,#4
  99         ldr             r1,_CommonExceptionEntry
 100         bx              r1
 101
 102 _CommonExceptionEntry:
 103         .byte             0x12
 104         .byte             0x34
 105         .byte             0x56
 106         .byte             0x78
 107
 108 _ExceptionHandlersEnd:
 109
 110 LIndirectgExceptionHandlers:
 111         .long             _gExceptionHandlers
 112
 113 _AsmCommonExceptionEntry:
 114         mrc             p15, 0, r1, c6, c0, 2   @ Read IFAR
 115         stmfd           sp!,{r1}                @ Store the IFAR
 116
 117         mrc             p15, 0, r1, c5, c0, 1   @ Read IFSR
 118         stmfd           sp!,{r1}                @ Store the IFSR
 119
 120         mrc             p15, 0, r1, c6, c0, 0   @ Read DFAR
 121         stmfd           sp!,{r1}                @ Store the DFAR
 122
 123         mrc             p15, 0, r1, c5, c0, 0   @ Read DFSR
 124         stmfd           sp!,{r1}                @ Store the DFSR
 125
 126         mrs             r1,spsr                 @ Read SPSR (which is the pre-exception CPSR)
 127         stmfd           sp!,{r1}                @ Store the SPSR
 128
 129         stmfd           sp!,{lr}                @ Store the link register (which is the pre-exception PC)
 130         stmfd           sp,{sp,lr}^             @ Store user/system mode stack pointer and link register
 131         nop                                     @ Required by ARM architecture
 132         sub             sp,sp,#0x08             @ Adjust stack pointer
 133         stmfd           sp!,{r2-r12}            @ Store general purpose registers
 134
 135         ldr             r3,[sp,#0x40]           @ Read saved R1 from the stack (it was saved by the exception entry routine)
 136         ldr             r2,[sp,#0x3C]           @ Read saved R0 from the stack (it was saved by the exception entry routine)
 137         stmfd           sp!,{r2-r3}                 @ Store general purpose registers R0 and R1
 138
 139         mov             r1,sp                   @ Prepare System Context pointer as an argument for the exception handler
 140
 141         ldr             r2,LIndirectgExceptionHandlers  @ Offset to 32-bit address of exception handler
 142         ldr             r2,[r2]                         @ Load exception handler table
 143         ldr             r3,[r2,r0,lsl #2]               @ Index to find the handler for this exception
 144
 145 //        blx             r3                      @ Call exception handler
 146         bx             r3                      @ Call exception handler
 147
 148         ldr             r2,[sp,#0x40]           @ Load CPSR from context, in case it has changed
 149         msr             SPSR_cxsf,r2            @ Store it back to the SPSR to be restored when exiting this handler
 150
 151         ldmfd           sp!,{r0-r12}            @ Restore general purpose registers
 152         ldmia           sp,{sp,lr}^             @ Restore user/system mode stack pointer and link register
 153         nop                                     @ Required by ARM architecture
 154         add             sp,sp,#0x08             @ Adjust stack pointer
 155         ldmfd           sp!,{lr}                @ Restore the link register (which is the pre-exception PC)
 156         add             sp,sp,#0x1C             @ Clear out the remaining stack space
 157         movs            pc,lr                   @ Return from exception
 158