EmbeddedPkg/Universal/MmcDxe/Mmc.h

   1 /** @file
   2   Main Header file for the MMC DXE driver
   3
   4   Copyright (c) 2011-2015, ARM Limited. All rights reserved.
   5
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __MMC_H
  17 #define __MMC_H
  18
  19 #include <Uefi.h>
  20
  21 #include <Protocol/DiskIo.h>
  22 #include <Protocol/BlockIo.h>
  23 #include <Protocol/DevicePath.h>
  24 #include <Protocol/MmcHost.h>
  25
  26 #include <Library/UefiLib.h>
  27 #include <Library/DebugLib.h>
  28 #include <Library/UefiBootServicesTableLib.h>
  29
  30 #define MMC_TRACE(txt)  DEBUG((EFI_D_BLKIO, "MMC: " txt "\n"))
  31
  32 #define MMC_IOBLOCKS_READ       0
  33 #define MMC_IOBLOCKS_WRITE      1
  34
  35 #define MMC_OCR_POWERUP             0x80000000
  36
  37 #define MMC_OCR_ACCESS_MASK         0x3     /* bit[30-29] */
  38 #define MMC_OCR_ACCESS_BYTE         0x1     /* bit[29] */
  39 #define MMC_OCR_ACCESS_SECTOR       0x2     /* bit[30] */
  40
  41 #define MMC_CSD_GET_CCC(Response)    (Response[2] >> 20)
  42 #define MMC_CSD_GET_TRANSPEED(Response)    (Response[3] & 0xFF)
  43 #define MMC_CSD_GET_READBLLEN(Response)    ((Response[2] >> 16) & 0xF)
  44 #define MMC_CSD_GET_WRITEBLLEN(Response)  ((Response[0] >> 22) & 0xF)
  45 #define MMC_CSD_GET_FILEFORMAT(Response)  ((Response[0] >> 10) & 0x3)
  46 #define MMC_CSD_GET_FILEFORMATGRP(Response)  ((Response[0] >> 15) & 0x1)
  47 #define MMC_CSD_GET_DEVICESIZE(csd)         (((Response[1] >> 30) & 0x3) | ((Response[2] & 0x3FF) << 2))
  48 #define HC_MMC_CSD_GET_DEVICESIZE(Response)    ((Response[1] >> 16) | ((Response[2] & 0x40) << 16));
  49 #define MMC_CSD_GET_DEVICESIZEMULT(csd)     ((Response[1] >> 15) & 0x7)
  50
  51 #define MMC_R0_READY_FOR_DATA               (1 << 8)
  52
  53 #define MMC_R0_CURRENTSTATE(Response)       ((Response[0] >> 9) & 0xF)
  54
  55 #define MMC_R0_STATE_IDLE       0
  56 #define MMC_R0_STATE_READY      1
  57 #define MMC_R0_STATE_IDENT      2
  58 #define MMC_R0_STATE_STDBY      3
  59 #define MMC_R0_STATE_TRAN       4
  60 #define MMC_R0_STATE_DATA       5
  61
  62 #define EMMC_CMD6_ARG_ACCESS(x)             (((x) & 0x3) << 24)
  63 #define EMMC_CMD6_ARG_INDEX(x)              (((x) & 0xFF) << 16)
  64 #define EMMC_CMD6_ARG_VALUE(x)              (((x) & 0xFF) << 8)
  65 #define EMMC_CMD6_ARG_CMD_SET(x)            (((x) & 0x7) << 0)
  66
  67 #define SWITCH_CMD_DATA_LENGTH              64
  68 #define SD_HIGH_SPEED_SUPPORTED             0x20000
  69 #define SD_DEFAULT_SPEED                    25000000
  70 #define SD_HIGH_SPEED                       50000000
  71 #define SWITCH_CMD_SUCCESS_MASK             0x0f000000
  72
  73 #define SD_CARD_CAPACITY                    0x00000002
  74
  75 #define BUSWIDTH_4                          4
  76
  77 typedef enum {
  78   UNKNOWN_CARD,
  79   MMC_CARD,              //MMC card
  80   MMC_CARD_HIGH,         //MMC Card with High capacity
  81   EMMC_CARD,             //eMMC 4.41 card
  82   SD_CARD,               //SD 1.1 card
  83   SD_CARD_2,             //SD 2.0 or above standard card
  84   SD_CARD_2_HIGH         //SD 2.0 or above high capacity card
  85 } CARD_TYPE;
  86
  87 typedef struct {
  88   UINT32  Reserved0:   7; // 0
  89   UINT32  V170_V195:   1; // 1.70V - 1.95V
  90   UINT32  V200_V260:   7; // 2.00V - 2.60V
  91   UINT32  V270_V360:   9; // 2.70V - 3.60V
  92   UINT32  RESERVED_1:  5; // Reserved
  93   UINT32  AccessMode:  2; // 00b (byte mode), 10b (sector mode)
  94   UINT32  PowerUp:     1; // This bit is set to LOW if the card has not finished the power up routine
  95 } OCR;
  96
  97 typedef struct {
  98   UINT8   SD_SPEC:               4; // SD Memory Card - Spec. Version [59:56]
  99   UINT8   SCR_STRUCTURE:         4; // SCR Structure [63:60]
 100   UINT8   SD_BUS_WIDTHS:         4; // DAT Bus widths supported [51:48]
 101   UINT8   DATA_STAT_AFTER_ERASE: 1; // Data Status after erases [55]
 102   UINT8   SD_SECURITY:           3; // CPRM Security Support [54:52]
 103   UINT8   EX_SECURITY_1:         1; // Extended Security Support [43]
 104   UINT8   SD_SPEC4:              1; // Spec. Version 4.00 or higher [42]
 105   UINT8   RESERVED_1:            2; // Reserved [41:40]
 106   UINT8   SD_SPEC3:              1; // Spec. Version 3.00 or higher [47]
 107   UINT8   EX_SECURITY_2:         3; // Extended Security Support [46:44]
 108   UINT8   CMD_SUPPORT:           4; // Command Support bits [35:32]
 109   UINT8   RESERVED_2:            4; // Reserved [39:36]
 110   UINT32  RESERVED_3;               // Manufacturer Usage [31:0]
 111 } SCR;
 112
 113 typedef struct {
 114   UINT32  NOT_USED;   // 1 [0:0]
 115   UINT32  CRC;        // CRC7 checksum [7:1]
 116   UINT32  MDT;        // Manufacturing date [19:8]
 117   UINT32  RESERVED_1; // Reserved [23:20]
 118   UINT32  PSN;        // Product serial number [55:24]
 119   UINT8   PRV;        // Product revision [63:56]
 120   UINT8   PNM[5];     // Product name [64:103]
 121   UINT16  OID;        // OEM/Application ID [119:104]
 122   UINT8   MID;        // Manufacturer ID [127:120]
 123 } CID;
 124
 125 typedef struct {
 126   UINT8   NOT_USED:           1; // Not used, always 1 [0:0]
 127   UINT8   CRC:                7; // CRC [7:1]
 128
 129   UINT8   RESERVED_1:         2; // Reserved [9:8]
 130   UINT8   FILE_FORMAT:        2; // File format [11:10]
 131   UINT8   TMP_WRITE_PROTECT:  1; // Temporary write protection [12:12]
 132   UINT8   PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]
 133   UINT8   COPY:               1; // Copy flag (OTP) [14:14]
 134   UINT8   FILE_FORMAT_GRP:    1; // File format group [15:15]
 135
 136   UINT16  RESERVED_2:         5; // Reserved [20:16]
 137   UINT16  WRITE_BL_PARTIAL:   1; // Partial blocks for write allowed [21:21]
 138   UINT16  WRITE_BL_LEN:       4; // Max. write data block length [25:22]
 139   UINT16  R2W_FACTOR:         3; // Write speed factor [28:26]
 140   UINT16  RESERVED_3:         2; // Reserved [30:29]
 141   UINT16  WP_GRP_ENABLE:      1; // Write protect group enable [31:31]
 142
 143   UINT32  WP_GRP_SIZE:        7; // Write protect group size [38:32]
 144   UINT32  SECTOR_SIZE:        7; // Erase sector size [45:39]
 145   UINT32  ERASE_BLK_EN:       1; // Erase single block enable [46:46]
 146   UINT32  C_SIZE_MULT:        3; // Device size multiplier [49:47]
 147   UINT32  VDD_W_CURR_MAX:     3; // Max. write current @ VDD max [52:50]
 148   UINT32  VDD_W_CURR_MIN:     3; // Max. write current @ VDD min [55:53]
 149   UINT32  VDD_R_CURR_MAX:     3; // Max. read current @ VDD max [58:56]
 150   UINT32  VDD_R_CURR_MIN:     3; // Max. read current @ VDD min [61:59]
 151   UINT32  C_SIZELow2:         2; // Device size [63:62]
 152
 153   UINT32  C_SIZEHigh10:       10;// Device size [73:64]
 154   UINT32  RESERVED_4:         2; // Reserved [75:74]
 155   UINT32  DSR_IMP:            1; // DSR implemented [76:76]
 156   UINT32  READ_BLK_MISALIGN:  1; // Read block misalignment [77:77]
 157   UINT32  WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]
 158   UINT32  READ_BL_PARTIAL:    1; // Partial blocks for read allowed [79:79]
 159   UINT32  READ_BL_LEN:        4; // Max. read data block length [83:80]
 160   UINT32  CCC:                12;// Card command classes [95:84]
 161
 162   UINT8   TRAN_SPEED          ;  // Max. bus clock frequency [103:96]
 163   UINT8   NSAC                ;  // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]
 164   UINT8   TAAC                ;  // Data read access-time 1 [119:112]
 165
 166   UINT8   RESERVED_5:         2; // Reserved [121:120]
 167   UINT8   SPEC_VERS:          4; // System specification version [125:122]
 168   UINT8   CSD_STRUCTURE:      2; // CSD structure [127:126]
 169 } CSD;
 170
 171 typedef struct {
 172   UINT8   RESERVED_1[16];                     // Reserved [15:0]
 173   UINT8   SECURE_REMOVAL_TYPE;                // Secure Removal Type [16:16]
 174   UINT8   PRODUCT_STATE_AWARENESS_ENABLEMENT; // Product state awareness enablement [17:17]
 175   UINT8   MAX_PRE_LOADING_DATA_SIZE[4];       // MAX pre loading data size [21:18]
 176   UINT8   PRE_LOADING_DATA_SIZE[4];           // Pre loading data size [25:22]
 177   UINT8   FFU_STATUS;                         // FFU Status [26:26]
 178   UINT8   RESERVED_2[2];                      // Reserved [28:27]
 179   UINT8   MODE_OPERATION_CODES;               // Mode operation codes [29:29]
 180   UINT8   MODE_CONFIG;                        // Mode config [30:30]
 181   UINT8   RESERVED_3;                         // Reserved [31:31]
 182   UINT8   FLUSH_CACHE;                        // Flushing of the cache [32:32]
 183   UINT8   CACHE_CTRL;                         // Control to turn the cache ON/OFF [33:33]
 184   UINT8   POWER_OFF_NOTIFICATION;             // Power Off Notification [34:34]
 185   UINT8   PACKED_FAILURE_INDEX;               // Packed command failure index [35:35]
 186   UINT8   PACKED_COMMAND_STATUS;              // Packed command status [36:36]
 187   UINT8   CONTEXT_CONF[15];                   // Context configuration [51:37]
 188   UINT8   EXT_PARTITIONS_ATTRIBUTE[2];        // Extended partitions attribute [53:52]
 189   UINT8   EXCEPTION_EVENTS_STATUS[2];         // Exception events status [55:54]
 190   UINT8   EXCEPTION_EVENTS_CTRL[2];           // Exception events control [57:56]
 191   UINT8   DYNCAP_NEEDED;                      // Number of addressed group to be released [58:58]
 192   UINT8   CLASS_6_CTRL;                       // Class 6 commands control [59:59]
 193   UINT8   INI_TIMEOUT_EMU;                    // 1st initialization after disabling sector size emulation [60:60]
 194   UINT8   DATA_SECTOR_SIZE;                   // Sector size [61:61]
 195   UINT8   USE_NATIVE_SECTOR;                  // Sector size emulation [62:62]
 196   UINT8   NATIVE_SECTOR_SIZE;                 // Native sector size [63:63]
 197   UINT8   VENDOR_SPECIFIC_FIELD[64];          // Vendor specific fields [127:64]
 198   UINT8   RESERVED_4[2];                      // Reserved [129:128]
 199   UINT8   PROGRAM_CID_CSD_DDR_SUPPORT;        // Program CID/CSD in DDR mode support [130:130]
 200   UINT8   PERIODIC_WAKEUP;                    // Periodic wake-up [131:131]
 201   UINT8   TCASE_SUPPORT;                      // Package case temperature is controlled [132:132]
 202   UINT8   PRODUCTION_STATE_AWARENESS;         // Production state awareness [133:133]
 203   UINT8   SECTOR_BAD_BLK_MGMNT;               // Bad block management mode [134:134]
 204   UINT8   RESERVED_5;                         // Reserved [135:135]
 205   UINT8   ENH_START_ADDR[4];                  // Enhanced user data start address [139:136]
 206   UINT8   ENH_SIZE_MULT[3];                   // Enhanced user data area size [142:140]
 207   UINT8   GP_SIZE_MULT[12];                   // General purpose partition size [154:143]
 208   UINT8   PARTITION_SETTING_COMPLETED;        // Partitioning setting [155:155]
 209   UINT8   PARTITIONS_ATTRIBUTE;               // Partitions attribute [156:156]
 210   UINT8   MAX_ENH_SIZE_MULT[3];               // Max enhanced area size [159:157]
 211   UINT8   PARTITIONING_SUPPORT;               // Partitioning [160:160]
 212   UINT8   HPI_MGMT;                           // HPI management [161:161]
 213   UINT8   RST_N_FUNCTION;                     // H/W reset function [162:162]
 214   UINT8   BKOPS_EN;                           // Enable background operations handshake [163:163]
 215   UINT8   BKOPS_START;                        // Manually start background operations [164:164]
 216   UINT8   SANITIZE_START;                     // Start sanitize operation [165:165]
 217   UINT8   WR_REL_PARAM;                       // Write reliability parameter register [166:166]
 218   UINT8   WR_REL_SET;                         // Write reliability setting register [167:167]
 219   UINT8   RPMB_SIZE_MULT;                     // RPMB size [168:168]
 220   UINT8   FW_CONFIG;                          // FW configuration [169:169]
 221   UINT8   RESERVED_6;                         // Reserved [170:170]
 222   UINT8   USER_WP;                            // User area write protection register [171:171]
 223   UINT8   RESERVED_7;                         // Reserved [172:172]
 224   UINT8   BOOT_WP;                            // Boot area write protection register [173:173]
 225   UINT8   BOOT_WP_STATUS;                     // Boot write protection register [174:174]
 226   UINT8   ERASE_GROUP_DEF;                    // High-density erase group definition [175:175]
 227   UINT8   RESERVED_8;                         // Reserved [176:176]
 228   UINT8   BOOT_BUS_CONDITIONS;                // Boot bus conditions [177:177]
 229   UINT8   BOOT_CONFIG_PROT;                   // Boot config protection [178:178]
 230   UINT8   PARTITION_CONFIG;                   // Partition config [179:179]
 231   UINT8   RESERVED_9;                         // Reserved [180:180]
 232   UINT8   ERASED_MEM_CONT;                    // Erased memory content [181:181]
 233   UINT8   RESERVED_10;                        // Reserved [182:182]
 234   UINT8   BUS_WIDTH;                          // Bus width mode [183:183]
 235   UINT8   RESERVED_11;                        // Reserved [184:184]
 236   UINT8   HS_TIMING;                          // High-speed interface timing [185:185]
 237   UINT8   RESERVED_12;                        // Reserved [186:186]
 238   UINT8   POWER_CLASS;                        // Power class [187:187]
 239   UINT8   RESERVED_13;                        // Reserved [188:188]
 240   UINT8   CMD_SET_REV;                        // Command set revision [189:189]
 241   UINT8   RESERVED_14;                        // Reserved [190:190]
 242   UINT8   CMD_SET;                            // Command set [191:191]
 243   UINT8   EXT_CSD_REV;                        // Extended CSD revision [192:192]
 244   UINT8   RESERVED_15;                        // Reserved [193:193]
 245   UINT8   CSD_STRUCTURE;                      // CSD Structure [194:194]
 246   UINT8   RESERVED_16;                        // Reserved [195:195]
 247   UINT8   DEVICE_TYPE;                        // Device type [196:196]
 248   UINT8   DRIVER_STRENGTH;                    // I/O Driver strength [197:197]
 249   UINT8   OUT_OF_INTERRUPT_TIME;              // Out-of-interrupt busy timing [198:198]
 250   UINT8   PARTITION_SWITCH_TIME;              // Partition switching timing [199:199]
 251   UINT8   PWR_CL_52_195;                      // Power class for 52MHz at 1.95V 1 R [200:200]
 252   UINT8   PWR_CL_26_195;                      // Power class for 26MHz at 1.95V 1 R [201:201]
 253   UINT8   PWR_CL_52_360;                      // Power class for 52MHz at 3.6V 1 R [202:202]
 254   UINT8   PWR_CL_26_360;                      // Power class for 26MHz at 3.6V 1 R [203:203]
 255   UINT8   RESERVED_17;                        // Reserved [204:204]
 256   UINT8   MIN_PERF_R_4_26;                    // Minimum read performance for 4bit at 26MHz [205:205]
 257   UINT8   MIN_PERF_W_4_26;                    // Minimum write performance for 4bit at 26MHz [206:206]
 258   UINT8   MIN_PERF_R_8_26_4_52;               // Minimum read performance for 8bit at 26MHz, for 4bit at 52MHz [207:207]
 259   UINT8   MIN_PERF_W_8_26_4_52;               // Minimum write performance for 8bit at 26MHz, for 4bit at 52MHz [208:208]
 260   UINT8   MIN_PERF_R_8_52;                    // Minimum read performance for 8bit at 52MHz [209:209]
 261   UINT8   MIN_PERF_W_8_52;                    // Minimum write performance for 8bit at 52MHz [210:210]
 262   UINT8   RESERVED_18;                        // Reserved [211:211]
 263   UINT32  SECTOR_COUNT;                       // Sector count [215:212]
 264   UINT8   SLEEP_NOTIFICATION_TIME;            // Sleep notification timout [216:216]
 265   UINT8   S_A_TIMEOUT;                        // Sleep/awake timeout [217:217]
 266   UINT8   PRODUCTION_STATE_AWARENESS_TIMEOUT; // Production state awareness timeout [218:218]
 267   UINT8   S_C_VCCQ;                           // Sleep current (VCCQ) [219:219]
 268   UINT8   S_C_VCC;                            // Sleep current (VCC) [220:220]
 269   UINT8   HC_WP_GRP_SIZE;                     // High-capacity write protect group size [221:221]
 270   UINT8   REL_WR_SECTOR_C;                    // Reliable write sector count [222:222]
 271   UINT8   ERASE_TIMEOUT_MULT;                 // High-capacity erase timeout [223:223]
 272   UINT8   HC_ERASE_GRP_SIZE;                  // High-capacity erase unit size [224:224]
 273   UINT8   ACC_SIZE;                           // Access size [225:225]
 274   UINT8   BOOT_SIZE_MULTI;                    // Boot partition size [226:226]
 275   UINT8   RESERVED_19;                        // Reserved [227:227]
 276   UINT8   BOOT_INFO;                          // Boot information [228:228]
 277   UINT8   SECURE_TRIM_MULT;                   // Secure TRIM Multiplier [229:229]
 278   UINT8   SECURE_ERASE_MULT;                  // Secure Erase Multiplier [230:230]
 279   UINT8   SECURE_FEATURE_SUPPORT;             // Secure Feature Support [231:231]
 280   UINT8   TRIM_MULT;                          // TRIM Multiplier [232:232]
 281   UINT8   RESERVED_20;                        // Reserved [233:233]
 282   UINT8   MIN_PREF_DDR_R_8_52;                // Minimum read performance for 8bit at 52MHz in DDR mode [234:234]
 283   UINT8   MIN_PREF_DDR_W_8_52;                // Minimum write performance for 8bit at 52MHz in DDR mode [235:235]
 284   UINT8   PWR_CL_200_130;                     // Power class for 200MHz at VCCQ=1.3V, VCC=3.6V [236:236]
 285   UINT8   PWR_CL_200_195;                     // Power class for 200MHz at VCCQ=1.95V, VCC=3.6V [237:237]
 286   UINT8   PWR_CL_DDR_52_195;                  // Power class for 52MHz, DDR at 1.95V [238:238]
 287   UINT8   PWR_CL_DDR_52_360;                  // Power class for 52Mhz, DDR at 3.6V [239:239]
 288   UINT8   RESERVED_21;                        // Reserved [240:240]
 289   UINT8   INI_TIMEOUT_AP;                     // 1st initialization time after partitioning [241:241]
 290   UINT8   CORRECTLY_PRG_SECTORS_NUM[4];       // Number of correctly programmed sectors [245:242]
 291   UINT8   BKOPS_STATUS;                       // Background operations status [246:246]
 292   UINT8   POWER_OFF_LONG_TIME;                // Power off notification (long) timeout [247:247]
 293   UINT8   GENERIC_CMD6_TIME;                  // Generic CMD6 timeout [248:248]
 294   UINT8   CACHE_SIZE[4];                      // Cache size [252:249]
 295   UINT8   PWR_CL_DDR_200_360;                 // Power class for 200MHz, DDR at VCC=3.6V [253:253]
 296   UINT8   FIRMWARE_VERSION[8];                // Firmware version [261:254]
 297   UINT8   DEVICE_VERSION[2];                  // Device version [263:262]
 298   UINT8   OPTIMAL_TRIM_UNIT_SIZE;             // Optimal trim unit size [264:264]
 299   UINT8   OPTIMAL_WRITE_SIZE;                 // Optimal write size [265:265]
 300   UINT8   OPTIMAL_READ_SIZE;                  // Optimal read size [266:266]
 301   UINT8   PRE_EOL_INFO;                       // Pre EOL information [267:267]
 302   UINT8   DEVICE_LIFE_TIME_EST_TYP_A;         // Device life time estimation type A [268:268]
 303   UINT8   DEVICE_LIFE_TIME_EST_TYP_B;         // Device life time estimation type B [269:269]
 304   UINT8   VENDOR_PROPRIETARY_HEALTH_REPORT[32];         // Vendor proprietary health report [301:270]
 305   UINT8   NUMBER_OF_FW_SECTORS_CORRECTLY_PROGRAMMED[4]; // Number of FW sectors correctly programmed [305:302]
 306   UINT8   RESERVED_22[181];                   // Reserved [486:306]
 307   UINT8   FFU_ARG[4];                         // FFU argument [490:487]
 308   UINT8   OPERATION_CODE_TIMEOUT;             // Operation codes timeout [491:491]
 309   UINT8   FFU_FEATURES;                       // FFU features [492:492]
 310   UINT8   SUPPORTED_MODES;                    // Supported modes [493:493]
 311   UINT8   EXT_SUPPORT;                        // Extended partitions attribute support [494:494]
 312   UINT8   LARGE_UNIT_SIZE_M1;                 // Large unit size [495:495]
 313   UINT8   CONTEXT_CAPABILITIES;               // Context management capabilities [496:496]
 314   UINT8   TAG_RES_SIZE;                       // Tag resource size [497:497]
 315   UINT8   TAG_UNIT_SIZE;                      // Tag unit size [498:498]
 316   UINT8   DATA_TAG_SUPPORT;                   // Data tag support [499:499]
 317   UINT8   MAX_PACKED_WRITES;                  // Max packed write commands [500:500]
 318   UINT8   MAX_PACKED_READS;                   // Max packed read commands [501:501]
 319   UINT8   BKOPS_SUPPORT;                      // Background operations support [502:502]
 320   UINT8   HPI_FEATURES;                       // HPI features [503:503]
 321   UINT8   S_CMD_SET;                          // Supported command sets [504:504]
 322   UINT8   EXT_SECURITY_ERR;                   // Extended security commands error [505:505]
 323   UINT8   RESERVED_23[6];                     // Reserved [511:506]
 324 } ECSD;
 325
 326 typedef struct  {
 327   UINT16    RCA;
 328   CARD_TYPE CardType;
 329   OCR       OCRData;
 330   CID       CIDData;
 331   CSD       CSDData;
 332   ECSD      *ECSDData;                         // MMC V4 extended card specific
 333 } CARD_INFO;
 334
 335 typedef struct _MMC_HOST_INSTANCE {
 336   UINTN                     Signature;
 337   LIST_ENTRY                Link;
 338   EFI_HANDLE                MmcHandle;
 339   EFI_DEVICE_PATH_PROTOCOL  *DevicePath;
 340
 341   MMC_STATE                 State;
 342   EFI_BLOCK_IO_PROTOCOL     BlockIo;
 343   CARD_INFO                 CardInfo;
 344   EFI_MMC_HOST_PROTOCOL     *MmcHost;
 345
 346   BOOLEAN                   Initialized;
 347 } MMC_HOST_INSTANCE;
 348
 349 #define MMC_HOST_INSTANCE_SIGNATURE                 SIGNATURE_32('m', 'm', 'c', 'h')
 350 #define MMC_HOST_INSTANCE_FROM_BLOCK_IO_THIS(a)     CR (a, MMC_HOST_INSTANCE, BlockIo, MMC_HOST_INSTANCE_SIGNATURE)
 351 #define MMC_HOST_INSTANCE_FROM_LINK(a)              CR (a, MMC_HOST_INSTANCE, Link, MMC_HOST_INSTANCE_SIGNATURE)
 352
 353
 354 EFI_STATUS
 355 EFIAPI
 356 MmcGetDriverName (
 357   IN  EFI_COMPONENT_NAME_PROTOCOL  *This,
 358   IN  CHAR8                        *Language,
 359   OUT CHAR16                       **DriverName
 360   );
 361
 362 EFI_STATUS
 363 EFIAPI
 364 MmcGetControllerName (
 365   IN  EFI_COMPONENT_NAME_PROTOCOL                     *This,
 366   IN  EFI_HANDLE                                      ControllerHandle,
 367   IN  EFI_HANDLE                                      ChildHandle        OPTIONAL,
 368   IN  CHAR8                                           *Language,
 369   OUT CHAR16                                          **ControllerName
 370   );
 371
 372 extern EFI_COMPONENT_NAME_PROTOCOL  gMmcComponentName;
 373 extern EFI_COMPONENT_NAME2_PROTOCOL gMmcComponentName2;
 374
 375 extern EFI_DRIVER_DIAGNOSTICS2_PROTOCOL gMmcDriverDiagnostics2;
 376
 377 extern LIST_ENTRY mMmcHostPool;
 378
 379 /**
 380   Reset the block device.
 381
 382   This function implements EFI_BLOCK_IO_PROTOCOL.Reset().
 383   It resets the block device hardware.
 384   ExtendedVerification is ignored in this implementation.
 385
 386   @param  This                   Indicates a pointer to the calling context.
 387   @param  ExtendedVerification   Indicates that the driver may perform a more exhaustive
 388                                  verification operation of the device during reset.
 389
 390   @retval EFI_SUCCESS            The block device was reset.
 391   @retval EFI_DEVICE_ERROR       The block device is not functioning correctly and could not be reset.
 392
 393 **/
 394 EFI_STATUS
 395 EFIAPI
 396 MmcReset (
 397   IN EFI_BLOCK_IO_PROTOCOL    *This,
 398   IN BOOLEAN                  ExtendedVerification
 399   );
 400
 401 /**
 402   Reads the requested number of blocks from the device.
 403
 404   This function implements EFI_BLOCK_IO_PROTOCOL.ReadBlocks().
 405   It reads the requested number of blocks from the device.
 406   All the blocks are read, or an error is returned.
 407
 408   @param  This                   Indicates a pointer to the calling context.
 409   @param  MediaId                The media ID that the read request is for.
 410   @param  Lba                    The starting logical block address to read from on the device.
 411   @param  BufferSize             The size of the Buffer in bytes.
 412                                  This must be a multiple of the intrinsic block size of the device.
 413   @param  Buffer                 A pointer to the destination buffer for the data. The caller is
 414                                  responsible for either having implicit or explicit ownership of the buffer.
 415
 416   @retval EFI_SUCCESS            The data was read correctly from the device.
 417   @retval EFI_DEVICE_ERROR       The device reported an error while attempting to perform the read operation.
 418   @retval EFI_NO_MEDIA           There is no media in the device.
 419   @retval EFI_MEDIA_CHANGED      The MediaId is not for the current media.
 420   @retval EFI_BAD_BUFFER_SIZE    The BufferSize parameter is not a multiple of the intrinsic block size of the device.
 421   @retval EFI_INVALID_PARAMETER  The read request contains LBAs that are not valid,
 422                                  or the buffer is not on proper alignment.
 423
 424 **/
 425 EFI_STATUS
 426 EFIAPI
 427 MmcReadBlocks (
 428   IN EFI_BLOCK_IO_PROTOCOL    *This,
 429   IN UINT32                   MediaId,
 430   IN EFI_LBA                  Lba,
 431   IN UINTN                    BufferSize,
 432   OUT VOID                    *Buffer
 433   );
 434
 435 /**
 436   Writes a specified number of blocks to the device.
 437
 438   This function implements EFI_BLOCK_IO_PROTOCOL.WriteBlocks().
 439   It writes a specified number of blocks to the device.
 440   All blocks are written, or an error is returned.
 441
 442   @param  This                   Indicates a pointer to the calling context.
 443   @param  MediaId                The media ID that the write request is for.
 444   @param  Lba                    The starting logical block address to be written.
 445   @param  BufferSize             The size of the Buffer in bytes.
 446                                  This must be a multiple of the intrinsic block size of the device.
 447   @param  Buffer                 Pointer to the source buffer for the data.
 448
 449   @retval EFI_SUCCESS            The data were written correctly to the device.
 450   @retval EFI_WRITE_PROTECTED    The device cannot be written to.
 451   @retval EFI_NO_MEDIA           There is no media in the device.
 452   @retval EFI_MEDIA_CHANGED      The MediaId is not for the current media.
 453   @retval EFI_DEVICE_ERROR       The device reported an error while attempting to perform the write operation.
 454   @retval EFI_BAD_BUFFER_SIZE    The BufferSize parameter is not a multiple of the intrinsic
 455                                  block size of the device.
 456   @retval EFI_INVALID_PARAMETER  The write request contains LBAs that are not valid,
 457                                  or the buffer is not on proper alignment.
 458
 459 **/
 460 EFI_STATUS
 461 EFIAPI
 462 MmcWriteBlocks (
 463   IN EFI_BLOCK_IO_PROTOCOL    *This,
 464   IN UINT32                   MediaId,
 465   IN EFI_LBA                  Lba,
 466   IN UINTN                    BufferSize,
 467   IN VOID                     *Buffer
 468   );
 469
 470 /**
 471   Flushes all modified data to a physical block device.
 472
 473   @param  This                   Indicates a pointer to the calling context.
 474
 475   @retval EFI_SUCCESS            All outstanding data were written correctly to the device.
 476   @retval EFI_DEVICE_ERROR       The device reported an error while attempting to write data.
 477   @retval EFI_NO_MEDIA           There is no media in the device.
 478
 479 **/
 480 EFI_STATUS
 481 EFIAPI
 482 MmcFlushBlocks (
 483   IN EFI_BLOCK_IO_PROTOCOL  *This
 484   );
 485
 486 EFI_STATUS
 487 MmcNotifyState (
 488   IN MMC_HOST_INSTANCE      *MmcHostInstance,
 489   IN MMC_STATE               State
 490   );
 491
 492 EFI_STATUS
 493 InitializeMmcDevice (
 494   IN  MMC_HOST_INSTANCE     *MmcHost
 495   );
 496
 497 VOID
 498 EFIAPI
 499 CheckCardsCallback (
 500   IN  EFI_EVENT   Event,
 501   IN  VOID        *Context
 502   );
 503
 504 VOID
 505 PrintCSD (
 506   IN UINT32* Csd
 507   );
 508
 509 VOID
 510 PrintRCA (
 511   IN UINT32 Rca
 512   );
 513
 514 VOID
 515 PrintOCR (
 516   IN UINT32 Ocr
 517   );
 518
 519 VOID
 520 PrintResponseR1 (
 521   IN  UINT32 Response
 522   );
 523
 524 VOID
 525 PrintCID (
 526   IN UINT32* Cid
 527   );
 528
 529 #endif