IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/Serial.h

   1 /**@file
   2   Include for Serial Driver
   3
   4 Copyright (c) 2006 - 2007, Intel Corporation.<BR>
   5 All rights reserved. This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _SERIAL_H
  16 #define _SERIAL_H
  17
  18
  19 #include <PiDxe.h>
  20 #include <FrameworkPei.h>
  21
  22 #include <Protocol/IsaIo.h>
  23 #include <Protocol/SerialIo.h>
  24 #include <Protocol/DevicePath.h>
  25
  26 #include <Library/DebugLib.h>
  27 #include <Library/UefiDriverEntryPoint.h>
  28 #include <Library/BaseLib.h>
  29 #include <Library/UefiLib.h>
  30 #include <Library/DevicePathLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/UefiBootServicesTableLib.h>
  34 #include <Library/ReportStatusCodeLib.h>
  35 #include <Library/PcdLib.h>
  36 //
  37 // Driver Binding Externs
  38 //
  39 extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
  40 extern EFI_COMPONENT_NAME_PROTOCOL gIsaSerialComponentName;
  41
  42 //
  43 // Internal Data Structures
  44 //
  45 #define SERIAL_DEV_SIGNATURE    EFI_SIGNATURE_32 ('s', 'e', 'r', 'd')
  46 #define SERIAL_MAX_BUFFER_SIZE  16
  47 #define TIMEOUT_STALL_INTERVAL  10
  48
  49 //
  50 //  Name:   SERIAL_DEV_FIFO
  51 //  Purpose:  To define Receive FIFO and Transmit FIFO
  52 //  Context:  Used by serial data transmit and receive
  53 //  Fields:
  54 //      First UINT32: The index of the first data in array Data[]
  55 //      Last  UINT32: The index, which you can put a new data into array Data[]
  56 //      Surplus UINT32: Identify how many data you can put into array Data[]
  57 //      Data[]  UINT8 : An array, which used to store data
  58 //
  59 typedef struct {
  60   UINT32  First;
  61   UINT32  Last;
  62   UINT32  Surplus;
  63   UINT8   Data[SERIAL_MAX_BUFFER_SIZE];
  64 } SERIAL_DEV_FIFO;
  65
  66 typedef enum {
  67   UART8250  = 0,
  68   UART16450 = 1,
  69   UART16550 = 2,
  70   UART16550A= 3
  71 } EFI_UART_TYPE;
  72
  73 //
  74 //  Name:   SERIAL_DEV
  75 //  Purpose:  To provide device specific information
  76 //  Context:
  77 //  Fields:
  78 //      Signature UINTN: The identity of the serial device
  79 //      SerialIo  SERIAL_IO_PROTOCOL: Serial I/O protocol interface
  80 //      SerialMode  SERIAL_IO_MODE:
  81 //      DevicePath  EFI_DEVICE_PATH_PROTOCOL *: Device path of the serial device
  82 //      Handle      EFI_HANDLE: The handle instance attached to serial device
  83 //      BaseAddress UINT16: The base address of specific serial device
  84 //      Receive     SERIAL_DEV_FIFO: The FIFO used to store data,
  85 //                  which is received by UART
  86 //      Transmit    SERIAL_DEV_FIFO: The FIFO used to store data,
  87 //                  which you want to transmit by UART
  88 //      SoftwareLoopbackEnable BOOLEAN:
  89 //      Type    EFI_UART_TYPE: Specify the UART type of certain serial device
  90 //
  91 typedef struct {
  92   UINTN                                  Signature;
  93
  94   EFI_HANDLE                             Handle;
  95   EFI_SERIAL_IO_PROTOCOL                 SerialIo;
  96   EFI_SERIAL_IO_MODE                     SerialMode;
  97   EFI_DEVICE_PATH_PROTOCOL               *DevicePath;
  98
  99   EFI_DEVICE_PATH_PROTOCOL               *ParentDevicePath;
 100   UART_DEVICE_PATH                       UartDevicePath;
 101   EFI_ISA_IO_PROTOCOL                    *IsaIo;
 102
 103   UINT16                                 BaseAddress;
 104   SERIAL_DEV_FIFO                        Receive;
 105   SERIAL_DEV_FIFO                        Transmit;
 106   BOOLEAN                                SoftwareLoopbackEnable;
 107   BOOLEAN                                HardwareFlowControl;
 108   EFI_UART_TYPE                          Type;
 109   EFI_UNICODE_STRING_TABLE               *ControllerNameTable;
 110 } SERIAL_DEV;
 111
 112 #include "ComponentName.h"
 113
 114 #define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
 115
 116 //
 117 // Globale Variables
 118 //
 119 extern EFI_DRIVER_BINDING_PROTOCOL  gSerialControllerDriver;
 120
 121 //
 122 // Serial Driver Defaults
 123 //
 124 #define SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH  1
 125 #define SERIAL_PORT_DEFAULT_TIMEOUT             1000000
 126
 127 /*
 128 #define SERIAL_PORT_DEFAULT_BAUD_RATE           115200
 129 #define SERIAL_PORT_DEFAULT_PARITY              NoParity
 130 #define SERIAL_PORT_DEFAULT_DATA_BITS           8
 131 #define SERIAL_PORT_DEFAULT_STOP_BITS           1
 132 */
 133 #define SERIAL_PORT_DEFAULT_CONTROL_MASK        0
 134
 135
 136 //
 137 // (24000000/13)MHz input clock
 138 //
 139 #define SERIAL_PORT_INPUT_CLOCK 1843200
 140
 141 //
 142 // 115200 baud with rounding errors
 143 //
 144 #define SERIAL_PORT_MAX_BAUD_RATE           115400
 145 #define SERIAL_PORT_MIN_BAUD_RATE           50
 146
 147 #define SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH  16
 148 #define SERIAL_PORT_MIN_TIMEOUT             1         // 1 uS
 149 #define SERIAL_PORT_MAX_TIMEOUT             100000000 // 100 seconds
 150 //
 151 // UART Registers
 152 //
 153 #define SERIAL_REGISTER_THR 0 // WO   Transmit Holding Register
 154 #define SERIAL_REGISTER_RBR 0 // RO   Receive Buffer Register
 155 #define SERIAL_REGISTER_DLL 0 // R/W  Divisor Latch LSB
 156 #define SERIAL_REGISTER_DLM 1 // R/W  Divisor Latch MSB
 157 #define SERIAL_REGISTER_IER 1 // R/W  Interrupt Enable Register
 158 #define SERIAL_REGISTER_IIR 2 // RO   Interrupt Identification Register
 159 #define SERIAL_REGISTER_FCR 2 // WO   FIFO Cotrol Register
 160 #define SERIAL_REGISTER_LCR 3 // R/W  Line Control Register
 161 #define SERIAL_REGISTER_MCR 4 // R/W  Modem Control Register
 162 #define SERIAL_REGISTER_LSR 5 // R/W  Line Status Register
 163 #define SERIAL_REGISTER_MSR 6 // R/W  Modem Status Register
 164 #define SERIAL_REGISTER_SCR 7 // R/W  Scratch Pad Register
 165 #pragma pack(1)
 166 //
 167 //  Name:   SERIAL_PORT_IER_BITS
 168 //  Purpose:  Define each bit in Interrupt Enable Register
 169 //  Context:
 170 //  Fields:
 171 //     RAVIE  Bit0: Receiver Data Available Interrupt Enable
 172 //     THEIE  Bit1: Transmistter Holding Register Empty Interrupt Enable
 173 //     RIE      Bit2: Receiver Interrupt Enable
 174 //     MIE      Bit3: Modem Interrupt Enable
 175 //     Reserved Bit4-Bit7: Reserved
 176 //
 177 typedef struct {
 178   UINT8 RAVIE : 1;
 179   UINT8 THEIE : 1;
 180   UINT8 RIE : 1;
 181   UINT8 MIE : 1;
 182   UINT8 Reserved : 4;
 183 } SERIAL_PORT_IER_BITS;
 184
 185 //
 186 //  Name:   SERIAL_PORT_IER
 187 //  Purpose:
 188 //  Context:
 189 //  Fields:
 190 //      Bits    SERIAL_PORT_IER_BITS:  Bits of the IER
 191 //      Data    UINT8: the value of the IER
 192 //
 193 typedef union {
 194   SERIAL_PORT_IER_BITS  Bits;
 195   UINT8                 Data;
 196 } SERIAL_PORT_IER;
 197
 198 //
 199 //  Name:   SERIAL_PORT_IIR_BITS
 200 //  Purpose:  Define each bit in Interrupt Identification Register
 201 //  Context:
 202 //  Fields:
 203 //      IPS    Bit0: Interrupt Pending Status
 204 //      IIB    Bit1-Bit3: Interrupt ID Bits
 205 //      Reserved Bit4-Bit5: Reserved
 206 //      FIFOES   Bit6-Bit7: FIFO Mode Enable Status
 207 //
 208 typedef struct {
 209   UINT8 IPS : 1;
 210   UINT8 IIB : 3;
 211   UINT8 Reserved : 2;
 212   UINT8 FIFOES : 2;
 213 } SERIAL_PORT_IIR_BITS;
 214
 215 //
 216 //  Name:   SERIAL_PORT_IIR
 217 //  Purpose:
 218 //  Context:
 219 //  Fields:
 220 //      Bits    SERIAL_PORT_IIR_BITS:  Bits of the IIR
 221 //      Data    UINT8: the value of the IIR
 222 //
 223 typedef union {
 224   SERIAL_PORT_IIR_BITS  Bits;
 225   UINT8                 Data;
 226 } SERIAL_PORT_IIR;
 227
 228 //
 229 //  Name:   SERIAL_PORT_FCR_BITS
 230 //  Purpose:  Define each bit in FIFO Control Register
 231 //  Context:
 232 //  Fields:
 233 //      TRFIFOE    Bit0: Transmit and Receive FIFO Enable
 234 //      RESETRF    Bit1: Reset Reciever FIFO
 235 //      RESETTF    Bit2: Reset Transmistter FIFO
 236 //      DMS        Bit3: DMA Mode Select
 237 //      Reserved   Bit4-Bit5: Reserved
 238 //      RTB        Bit6-Bit7: Receive Trigger Bits
 239 //
 240 typedef struct {
 241   UINT8 TRFIFOE : 1;
 242   UINT8 RESETRF : 1;
 243   UINT8 RESETTF : 1;
 244   UINT8 DMS : 1;
 245   UINT8 Reserved : 2;
 246   UINT8 RTB : 2;
 247 } SERIAL_PORT_FCR_BITS;
 248
 249 //
 250 //  Name:   SERIAL_PORT_FCR
 251 //  Purpose:
 252 //  Context:
 253 //  Fields:
 254 //      Bits    SERIAL_PORT_FCR_BITS:  Bits of the FCR
 255 //      Data    UINT8: the value of the FCR
 256 //
 257 typedef union {
 258   SERIAL_PORT_FCR_BITS  Bits;
 259   UINT8                 Data;
 260 } SERIAL_PORT_FCR;
 261
 262 //
 263 //  Name:   SERIAL_PORT_LCR_BITS
 264 //  Purpose:  Define each bit in Line Control Register
 265 //  Context:
 266 //  Fields:
 267 //      SERIALDB  Bit0-Bit1: Number of Serial Data Bits
 268 //      STOPB   Bit2: Number of Stop Bits
 269 //      PAREN   Bit3: Parity Enable
 270 //      EVENPAR   Bit4: Even Parity Select
 271 //      STICPAR   Bit5: Sticky Parity
 272 //      BRCON   Bit6: Break Control
 273 //      DLAB    Bit7: Divisor Latch Access Bit
 274 //
 275 typedef struct {
 276   UINT8 SERIALDB : 2;
 277   UINT8 STOPB : 1;
 278   UINT8 PAREN : 1;
 279   UINT8 EVENPAR : 1;
 280   UINT8 STICPAR : 1;
 281   UINT8 BRCON : 1;
 282   UINT8 DLAB : 1;
 283 } SERIAL_PORT_LCR_BITS;
 284
 285 //
 286 //  Name:   SERIAL_PORT_LCR
 287 //  Purpose:
 288 //  Context:
 289 //  Fields:
 290 //      Bits    SERIAL_PORT_LCR_BITS:  Bits of the LCR
 291 //      Data    UINT8: the value of the LCR
 292 //
 293 typedef union {
 294   SERIAL_PORT_LCR_BITS  Bits;
 295   UINT8                 Data;
 296 } SERIAL_PORT_LCR;
 297
 298 //
 299 //  Name:   SERIAL_PORT_MCR_BITS
 300 //  Purpose:  Define each bit in Modem Control Register
 301 //  Context:
 302 //  Fields:
 303 //      DTRC     Bit0: Data Terminal Ready Control
 304 //      RTS      Bit1: Request To Send Control
 305 //      OUT1     Bit2: Output1
 306 //      OUT2     Bit3: Output2, used to disable interrupt
 307 //      LME;     Bit4: Loopback Mode Enable
 308 //      Reserved Bit5-Bit7: Reserved
 309 //
 310 typedef struct {
 311   UINT8 DTRC : 1;
 312   UINT8 RTS : 1;
 313   UINT8 OUT1 : 1;
 314   UINT8 OUT2 : 1;
 315   UINT8 LME : 1;
 316   UINT8 Reserved : 3;
 317 } SERIAL_PORT_MCR_BITS;
 318
 319 //
 320 //  Name:   SERIAL_PORT_MCR
 321 //  Purpose:
 322 //  Context:
 323 //  Fields:
 324 //      Bits    SERIAL_PORT_MCR_BITS:  Bits of the MCR
 325 //      Data    UINT8: the value of the MCR
 326 //
 327 typedef union {
 328   SERIAL_PORT_MCR_BITS  Bits;
 329   UINT8                 Data;
 330 } SERIAL_PORT_MCR;
 331
 332 //
 333 //  Name:   SERIAL_PORT_LSR_BITS
 334 //  Purpose:  Define each bit in Line Status Register
 335 //  Context:
 336 //  Fields:
 337 //      DR    Bit0: Receiver Data Ready Status
 338 //      OE    Bit1: Overrun Error Status
 339 //      PE    Bit2: Parity Error Status
 340 //      FE    Bit3: Framing Error Status
 341 //      BI    Bit4: Break Interrupt Status
 342 //      THRE  Bit5: Transmistter Holding Register Status
 343 //      TEMT  Bit6: Transmitter Empty Status
 344 //      FIFOE Bit7: FIFO Error Status
 345 //
 346 typedef struct {
 347   UINT8 DR : 1;
 348   UINT8 OE : 1;
 349   UINT8 PE : 1;
 350   UINT8 FE : 1;
 351   UINT8 BI : 1;
 352   UINT8 THRE : 1;
 353   UINT8 TEMT : 1;
 354   UINT8 FIFOE : 1;
 355 } SERIAL_PORT_LSR_BITS;
 356
 357 //
 358 //  Name:   SERIAL_PORT_LSR
 359 //  Purpose:
 360 //  Context:
 361 //  Fields:
 362 //      Bits    SERIAL_PORT_LSR_BITS:  Bits of the LSR
 363 //      Data    UINT8: the value of the LSR
 364 //
 365 typedef union {
 366   SERIAL_PORT_LSR_BITS  Bits;
 367   UINT8                 Data;
 368 } SERIAL_PORT_LSR;
 369
 370 //
 371 //  Name:   SERIAL_PORT_MSR_BITS
 372 //  Purpose:  Define each bit in Modem Status Register
 373 //  Context:
 374 //  Fields:
 375 //      DeltaCTS      Bit0: Delta Clear To Send Status
 376 //      DeltaDSR        Bit1: Delta Data Set Ready Status
 377 //      TrailingEdgeRI  Bit2: Trailing Edge of Ring Indicator Status
 378 //      DeltaDCD        Bit3: Delta Data Carrier Detect Status
 379 //      CTS             Bit4: Clear To Send Status
 380 //      DSR             Bit5: Data Set Ready Status
 381 //      RI              Bit6: Ring Indicator Status
 382 //      DCD             Bit7: Data Carrier Detect Status
 383 //
 384 typedef struct {
 385   UINT8 DeltaCTS : 1;
 386   UINT8 DeltaDSR : 1;
 387   UINT8 TrailingEdgeRI : 1;
 388   UINT8 DeltaDCD : 1;
 389   UINT8 CTS : 1;
 390   UINT8 DSR : 1;
 391   UINT8 RI : 1;
 392   UINT8 DCD : 1;
 393 } SERIAL_PORT_MSR_BITS;
 394
 395 //
 396 //  Name:   SERIAL_PORT_MSR
 397 //  Purpose:
 398 //  Context:
 399 //  Fields:
 400 //      Bits    SERIAL_PORT_MSR_BITS:  Bits of the MSR
 401 //      Data    UINT8: the value of the MSR
 402 //
 403 typedef union {
 404   SERIAL_PORT_MSR_BITS  Bits;
 405   UINT8                 Data;
 406 } SERIAL_PORT_MSR;
 407
 408 #pragma pack()
 409 //
 410 // Define serial register I/O macros
 411 //
 412 #define READ_RBR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_RBR)
 413 #define READ_DLL(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLL)
 414 #define READ_DLM(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLM)
 415 #define READ_IER(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IER)
 416 #define READ_IIR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IIR)
 417 #define READ_LCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LCR)
 418 #define READ_MCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MCR)
 419 #define READ_LSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LSR)
 420 #define READ_MSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MSR)
 421 #define READ_SCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_SCR)
 422
 423 #define WRITE_THR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_THR, D)
 424 #define WRITE_DLL(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLL, D)
 425 #define WRITE_DLM(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLM, D)
 426 #define WRITE_IER(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_IER, D)
 427 #define WRITE_FCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_FCR, D)
 428 #define WRITE_LCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LCR, D)
 429 #define WRITE_MCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MCR, D)
 430 #define WRITE_LSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LSR, D)
 431 #define WRITE_MSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MSR, D)
 432 #define WRITE_SCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_SCR, D)
 433
 434 //
 435 // Prototypes
 436 // Driver model protocol interface
 437 //
 438
 439 EFI_STATUS
 440 EFIAPI
 441 SerialControllerDriverSupported (
 442   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 443   IN EFI_HANDLE                     Controller,
 444   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 445   );
 446
 447 EFI_STATUS
 448 EFIAPI
 449 SerialControllerDriverStart (
 450   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 451   IN EFI_HANDLE                     Controller,
 452   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 453   );
 454
 455 EFI_STATUS
 456 EFIAPI
 457 SerialControllerDriverStop (
 458   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 459   IN  EFI_HANDLE                    Controller,
 460   IN  UINTN                         NumberOfChildren,
 461   IN  EFI_HANDLE                    *ChildHandleBuffer
 462   );
 463
 464 //
 465 // Serial I/O Protocol Interface
 466 //
 467 EFI_STATUS
 468 EFIAPI
 469 IsaSerialReset (
 470   IN EFI_SERIAL_IO_PROTOCOL         *This
 471   );
 472
 473 EFI_STATUS
 474 EFIAPI
 475 IsaSerialSetAttributes (
 476   IN EFI_SERIAL_IO_PROTOCOL         *This,
 477   IN UINT64                         BaudRate,
 478   IN UINT32                         ReceiveFifoDepth,
 479   IN UINT32                         Timeout,
 480   IN EFI_PARITY_TYPE                Parity,
 481   IN UINT8                          DataBits,
 482   IN EFI_STOP_BITS_TYPE             StopBits
 483   );
 484
 485 EFI_STATUS
 486 EFIAPI
 487 IsaSerialSetControl (
 488   IN EFI_SERIAL_IO_PROTOCOL         *This,
 489   IN UINT32                         Control
 490   );
 491
 492 EFI_STATUS
 493 EFIAPI
 494 IsaSerialGetControl (
 495   IN EFI_SERIAL_IO_PROTOCOL         *This,
 496   OUT UINT32                        *Control
 497   );
 498
 499 EFI_STATUS
 500 EFIAPI
 501 IsaSerialWrite (
 502   IN EFI_SERIAL_IO_PROTOCOL         *This,
 503   IN OUT UINTN                      *BufferSize,
 504   IN VOID                           *Buffer
 505   );
 506
 507 EFI_STATUS
 508 EFIAPI
 509 IsaSerialRead (
 510   IN EFI_SERIAL_IO_PROTOCOL         *This,
 511   IN OUT UINTN                      *BufferSize,
 512   OUT VOID                          *Buffer
 513   );
 514
 515 //
 516 // Internal Functions
 517 //
 518 BOOLEAN
 519 IsaSerialPortPresent (
 520   IN SERIAL_DEV                     *SerialDevice
 521   );
 522
 523 BOOLEAN
 524 IsaSerialFifoFull (
 525   IN SERIAL_DEV_FIFO                *Fifo
 526   );
 527
 528 BOOLEAN
 529 IsaSerialFifoEmpty (
 530   IN SERIAL_DEV_FIFO                *Fifo
 531   );
 532
 533 EFI_STATUS
 534 IsaSerialFifoAdd (
 535   IN SERIAL_DEV_FIFO                *Fifo,
 536   IN UINT8                          Data
 537   );
 538
 539 EFI_STATUS
 540 IsaSerialFifoRemove (
 541   IN  SERIAL_DEV_FIFO               *Fifo,
 542   OUT UINT8                         *Data
 543   );
 544
 545 EFI_STATUS
 546 IsaSerialReceiveTransmit (
 547   IN SERIAL_DEV                     *SerialDevice
 548   );
 549
 550 UINT8
 551 IsaSerialReadPort (
 552   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 553   IN UINT16                                 BaseAddress,
 554   IN UINT32                                 Offset
 555   );
 556
 557 VOID
 558 IsaSerialWritePort (
 559   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 560   IN UINT16                                 BaseAddress,
 561   IN UINT32                                 Offset,
 562   IN UINT8                                  Data
 563   );
 564
 565 #endif