IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/Serial.h

   1 /**@file
   2   Include for Serial Driver
   3
   4 Copyright (c) 2006 - 2007, Intel Corporation.<BR>
   5 All rights reserved. This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _SERIAL_H
  16 #define _SERIAL_H
  17
  18
  19 #include <PiDxe.h>
  20 #include <FrameworkPei.h>
  21
  22 #include <Protocol/IsaIo.h>
  23 #include <Protocol/SerialIo.h>
  24 #include <Protocol/DevicePath.h>
  25
  26 #include <Library/DebugLib.h>
  27 #include <Library/UefiDriverEntryPoint.h>
  28 #include <Library/BaseLib.h>
  29 #include <Library/UefiLib.h>
  30 #include <Library/DevicePathLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/UefiBootServicesTableLib.h>
  34 #include <Library/ReportStatusCodeLib.h>
  35 #include <Library/PcdLib.h>
  36 //
  37 // Driver Binding Externs
  38 //
  39 extern EFI_DRIVER_BINDING_PROTOCOL  gSerialControllerDriver;
  40 extern EFI_COMPONENT_NAME_PROTOCOL  gIsaSerialComponentName;
  41 extern EFI_COMPONENT_NAME2_PROTOCOL gIsaSerialComponentName2;
  42
  43 //
  44 // Internal Data Structures
  45 //
  46 #define SERIAL_DEV_SIGNATURE    SIGNATURE_32 ('s', 'e', 'r', 'd')
  47 #define SERIAL_MAX_BUFFER_SIZE  16
  48 #define TIMEOUT_STALL_INTERVAL  10
  49
  50 //
  51 //  Name:   SERIAL_DEV_FIFO
  52 //  Purpose:  To define Receive FIFO and Transmit FIFO
  53 //  Context:  Used by serial data transmit and receive
  54 //  Fields:
  55 //      First UINT32: The index of the first data in array Data[]
  56 //      Last  UINT32: The index, which you can put a new data into array Data[]
  57 //      Surplus UINT32: Identify how many data you can put into array Data[]
  58 //      Data[]  UINT8 : An array, which used to store data
  59 //
  60 typedef struct {
  61   UINT32  First;
  62   UINT32  Last;
  63   UINT32  Surplus;
  64   UINT8   Data[SERIAL_MAX_BUFFER_SIZE];
  65 } SERIAL_DEV_FIFO;
  66
  67 typedef enum {
  68   UART8250  = 0,
  69   UART16450 = 1,
  70   UART16550 = 2,
  71   UART16550A= 3
  72 } EFI_UART_TYPE;
  73
  74 //
  75 //  Name:   SERIAL_DEV
  76 //  Purpose:  To provide device specific information
  77 //  Context:
  78 //  Fields:
  79 //      Signature UINTN: The identity of the serial device
  80 //      SerialIo  SERIAL_IO_PROTOCOL: Serial I/O protocol interface
  81 //      SerialMode  SERIAL_IO_MODE:
  82 //      DevicePath  EFI_DEVICE_PATH_PROTOCOL *: Device path of the serial device
  83 //      Handle      EFI_HANDLE: The handle instance attached to serial device
  84 //      BaseAddress UINT16: The base address of specific serial device
  85 //      Receive     SERIAL_DEV_FIFO: The FIFO used to store data,
  86 //                  which is received by UART
  87 //      Transmit    SERIAL_DEV_FIFO: The FIFO used to store data,
  88 //                  which you want to transmit by UART
  89 //      SoftwareLoopbackEnable BOOLEAN:
  90 //      Type    EFI_UART_TYPE: Specify the UART type of certain serial device
  91 //
  92 typedef struct {
  93   UINTN                                  Signature;
  94
  95   EFI_HANDLE                             Handle;
  96   EFI_SERIAL_IO_PROTOCOL                 SerialIo;
  97   EFI_SERIAL_IO_MODE                     SerialMode;
  98   EFI_DEVICE_PATH_PROTOCOL               *DevicePath;
  99
 100   EFI_DEVICE_PATH_PROTOCOL               *ParentDevicePath;
 101   UART_DEVICE_PATH                       UartDevicePath;
 102   EFI_ISA_IO_PROTOCOL                    *IsaIo;
 103
 104   UINT16                                 BaseAddress;
 105   SERIAL_DEV_FIFO                        Receive;
 106   SERIAL_DEV_FIFO                        Transmit;
 107   BOOLEAN                                SoftwareLoopbackEnable;
 108   BOOLEAN                                HardwareFlowControl;
 109   EFI_UART_TYPE                          Type;
 110   EFI_UNICODE_STRING_TABLE               *ControllerNameTable;
 111 } SERIAL_DEV;
 112
 113 #include "ComponentName.h"
 114
 115 #define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
 116
 117 //
 118 // Globale Variables
 119 //
 120 extern EFI_DRIVER_BINDING_PROTOCOL   gSerialControllerDriver;
 121
 122 //
 123 // Serial Driver Defaults
 124 //
 125 #define SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH  1
 126 #define SERIAL_PORT_DEFAULT_TIMEOUT             1000000
 127
 128 /*
 129 #define SERIAL_PORT_DEFAULT_BAUD_RATE           115200
 130 #define SERIAL_PORT_DEFAULT_PARITY              NoParity
 131 #define SERIAL_PORT_DEFAULT_DATA_BITS           8
 132 #define SERIAL_PORT_DEFAULT_STOP_BITS           1
 133 */
 134 #define SERIAL_PORT_DEFAULT_CONTROL_MASK        0
 135
 136
 137 //
 138 // (24000000/13)MHz input clock
 139 //
 140 #define SERIAL_PORT_INPUT_CLOCK 1843200
 141
 142 //
 143 // 115200 baud with rounding errors
 144 //
 145 #define SERIAL_PORT_MAX_BAUD_RATE           115400
 146 #define SERIAL_PORT_MIN_BAUD_RATE           50
 147
 148 #define SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH  16
 149 #define SERIAL_PORT_MIN_TIMEOUT             1         // 1 uS
 150 #define SERIAL_PORT_MAX_TIMEOUT             100000000 // 100 seconds
 151 //
 152 // UART Registers
 153 //
 154 #define SERIAL_REGISTER_THR 0 // WO   Transmit Holding Register
 155 #define SERIAL_REGISTER_RBR 0 // RO   Receive Buffer Register
 156 #define SERIAL_REGISTER_DLL 0 // R/W  Divisor Latch LSB
 157 #define SERIAL_REGISTER_DLM 1 // R/W  Divisor Latch MSB
 158 #define SERIAL_REGISTER_IER 1 // R/W  Interrupt Enable Register
 159 #define SERIAL_REGISTER_IIR 2 // RO   Interrupt Identification Register
 160 #define SERIAL_REGISTER_FCR 2 // WO   FIFO Cotrol Register
 161 #define SERIAL_REGISTER_LCR 3 // R/W  Line Control Register
 162 #define SERIAL_REGISTER_MCR 4 // R/W  Modem Control Register
 163 #define SERIAL_REGISTER_LSR 5 // R/W  Line Status Register
 164 #define SERIAL_REGISTER_MSR 6 // R/W  Modem Status Register
 165 #define SERIAL_REGISTER_SCR 7 // R/W  Scratch Pad Register
 166 #pragma pack(1)
 167 //
 168 //  Name:   SERIAL_PORT_IER_BITS
 169 //  Purpose:  Define each bit in Interrupt Enable Register
 170 //  Context:
 171 //  Fields:
 172 //     RAVIE  Bit0: Receiver Data Available Interrupt Enable
 173 //     THEIE  Bit1: Transmistter Holding Register Empty Interrupt Enable
 174 //     RIE      Bit2: Receiver Interrupt Enable
 175 //     MIE      Bit3: Modem Interrupt Enable
 176 //     Reserved Bit4-Bit7: Reserved
 177 //
 178 typedef struct {
 179   UINT8 RAVIE : 1;
 180   UINT8 THEIE : 1;
 181   UINT8 RIE : 1;
 182   UINT8 MIE : 1;
 183   UINT8 Reserved : 4;
 184 } SERIAL_PORT_IER_BITS;
 185
 186 //
 187 //  Name:   SERIAL_PORT_IER
 188 //  Purpose:
 189 //  Context:
 190 //  Fields:
 191 //      Bits    SERIAL_PORT_IER_BITS:  Bits of the IER
 192 //      Data    UINT8: the value of the IER
 193 //
 194 typedef union {
 195   SERIAL_PORT_IER_BITS  Bits;
 196   UINT8                 Data;
 197 } SERIAL_PORT_IER;
 198
 199 //
 200 //  Name:   SERIAL_PORT_IIR_BITS
 201 //  Purpose:  Define each bit in Interrupt Identification Register
 202 //  Context:
 203 //  Fields:
 204 //      IPS    Bit0: Interrupt Pending Status
 205 //      IIB    Bit1-Bit3: Interrupt ID Bits
 206 //      Reserved Bit4-Bit5: Reserved
 207 //      FIFOES   Bit6-Bit7: FIFO Mode Enable Status
 208 //
 209 typedef struct {
 210   UINT8 IPS : 1;
 211   UINT8 IIB : 3;
 212   UINT8 Reserved : 2;
 213   UINT8 FIFOES : 2;
 214 } SERIAL_PORT_IIR_BITS;
 215
 216 //
 217 //  Name:   SERIAL_PORT_IIR
 218 //  Purpose:
 219 //  Context:
 220 //  Fields:
 221 //      Bits    SERIAL_PORT_IIR_BITS:  Bits of the IIR
 222 //      Data    UINT8: the value of the IIR
 223 //
 224 typedef union {
 225   SERIAL_PORT_IIR_BITS  Bits;
 226   UINT8                 Data;
 227 } SERIAL_PORT_IIR;
 228
 229 //
 230 //  Name:   SERIAL_PORT_FCR_BITS
 231 //  Purpose:  Define each bit in FIFO Control Register
 232 //  Context:
 233 //  Fields:
 234 //      TRFIFOE    Bit0: Transmit and Receive FIFO Enable
 235 //      RESETRF    Bit1: Reset Reciever FIFO
 236 //      RESETTF    Bit2: Reset Transmistter FIFO
 237 //      DMS        Bit3: DMA Mode Select
 238 //      Reserved   Bit4-Bit5: Reserved
 239 //      RTB        Bit6-Bit7: Receive Trigger Bits
 240 //
 241 typedef struct {
 242   UINT8 TRFIFOE : 1;
 243   UINT8 RESETRF : 1;
 244   UINT8 RESETTF : 1;
 245   UINT8 DMS : 1;
 246   UINT8 Reserved : 2;
 247   UINT8 RTB : 2;
 248 } SERIAL_PORT_FCR_BITS;
 249
 250 //
 251 //  Name:   SERIAL_PORT_FCR
 252 //  Purpose:
 253 //  Context:
 254 //  Fields:
 255 //      Bits    SERIAL_PORT_FCR_BITS:  Bits of the FCR
 256 //      Data    UINT8: the value of the FCR
 257 //
 258 typedef union {
 259   SERIAL_PORT_FCR_BITS  Bits;
 260   UINT8                 Data;
 261 } SERIAL_PORT_FCR;
 262
 263 //
 264 //  Name:   SERIAL_PORT_LCR_BITS
 265 //  Purpose:  Define each bit in Line Control Register
 266 //  Context:
 267 //  Fields:
 268 //      SERIALDB  Bit0-Bit1: Number of Serial Data Bits
 269 //      STOPB   Bit2: Number of Stop Bits
 270 //      PAREN   Bit3: Parity Enable
 271 //      EVENPAR   Bit4: Even Parity Select
 272 //      STICPAR   Bit5: Sticky Parity
 273 //      BRCON   Bit6: Break Control
 274 //      DLAB    Bit7: Divisor Latch Access Bit
 275 //
 276 typedef struct {
 277   UINT8 SERIALDB : 2;
 278   UINT8 STOPB : 1;
 279   UINT8 PAREN : 1;
 280   UINT8 EVENPAR : 1;
 281   UINT8 STICPAR : 1;
 282   UINT8 BRCON : 1;
 283   UINT8 DLAB : 1;
 284 } SERIAL_PORT_LCR_BITS;
 285
 286 //
 287 //  Name:   SERIAL_PORT_LCR
 288 //  Purpose:
 289 //  Context:
 290 //  Fields:
 291 //      Bits    SERIAL_PORT_LCR_BITS:  Bits of the LCR
 292 //      Data    UINT8: the value of the LCR
 293 //
 294 typedef union {
 295   SERIAL_PORT_LCR_BITS  Bits;
 296   UINT8                 Data;
 297 } SERIAL_PORT_LCR;
 298
 299 //
 300 //  Name:   SERIAL_PORT_MCR_BITS
 301 //  Purpose:  Define each bit in Modem Control Register
 302 //  Context:
 303 //  Fields:
 304 //      DTRC     Bit0: Data Terminal Ready Control
 305 //      RTS      Bit1: Request To Send Control
 306 //      OUT1     Bit2: Output1
 307 //      OUT2     Bit3: Output2, used to disable interrupt
 308 //      LME;     Bit4: Loopback Mode Enable
 309 //      Reserved Bit5-Bit7: Reserved
 310 //
 311 typedef struct {
 312   UINT8 DTRC : 1;
 313   UINT8 RTS : 1;
 314   UINT8 OUT1 : 1;
 315   UINT8 OUT2 : 1;
 316   UINT8 LME : 1;
 317   UINT8 Reserved : 3;
 318 } SERIAL_PORT_MCR_BITS;
 319
 320 //
 321 //  Name:   SERIAL_PORT_MCR
 322 //  Purpose:
 323 //  Context:
 324 //  Fields:
 325 //      Bits    SERIAL_PORT_MCR_BITS:  Bits of the MCR
 326 //      Data    UINT8: the value of the MCR
 327 //
 328 typedef union {
 329   SERIAL_PORT_MCR_BITS  Bits;
 330   UINT8                 Data;
 331 } SERIAL_PORT_MCR;
 332
 333 //
 334 //  Name:   SERIAL_PORT_LSR_BITS
 335 //  Purpose:  Define each bit in Line Status Register
 336 //  Context:
 337 //  Fields:
 338 //      DR    Bit0: Receiver Data Ready Status
 339 //      OE    Bit1: Overrun Error Status
 340 //      PE    Bit2: Parity Error Status
 341 //      FE    Bit3: Framing Error Status
 342 //      BI    Bit4: Break Interrupt Status
 343 //      THRE  Bit5: Transmistter Holding Register Status
 344 //      TEMT  Bit6: Transmitter Empty Status
 345 //      FIFOE Bit7: FIFO Error Status
 346 //
 347 typedef struct {
 348   UINT8 DR : 1;
 349   UINT8 OE : 1;
 350   UINT8 PE : 1;
 351   UINT8 FE : 1;
 352   UINT8 BI : 1;
 353   UINT8 THRE : 1;
 354   UINT8 TEMT : 1;
 355   UINT8 FIFOE : 1;
 356 } SERIAL_PORT_LSR_BITS;
 357
 358 //
 359 //  Name:   SERIAL_PORT_LSR
 360 //  Purpose:
 361 //  Context:
 362 //  Fields:
 363 //      Bits    SERIAL_PORT_LSR_BITS:  Bits of the LSR
 364 //      Data    UINT8: the value of the LSR
 365 //
 366 typedef union {
 367   SERIAL_PORT_LSR_BITS  Bits;
 368   UINT8                 Data;
 369 } SERIAL_PORT_LSR;
 370
 371 //
 372 //  Name:   SERIAL_PORT_MSR_BITS
 373 //  Purpose:  Define each bit in Modem Status Register
 374 //  Context:
 375 //  Fields:
 376 //      DeltaCTS      Bit0: Delta Clear To Send Status
 377 //      DeltaDSR        Bit1: Delta Data Set Ready Status
 378 //      TrailingEdgeRI  Bit2: Trailing Edge of Ring Indicator Status
 379 //      DeltaDCD        Bit3: Delta Data Carrier Detect Status
 380 //      CTS             Bit4: Clear To Send Status
 381 //      DSR             Bit5: Data Set Ready Status
 382 //      RI              Bit6: Ring Indicator Status
 383 //      DCD             Bit7: Data Carrier Detect Status
 384 //
 385 typedef struct {
 386   UINT8 DeltaCTS : 1;
 387   UINT8 DeltaDSR : 1;
 388   UINT8 TrailingEdgeRI : 1;
 389   UINT8 DeltaDCD : 1;
 390   UINT8 CTS : 1;
 391   UINT8 DSR : 1;
 392   UINT8 RI : 1;
 393   UINT8 DCD : 1;
 394 } SERIAL_PORT_MSR_BITS;
 395
 396 //
 397 //  Name:   SERIAL_PORT_MSR
 398 //  Purpose:
 399 //  Context:
 400 //  Fields:
 401 //      Bits    SERIAL_PORT_MSR_BITS:  Bits of the MSR
 402 //      Data    UINT8: the value of the MSR
 403 //
 404 typedef union {
 405   SERIAL_PORT_MSR_BITS  Bits;
 406   UINT8                 Data;
 407 } SERIAL_PORT_MSR;
 408
 409 #pragma pack()
 410 //
 411 // Define serial register I/O macros
 412 //
 413 #define READ_RBR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_RBR)
 414 #define READ_DLL(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLL)
 415 #define READ_DLM(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLM)
 416 #define READ_IER(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IER)
 417 #define READ_IIR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IIR)
 418 #define READ_LCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LCR)
 419 #define READ_MCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MCR)
 420 #define READ_LSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LSR)
 421 #define READ_MSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MSR)
 422 #define READ_SCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_SCR)
 423
 424 #define WRITE_THR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_THR, D)
 425 #define WRITE_DLL(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLL, D)
 426 #define WRITE_DLM(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLM, D)
 427 #define WRITE_IER(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_IER, D)
 428 #define WRITE_FCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_FCR, D)
 429 #define WRITE_LCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LCR, D)
 430 #define WRITE_MCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MCR, D)
 431 #define WRITE_LSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LSR, D)
 432 #define WRITE_MSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MSR, D)
 433 #define WRITE_SCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_SCR, D)
 434
 435 //
 436 // Prototypes
 437 // Driver model protocol interface
 438 //
 439
 440 EFI_STATUS
 441 EFIAPI
 442 SerialControllerDriverSupported (
 443   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 444   IN EFI_HANDLE                     Controller,
 445   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 446   );
 447
 448 EFI_STATUS
 449 EFIAPI
 450 SerialControllerDriverStart (
 451   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 452   IN EFI_HANDLE                     Controller,
 453   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 454   );
 455
 456 EFI_STATUS
 457 EFIAPI
 458 SerialControllerDriverStop (
 459   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 460   IN  EFI_HANDLE                    Controller,
 461   IN  UINTN                         NumberOfChildren,
 462   IN  EFI_HANDLE                    *ChildHandleBuffer
 463   );
 464
 465 //
 466 // Serial I/O Protocol Interface
 467 //
 468 EFI_STATUS
 469 EFIAPI
 470 IsaSerialReset (
 471   IN EFI_SERIAL_IO_PROTOCOL         *This
 472   );
 473
 474 EFI_STATUS
 475 EFIAPI
 476 IsaSerialSetAttributes (
 477   IN EFI_SERIAL_IO_PROTOCOL         *This,
 478   IN UINT64                         BaudRate,
 479   IN UINT32                         ReceiveFifoDepth,
 480   IN UINT32                         Timeout,
 481   IN EFI_PARITY_TYPE                Parity,
 482   IN UINT8                          DataBits,
 483   IN EFI_STOP_BITS_TYPE             StopBits
 484   );
 485
 486 EFI_STATUS
 487 EFIAPI
 488 IsaSerialSetControl (
 489   IN EFI_SERIAL_IO_PROTOCOL         *This,
 490   IN UINT32                         Control
 491   );
 492
 493 EFI_STATUS
 494 EFIAPI
 495 IsaSerialGetControl (
 496   IN EFI_SERIAL_IO_PROTOCOL         *This,
 497   OUT UINT32                        *Control
 498   );
 499
 500 EFI_STATUS
 501 EFIAPI
 502 IsaSerialWrite (
 503   IN EFI_SERIAL_IO_PROTOCOL         *This,
 504   IN OUT UINTN                      *BufferSize,
 505   IN VOID                           *Buffer
 506   );
 507
 508 EFI_STATUS
 509 EFIAPI
 510 IsaSerialRead (
 511   IN EFI_SERIAL_IO_PROTOCOL         *This,
 512   IN OUT UINTN                      *BufferSize,
 513   OUT VOID                          *Buffer
 514   );
 515
 516 //
 517 // Internal Functions
 518 //
 519 BOOLEAN
 520 IsaSerialPortPresent (
 521   IN SERIAL_DEV                     *SerialDevice
 522   );
 523
 524 BOOLEAN
 525 IsaSerialFifoFull (
 526   IN SERIAL_DEV_FIFO                *Fifo
 527   );
 528
 529 BOOLEAN
 530 IsaSerialFifoEmpty (
 531   IN SERIAL_DEV_FIFO                *Fifo
 532   );
 533
 534 EFI_STATUS
 535 IsaSerialFifoAdd (
 536   IN SERIAL_DEV_FIFO                *Fifo,
 537   IN UINT8                          Data
 538   );
 539
 540 EFI_STATUS
 541 IsaSerialFifoRemove (
 542   IN  SERIAL_DEV_FIFO               *Fifo,
 543   OUT UINT8                         *Data
 544   );
 545
 546 EFI_STATUS
 547 IsaSerialReceiveTransmit (
 548   IN SERIAL_DEV                     *SerialDevice
 549   );
 550
 551 UINT8
 552 IsaSerialReadPort (
 553   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 554   IN UINT16                                 BaseAddress,
 555   IN UINT32                                 Offset
 556   );
 557
 558 VOID
 559 IsaSerialWritePort (
 560   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 561   IN UINT16                                 BaseAddress,
 562   IN UINT32                                 Offset,
 563   IN UINT8                                  Data
 564   );
 565
 566 #endif