IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/Serial.h

   1 /**@file
   2   Include for Serial Driver
   3
   4 Copyright (c) 2006 - 2007, Intel Corporation.<BR>
   5 All rights reserved. This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef _SERIAL_H
  16 #define _SERIAL_H
  17
  18
  19 #include <PiDxe.h>
  20 #include <FrameworkPei.h>
  21
  22 #include <Protocol/IsaIo.h>
  23 #include <Protocol/SerialIo.h>
  24 #include <Protocol/DevicePath.h>
  25
  26 #include <Library/DebugLib.h>
  27 #include <Library/UefiDriverEntryPoint.h>
  28 #include <Library/BaseLib.h>
  29 #include <Library/UefiLib.h>
  30 #include <Library/DevicePathLib.h>
  31 #include <Library/BaseMemoryLib.h>
  32 #include <Library/MemoryAllocationLib.h>
  33 #include <Library/UefiBootServicesTableLib.h>
  34 #include <Library/ReportStatusCodeLib.h>
  35 #include <Library/PcdLib.h>
  36 //
  37 // Driver Binding Externs
  38 //
  39 extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
  40 extern EFI_COMPONENT_NAME_PROTOCOL gIsaSerialComponentName;
  41
  42 //
  43 // Internal Data Structures
  44 //
  45 #define SERIAL_DEV_SIGNATURE    EFI_SIGNATURE_32 ('s', 'e', 'r', 'd')
  46 #define SERIAL_MAX_BUFFER_SIZE  16
  47 #define TIMEOUT_STALL_INTERVAL  10
  48
  49 //
  50 //  Name:   SERIAL_DEV_FIFO
  51 //  Purpose:  To define Receive FIFO and Transmit FIFO
  52 //  Context:  Used by serial data transmit and receive
  53 //  Fields:
  54 //      First UINT32: The index of the first data in array Data[]
  55 //      Last  UINT32: The index, which you can put a new data into array Data[]
  56 //      Surplus UINT32: Identify how many data you can put into array Data[]
  57 //      Data[]  UINT8 : An array, which used to store data
  58 //
  59 typedef struct {
  60   UINT32  First;
  61   UINT32  Last;
  62   UINT32  Surplus;
  63   UINT8   Data[SERIAL_MAX_BUFFER_SIZE];
  64 } SERIAL_DEV_FIFO;
  65
  66 typedef enum {
  67   UART8250  = 0,
  68   UART16450 = 1,
  69   UART16550 = 2,
  70   UART16550A= 3
  71 } EFI_UART_TYPE;
  72
  73 //
  74 //  Name:   SERIAL_DEV
  75 //  Purpose:  To provide device specific information
  76 //  Context:
  77 //  Fields:
  78 //      Signature UINTN: The identity of the serial device
  79 //      SerialIo  SERIAL_IO_PROTOCOL: Serial I/O protocol interface
  80 //      SerialMode  SERIAL_IO_MODE:
  81 //      DevicePath  EFI_DEVICE_PATH_PROTOCOL *: Device path of the serial device
  82 //      Handle      EFI_HANDLE: The handle instance attached to serial device
  83 //      BaseAddress UINT16: The base address of specific serial device
  84 //      Receive     SERIAL_DEV_FIFO: The FIFO used to store data,
  85 //                  which is received by UART
  86 //      Transmit    SERIAL_DEV_FIFO: The FIFO used to store data,
  87 //                  which you want to transmit by UART
  88 //      SoftwareLoopbackEnable BOOLEAN:
  89 //      Type    EFI_UART_TYPE: Specify the UART type of certain serial device
  90 //
  91 typedef struct {
  92   UINTN                                  Signature;
  93
  94   EFI_HANDLE                             Handle;
  95   EFI_SERIAL_IO_PROTOCOL                 SerialIo;
  96   EFI_SERIAL_IO_MODE                     SerialMode;
  97   EFI_DEVICE_PATH_PROTOCOL               *DevicePath;
  98
  99   EFI_DEVICE_PATH_PROTOCOL               *ParentDevicePath;
 100   UART_DEVICE_PATH                       UartDevicePath;
 101   EFI_ISA_IO_PROTOCOL                    *IsaIo;
 102
 103   UINT16                                 BaseAddress;
 104   SERIAL_DEV_FIFO                        Receive;
 105   SERIAL_DEV_FIFO                        Transmit;
 106   BOOLEAN                                SoftwareLoopbackEnable;
 107   BOOLEAN                                HardwareFlowControl;
 108   EFI_UART_TYPE                          Type;
 109   EFI_UNICODE_STRING_TABLE               *ControllerNameTable;
 110 } SERIAL_DEV;
 111
 112 #include "ComponentName.h"
 113
 114 #define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
 115
 116 //
 117 // Globale Variables
 118 //
 119 extern EFI_DRIVER_BINDING_PROTOCOL  gSerialControllerDriver;
 120
 121 //
 122 // Serial Driver Defaults
 123 //
 124 #define SERIAL_PORT_DEFAULT_BAUD_RATE           115200
 125 #define SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH  1
 126 #define SERIAL_PORT_DEFAULT_TIMEOUT             1000000
 127 #define SERIAL_PORT_DEFAULT_PARITY              NoParity
 128 #define SERIAL_PORT_DEFAULT_DATA_BITS           8
 129 #define SERIAL_PORT_DEFAULT_STOP_BITS           1
 130 #define SERIAL_PORT_DEFAULT_CONTROL_MASK        0
 131
 132 //
 133 // (24000000/13)MHz input clock
 134 //
 135 #define SERIAL_PORT_INPUT_CLOCK 1843200
 136
 137 //
 138 // 115200 baud with rounding errors
 139 //
 140 #define SERIAL_PORT_MAX_BAUD_RATE           115400
 141 #define SERIAL_PORT_MIN_BAUD_RATE           50
 142
 143 #define SERIAL_PORT_MAX_RECEIVE_FIFO_DEPTH  16
 144 #define SERIAL_PORT_MIN_TIMEOUT             1         // 1 uS
 145 #define SERIAL_PORT_MAX_TIMEOUT             100000000 // 100 seconds
 146 //
 147 // UART Registers
 148 //
 149 #define SERIAL_REGISTER_THR 0 // WO   Transmit Holding Register
 150 #define SERIAL_REGISTER_RBR 0 // RO   Receive Buffer Register
 151 #define SERIAL_REGISTER_DLL 0 // R/W  Divisor Latch LSB
 152 #define SERIAL_REGISTER_DLM 1 // R/W  Divisor Latch MSB
 153 #define SERIAL_REGISTER_IER 1 // R/W  Interrupt Enable Register
 154 #define SERIAL_REGISTER_IIR 2 // RO   Interrupt Identification Register
 155 #define SERIAL_REGISTER_FCR 2 // WO   FIFO Cotrol Register
 156 #define SERIAL_REGISTER_LCR 3 // R/W  Line Control Register
 157 #define SERIAL_REGISTER_MCR 4 // R/W  Modem Control Register
 158 #define SERIAL_REGISTER_LSR 5 // R/W  Line Status Register
 159 #define SERIAL_REGISTER_MSR 6 // R/W  Modem Status Register
 160 #define SERIAL_REGISTER_SCR 7 // R/W  Scratch Pad Register
 161 #pragma pack(1)
 162 //
 163 //  Name:   SERIAL_PORT_IER_BITS
 164 //  Purpose:  Define each bit in Interrupt Enable Register
 165 //  Context:
 166 //  Fields:
 167 //     RAVIE  Bit0: Receiver Data Available Interrupt Enable
 168 //     THEIE  Bit1: Transmistter Holding Register Empty Interrupt Enable
 169 //     RIE      Bit2: Receiver Interrupt Enable
 170 //     MIE      Bit3: Modem Interrupt Enable
 171 //     Reserved Bit4-Bit7: Reserved
 172 //
 173 typedef struct {
 174   UINT8 RAVIE : 1;
 175   UINT8 THEIE : 1;
 176   UINT8 RIE : 1;
 177   UINT8 MIE : 1;
 178   UINT8 Reserved : 4;
 179 } SERIAL_PORT_IER_BITS;
 180
 181 //
 182 //  Name:   SERIAL_PORT_IER
 183 //  Purpose:
 184 //  Context:
 185 //  Fields:
 186 //      Bits    SERIAL_PORT_IER_BITS:  Bits of the IER
 187 //      Data    UINT8: the value of the IER
 188 //
 189 typedef union {
 190   SERIAL_PORT_IER_BITS  Bits;
 191   UINT8                 Data;
 192 } SERIAL_PORT_IER;
 193
 194 //
 195 //  Name:   SERIAL_PORT_IIR_BITS
 196 //  Purpose:  Define each bit in Interrupt Identification Register
 197 //  Context:
 198 //  Fields:
 199 //      IPS    Bit0: Interrupt Pending Status
 200 //      IIB    Bit1-Bit3: Interrupt ID Bits
 201 //      Reserved Bit4-Bit5: Reserved
 202 //      FIFOES   Bit6-Bit7: FIFO Mode Enable Status
 203 //
 204 typedef struct {
 205   UINT8 IPS : 1;
 206   UINT8 IIB : 3;
 207   UINT8 Reserved : 2;
 208   UINT8 FIFOES : 2;
 209 } SERIAL_PORT_IIR_BITS;
 210
 211 //
 212 //  Name:   SERIAL_PORT_IIR
 213 //  Purpose:
 214 //  Context:
 215 //  Fields:
 216 //      Bits    SERIAL_PORT_IIR_BITS:  Bits of the IIR
 217 //      Data    UINT8: the value of the IIR
 218 //
 219 typedef union {
 220   SERIAL_PORT_IIR_BITS  Bits;
 221   UINT8                 Data;
 222 } SERIAL_PORT_IIR;
 223
 224 //
 225 //  Name:   SERIAL_PORT_FCR_BITS
 226 //  Purpose:  Define each bit in FIFO Control Register
 227 //  Context:
 228 //  Fields:
 229 //      TRFIFOE    Bit0: Transmit and Receive FIFO Enable
 230 //      RESETRF    Bit1: Reset Reciever FIFO
 231 //      RESETTF    Bit2: Reset Transmistter FIFO
 232 //      DMS        Bit3: DMA Mode Select
 233 //      Reserved   Bit4-Bit5: Reserved
 234 //      RTB        Bit6-Bit7: Receive Trigger Bits
 235 //
 236 typedef struct {
 237   UINT8 TRFIFOE : 1;
 238   UINT8 RESETRF : 1;
 239   UINT8 RESETTF : 1;
 240   UINT8 DMS : 1;
 241   UINT8 Reserved : 2;
 242   UINT8 RTB : 2;
 243 } SERIAL_PORT_FCR_BITS;
 244
 245 //
 246 //  Name:   SERIAL_PORT_FCR
 247 //  Purpose:
 248 //  Context:
 249 //  Fields:
 250 //      Bits    SERIAL_PORT_FCR_BITS:  Bits of the FCR
 251 //      Data    UINT8: the value of the FCR
 252 //
 253 typedef union {
 254   SERIAL_PORT_FCR_BITS  Bits;
 255   UINT8                 Data;
 256 } SERIAL_PORT_FCR;
 257
 258 //
 259 //  Name:   SERIAL_PORT_LCR_BITS
 260 //  Purpose:  Define each bit in Line Control Register
 261 //  Context:
 262 //  Fields:
 263 //      SERIALDB  Bit0-Bit1: Number of Serial Data Bits
 264 //      STOPB   Bit2: Number of Stop Bits
 265 //      PAREN   Bit3: Parity Enable
 266 //      EVENPAR   Bit4: Even Parity Select
 267 //      STICPAR   Bit5: Sticky Parity
 268 //      BRCON   Bit6: Break Control
 269 //      DLAB    Bit7: Divisor Latch Access Bit
 270 //
 271 typedef struct {
 272   UINT8 SERIALDB : 2;
 273   UINT8 STOPB : 1;
 274   UINT8 PAREN : 1;
 275   UINT8 EVENPAR : 1;
 276   UINT8 STICPAR : 1;
 277   UINT8 BRCON : 1;
 278   UINT8 DLAB : 1;
 279 } SERIAL_PORT_LCR_BITS;
 280
 281 //
 282 //  Name:   SERIAL_PORT_LCR
 283 //  Purpose:
 284 //  Context:
 285 //  Fields:
 286 //      Bits    SERIAL_PORT_LCR_BITS:  Bits of the LCR
 287 //      Data    UINT8: the value of the LCR
 288 //
 289 typedef union {
 290   SERIAL_PORT_LCR_BITS  Bits;
 291   UINT8                 Data;
 292 } SERIAL_PORT_LCR;
 293
 294 //
 295 //  Name:   SERIAL_PORT_MCR_BITS
 296 //  Purpose:  Define each bit in Modem Control Register
 297 //  Context:
 298 //  Fields:
 299 //      DTRC     Bit0: Data Terminal Ready Control
 300 //      RTS      Bit1: Request To Send Control
 301 //      OUT1     Bit2: Output1
 302 //      OUT2     Bit3: Output2, used to disable interrupt
 303 //      LME;     Bit4: Loopback Mode Enable
 304 //      Reserved Bit5-Bit7: Reserved
 305 //
 306 typedef struct {
 307   UINT8 DTRC : 1;
 308   UINT8 RTS : 1;
 309   UINT8 OUT1 : 1;
 310   UINT8 OUT2 : 1;
 311   UINT8 LME : 1;
 312   UINT8 Reserved : 3;
 313 } SERIAL_PORT_MCR_BITS;
 314
 315 //
 316 //  Name:   SERIAL_PORT_MCR
 317 //  Purpose:
 318 //  Context:
 319 //  Fields:
 320 //      Bits    SERIAL_PORT_MCR_BITS:  Bits of the MCR
 321 //      Data    UINT8: the value of the MCR
 322 //
 323 typedef union {
 324   SERIAL_PORT_MCR_BITS  Bits;
 325   UINT8                 Data;
 326 } SERIAL_PORT_MCR;
 327
 328 //
 329 //  Name:   SERIAL_PORT_LSR_BITS
 330 //  Purpose:  Define each bit in Line Status Register
 331 //  Context:
 332 //  Fields:
 333 //      DR    Bit0: Receiver Data Ready Status
 334 //      OE    Bit1: Overrun Error Status
 335 //      PE    Bit2: Parity Error Status
 336 //      FE    Bit3: Framing Error Status
 337 //      BI    Bit4: Break Interrupt Status
 338 //      THRE  Bit5: Transmistter Holding Register Status
 339 //      TEMT  Bit6: Transmitter Empty Status
 340 //      FIFOE Bit7: FIFO Error Status
 341 //
 342 typedef struct {
 343   UINT8 DR : 1;
 344   UINT8 OE : 1;
 345   UINT8 PE : 1;
 346   UINT8 FE : 1;
 347   UINT8 BI : 1;
 348   UINT8 THRE : 1;
 349   UINT8 TEMT : 1;
 350   UINT8 FIFOE : 1;
 351 } SERIAL_PORT_LSR_BITS;
 352
 353 //
 354 //  Name:   SERIAL_PORT_LSR
 355 //  Purpose:
 356 //  Context:
 357 //  Fields:
 358 //      Bits    SERIAL_PORT_LSR_BITS:  Bits of the LSR
 359 //      Data    UINT8: the value of the LSR
 360 //
 361 typedef union {
 362   SERIAL_PORT_LSR_BITS  Bits;
 363   UINT8                 Data;
 364 } SERIAL_PORT_LSR;
 365
 366 //
 367 //  Name:   SERIAL_PORT_MSR_BITS
 368 //  Purpose:  Define each bit in Modem Status Register
 369 //  Context:
 370 //  Fields:
 371 //      DeltaCTS      Bit0: Delta Clear To Send Status
 372 //      DeltaDSR        Bit1: Delta Data Set Ready Status
 373 //      TrailingEdgeRI  Bit2: Trailing Edge of Ring Indicator Status
 374 //      DeltaDCD        Bit3: Delta Data Carrier Detect Status
 375 //      CTS             Bit4: Clear To Send Status
 376 //      DSR             Bit5: Data Set Ready Status
 377 //      RI              Bit6: Ring Indicator Status
 378 //      DCD             Bit7: Data Carrier Detect Status
 379 //
 380 typedef struct {
 381   UINT8 DeltaCTS : 1;
 382   UINT8 DeltaDSR : 1;
 383   UINT8 TrailingEdgeRI : 1;
 384   UINT8 DeltaDCD : 1;
 385   UINT8 CTS : 1;
 386   UINT8 DSR : 1;
 387   UINT8 RI : 1;
 388   UINT8 DCD : 1;
 389 } SERIAL_PORT_MSR_BITS;
 390
 391 //
 392 //  Name:   SERIAL_PORT_MSR
 393 //  Purpose:
 394 //  Context:
 395 //  Fields:
 396 //      Bits    SERIAL_PORT_MSR_BITS:  Bits of the MSR
 397 //      Data    UINT8: the value of the MSR
 398 //
 399 typedef union {
 400   SERIAL_PORT_MSR_BITS  Bits;
 401   UINT8                 Data;
 402 } SERIAL_PORT_MSR;
 403
 404 #pragma pack()
 405 //
 406 // Define serial register I/O macros
 407 //
 408 #define READ_RBR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_RBR)
 409 #define READ_DLL(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLL)
 410 #define READ_DLM(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_DLM)
 411 #define READ_IER(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IER)
 412 #define READ_IIR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_IIR)
 413 #define READ_LCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LCR)
 414 #define READ_MCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MCR)
 415 #define READ_LSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_LSR)
 416 #define READ_MSR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_MSR)
 417 #define READ_SCR(IO, B)     IsaSerialReadPort (IO, B, SERIAL_REGISTER_SCR)
 418
 419 #define WRITE_THR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_THR, D)
 420 #define WRITE_DLL(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLL, D)
 421 #define WRITE_DLM(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_DLM, D)
 422 #define WRITE_IER(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_IER, D)
 423 #define WRITE_FCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_FCR, D)
 424 #define WRITE_LCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LCR, D)
 425 #define WRITE_MCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MCR, D)
 426 #define WRITE_LSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_LSR, D)
 427 #define WRITE_MSR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_MSR, D)
 428 #define WRITE_SCR(IO, B, D) IsaSerialWritePort (IO, B, SERIAL_REGISTER_SCR, D)
 429
 430 //
 431 // Prototypes
 432 // Driver model protocol interface
 433 //
 434
 435 EFI_STATUS
 436 EFIAPI
 437 SerialControllerDriverSupported (
 438   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 439   IN EFI_HANDLE                     Controller,
 440   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 441   );
 442
 443 EFI_STATUS
 444 EFIAPI
 445 SerialControllerDriverStart (
 446   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 447   IN EFI_HANDLE                     Controller,
 448   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 449   );
 450
 451 EFI_STATUS
 452 EFIAPI
 453 SerialControllerDriverStop (
 454   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 455   IN  EFI_HANDLE                    Controller,
 456   IN  UINTN                         NumberOfChildren,
 457   IN  EFI_HANDLE                    *ChildHandleBuffer
 458   );
 459
 460 //
 461 // Serial I/O Protocol Interface
 462 //
 463 EFI_STATUS
 464 EFIAPI
 465 IsaSerialReset (
 466   IN EFI_SERIAL_IO_PROTOCOL         *This
 467   );
 468
 469 EFI_STATUS
 470 EFIAPI
 471 IsaSerialSetAttributes (
 472   IN EFI_SERIAL_IO_PROTOCOL         *This,
 473   IN UINT64                         BaudRate,
 474   IN UINT32                         ReceiveFifoDepth,
 475   IN UINT32                         Timeout,
 476   IN EFI_PARITY_TYPE                Parity,
 477   IN UINT8                          DataBits,
 478   IN EFI_STOP_BITS_TYPE             StopBits
 479   );
 480
 481 EFI_STATUS
 482 EFIAPI
 483 IsaSerialSetControl (
 484   IN EFI_SERIAL_IO_PROTOCOL         *This,
 485   IN UINT32                         Control
 486   );
 487
 488 EFI_STATUS
 489 EFIAPI
 490 IsaSerialGetControl (
 491   IN EFI_SERIAL_IO_PROTOCOL         *This,
 492   OUT UINT32                        *Control
 493   );
 494
 495 EFI_STATUS
 496 EFIAPI
 497 IsaSerialWrite (
 498   IN EFI_SERIAL_IO_PROTOCOL         *This,
 499   IN OUT UINTN                      *BufferSize,
 500   IN VOID                           *Buffer
 501   );
 502
 503 EFI_STATUS
 504 EFIAPI
 505 IsaSerialRead (
 506   IN EFI_SERIAL_IO_PROTOCOL         *This,
 507   IN OUT UINTN                      *BufferSize,
 508   OUT VOID                          *Buffer
 509   );
 510
 511 //
 512 // Internal Functions
 513 //
 514 BOOLEAN
 515 IsaSerialPortPresent (
 516   IN SERIAL_DEV                     *SerialDevice
 517   );
 518
 519 BOOLEAN
 520 IsaSerialFifoFull (
 521   IN SERIAL_DEV_FIFO                *Fifo
 522   );
 523
 524 BOOLEAN
 525 IsaSerialFifoEmpty (
 526   IN SERIAL_DEV_FIFO                *Fifo
 527   );
 528
 529 EFI_STATUS
 530 IsaSerialFifoAdd (
 531   IN SERIAL_DEV_FIFO                *Fifo,
 532   IN UINT8                          Data
 533   );
 534
 535 EFI_STATUS
 536 IsaSerialFifoRemove (
 537   IN  SERIAL_DEV_FIFO               *Fifo,
 538   OUT UINT8                         *Data
 539   );
 540
 541 EFI_STATUS
 542 IsaSerialReceiveTransmit (
 543   IN SERIAL_DEV                     *SerialDevice
 544   );
 545
 546 UINT8
 547 IsaSerialReadPort (
 548   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 549   IN UINT16                                 BaseAddress,
 550   IN UINT32                                 Offset
 551   );
 552
 553 VOID
 554 IsaSerialWritePort (
 555   IN EFI_ISA_IO_PROTOCOL                    *IsaIo,
 556   IN UINT16                                 BaseAddress,
 557   IN UINT32                                 Offset,
 558   IN UINT8                                  Data
 559   );
 560
 561 #endif