IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/pcibus.h

   1 /*++
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   pcibus.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver
  19
  20 Revision History
  21
  22 --*/
  23
  24 #ifndef _EFI_PCI_BUS_H
  25 #define _EFI_PCI_BUS_H
  26
  27 //
  28 // The package level header files this module uses
  29 //
  30 #include <PiDxe.h>
  31 #include <Common/FrameworkStatusCode.h>
  32 //
  33 // The protocols, PPI and GUID defintions for this module
  34 //
  35 #include <Protocol/LoadedImage.h>
  36 #include <Protocol/PciHostBridgeResourceAllocation.h>
  37 #include <Protocol/PciIo.h>
  38 #include <Guid/PciHotplugDevice.h>
  39 #include <Protocol/PciRootBridgeIo.h>
  40 #include <Protocol/PciHotPlugRequest.h>
  41 #include <Protocol/DevicePath.h>
  42 #include <Protocol/PciPlatform.h>
  43 #include <Protocol/PciHotPlugInit.h>
  44 #include <Protocol/Decompress.h>
  45 #include <Guid/PciOptionRomTable.h>
  46 #include <Protocol/BusSpecificDriverOverride.h>
  47 #include <Protocol/UgaIo.h>
  48 //
  49 // The Library classes this module consumes
  50 //
  51 #include <Library/DebugLib.h>
  52 #include <Library/UefiDriverEntryPoint.h>
  53 #include <Library/BaseLib.h>
  54 #include <Library/UefiLib.h>
  55 #include <Library/BaseMemoryLib.h>
  56 #include <Library/ReportStatusCodeLib.h>
  57 #include <Library/MemoryAllocationLib.h>
  58 #include <Library/UefiBootServicesTableLib.h>
  59 #include <Library/DevicePathLib.h>
  60 #include <Library/PcdLib.h>
  61 #include <Library/PciIncompatibleDeviceSupportLib.h>
  62
  63 #include <IndustryStandard/pci22.h>
  64 #include <IndustryStandard/Acpi.h>
  65 #include "ComponentName.h"
  66
  67 //
  68 // Driver Produced Protocol Prototypes
  69 //
  70
  71 #define VGABASE1  0x3B0
  72 #define VGALIMIT1 0x3BB
  73
  74 #define VGABASE2  0x3C0
  75 #define VGALIMIT2 0x3DF
  76
  77 #define ISABASE   0x100
  78 #define ISALIMIT  0x3FF
  79
  80 typedef enum {
  81   PciBarTypeUnknown = 0,
  82   PciBarTypeIo16,
  83   PciBarTypeIo32,
  84   PciBarTypeMem32,
  85   PciBarTypePMem32,
  86   PciBarTypeMem64,
  87   PciBarTypePMem64,
  88   PciBarTypeIo,
  89   PciBarTypeMem,
  90   PciBarTypeMaxType
  91 } PCI_BAR_TYPE;
  92
  93 typedef struct {
  94   UINT64        BaseAddress;
  95   UINT64        Length;
  96   UINT64        Alignment;
  97   PCI_BAR_TYPE  BarType;
  98   BOOLEAN       Prefetchable;
  99   UINT8         MemType;
 100   UINT8         Offset;
 101 } PCI_BAR;
 102
 103 #define PPB_BAR_0                             0
 104 #define PPB_BAR_1                             1
 105 #define PPB_IO_RANGE                          2
 106 #define PPB_MEM32_RANGE                       3
 107 #define PPB_PMEM32_RANGE                      4
 108 #define PPB_PMEM64_RANGE                      5
 109 #define PPB_MEM64_RANGE                       0xFF
 110
 111 #define P2C_BAR_0                             0
 112 #define P2C_MEM_1                             1
 113 #define P2C_MEM_2                             2
 114 #define P2C_IO_1                              3
 115 #define P2C_IO_2                              4
 116
 117 #define PCI_IO_DEVICE_SIGNATURE               EFI_SIGNATURE_32 ('p', 'c', 'i', 'o')
 118
 119 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 120 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 121 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 122 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 123 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 124 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 125 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 126
 127 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 128 //
 129 // Define resource status constant
 130 //
 131 #define EFI_RESOURCE_NONEXISTENT  0xFFFFFFFFFFFFFFFFULL
 132 #define EFI_RESOURCE_LESS         0xFFFFFFFFFFFFFFFEULL
 133 #define EFI_RESOURCE_SATISFIED    0x0000000000000000ULL
 134
 135 //
 136 // Define option for attribute
 137 //
 138 #define EFI_SET_SUPPORTS    0
 139 #define EFI_SET_ATTRIBUTES  1
 140
 141 typedef struct _PCI_IO_DEVICE {
 142   UINT32                                    Signature;
 143   EFI_HANDLE                                Handle;
 144   EFI_PCI_IO_PROTOCOL                       PciIo;
 145   LIST_ENTRY                                Link;
 146
 147   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 148   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 149   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 150
 151   //
 152   // PCI configuration space header type
 153   //
 154   PCI_TYPE00                                Pci;
 155
 156   //
 157   // Bus number, Device number, Function number
 158   //
 159   UINT8                                     BusNumber;
 160   UINT8                                     DeviceNumber;
 161   UINT8                                     FunctionNumber;
 162
 163   //
 164   // BAR for this PCI Device
 165   //
 166   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 167
 168   //
 169   // The bridge device this pci device is subject to
 170   //
 171   struct _PCI_IO_DEVICE                     *Parent;
 172
 173   //
 174   // A linked list for children Pci Device if it is bridge device
 175   //
 176   LIST_ENTRY                                ChildList;
 177
 178   //
 179   // TURE if the PCI bus driver creates the handle for this PCI device
 180   //
 181   BOOLEAN                                   Registered;
 182
 183   //
 184   // TRUE if the PCI bus driver successfully allocates the resource required by
 185   // this PCI device
 186   //
 187   BOOLEAN                                   Allocated;
 188
 189   //
 190   // The attribute this PCI device currently set
 191   //
 192   UINT64                                    Attributes;
 193
 194   //
 195   // The attributes this PCI device actually supports
 196   //
 197   UINT64                                    Supports;
 198
 199   //
 200   // The resource decode the bridge supports
 201   //
 202   UINT32                                    Decodes;
 203
 204   //
 205   // The OptionRom Size
 206   //
 207   UINT64                                    RomSize;
 208
 209   //
 210   // The OptionRom Size
 211   //
 212   UINT64                                    RomBase;
 213
 214   //
 215   // TRUE if all OpROM (in device or in platform specific position) have been processed
 216   //
 217   BOOLEAN                                   AllOpRomProcessed;
 218
 219   //
 220   // TRUE if there is any EFI driver in the OptionRom
 221   //
 222   BOOLEAN                                   BusOverride;
 223
 224   //
 225   //  A list tracking reserved resource on a bridge device
 226   //
 227   LIST_ENTRY                                ReservedResourceList;
 228
 229   //
 230   // A list tracking image handle of platform specific overriding driver
 231   //
 232   LIST_ENTRY                                OptionRomDriverList;
 233
 234   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 235   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 236
 237   BOOLEAN                                   IsPciExp;
 238
 239 } PCI_IO_DEVICE;
 240
 241
 242 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 243   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 244
 245 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 246   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 247
 248 #define PCI_IO_DEVICE_FROM_LINK(a) \
 249   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 250
 251 //
 252 // Global Variables
 253 //
 254 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 255 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 256 extern LIST_ENTRY                                   gPciDevicePool;
 257 extern BOOLEAN                                      gFullEnumeration;
 258 extern UINTN                                        gPciHostBridgeNumber;
 259 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 260 extern UINT64                                       gAllOne;
 261 extern UINT64                                       gAllZero;
 262
 263 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 264
 265 #include "PciIo.h"
 266 #include "PciCommand.h"
 267 #include "PciDeviceSupport.h"
 268 #include "PciEnumerator.h"
 269 #include "PciEnumeratorSupport.h"
 270 #include "PciDriverOverride.h"
 271 #include "PciRomTable.h"
 272 #include "PciOptionRomSupport.h"
 273 #include "PciPowerManagement.h"
 274 #include "PciHotPlugSupport.h"
 275 #include "PciLib.h"
 276
 277 //
 278 // PCI Bus Support Function Prototypes
 279 //
 280 EFI_STATUS
 281 EFIAPI
 282 PciBusDriverBindingSupported (
 283   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 284   IN EFI_HANDLE                     Controller,
 285   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 286   );
 287
 288 EFI_STATUS
 289 EFIAPI
 290 PciBusDriverBindingStart (
 291   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 292   IN EFI_HANDLE                     Controller,
 293   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 294   );
 295
 296 EFI_STATUS
 297 EFIAPI
 298 PciBusDriverBindingStop (
 299   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 300   IN  EFI_HANDLE                    Controller,
 301   IN  UINTN                         NumberOfChildren,
 302   IN  EFI_HANDLE                    *ChildHandleBuffer
 303   );
 304
 305 #endif