IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h

   1 /** @file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #ifndef _EFI_PCI_BUS_H_
  16 #define _EFI_PCI_BUS_H_
  17
  18
  19 #include <FrameworkDxe.h>
  20
  21
  22 #include <Protocol/LoadedImage.h>
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciIo.h>
  25 #include <Guid/PciHotplugDevice.h>
  26 #include <Protocol/PciRootBridgeIo.h>
  27 #include <Protocol/PciHotPlugRequest.h>
  28 #include <Protocol/DevicePath.h>
  29 #include <Protocol/PciPlatform.h>
  30 #include <Protocol/PciHotPlugInit.h>
  31 #include <Protocol/Decompress.h>
  32 #include <Guid/PciOptionRomTable.h>
  33 #include <Protocol/BusSpecificDriverOverride.h>
  34 #include <Protocol/UgaIo.h>
  35 #include <Protocol/IncompatiblePciDeviceSupport.h>
  36
  37 #include <Library/DebugLib.h>
  38 #include <Library/UefiDriverEntryPoint.h>
  39 #include <Library/BaseLib.h>
  40 #include <Library/UefiLib.h>
  41 #include <Library/BaseMemoryLib.h>
  42 #include <Library/ReportStatusCodeLib.h>
  43 #include <Library/MemoryAllocationLib.h>
  44 #include <Library/UefiBootServicesTableLib.h>
  45 #include <Library/DevicePathLib.h>
  46 #include <Library/PcdLib.h>
  47 #include <Library/PciIncompatibleDeviceSupportLib.h>
  48 #include <Library/PeCoffLib.h>
  49
  50 #include <IndustryStandard/Pci.h>
  51 #include <IndustryStandard/PeImage.h>
  52 #include <IndustryStandard/Acpi.h>
  53 #include "ComponentName.h"
  54
  55 //
  56 // Driver Produced Protocol Prototypes
  57 //
  58
  59 #define VGABASE1  0x3B0
  60 #define VGALIMIT1 0x3BB
  61
  62 #define VGABASE2  0x3C0
  63 #define VGALIMIT2 0x3DF
  64
  65 #define ISABASE   0x100
  66 #define ISALIMIT  0x3FF
  67
  68 typedef enum {
  69   PciBarTypeUnknown = 0,
  70   PciBarTypeIo16,
  71   PciBarTypeIo32,
  72   PciBarTypeMem32,
  73   PciBarTypePMem32,
  74   PciBarTypeMem64,
  75   PciBarTypePMem64,
  76   PciBarTypeIo,
  77   PciBarTypeMem,
  78   PciBarTypeMaxType
  79 } PCI_BAR_TYPE;
  80
  81 typedef struct {
  82   UINT64        BaseAddress;
  83   UINT64        Length;
  84   UINT64        Alignment;
  85   PCI_BAR_TYPE  BarType;
  86   BOOLEAN       Prefetchable;
  87   UINT8         MemType;
  88   UINT8         Offset;
  89 } PCI_BAR;
  90
  91 #define PPB_BAR_0                             0
  92 #define PPB_BAR_1                             1
  93 #define PPB_IO_RANGE                          2
  94 #define PPB_MEM32_RANGE                       3
  95 #define PPB_PMEM32_RANGE                      4
  96 #define PPB_PMEM64_RANGE                      5
  97 #define PPB_MEM64_RANGE                       0xFF
  98
  99 #define P2C_BAR_0                             0
 100 #define P2C_MEM_1                             1
 101 #define P2C_MEM_2                             2
 102 #define P2C_IO_1                              3
 103 #define P2C_IO_2                              4
 104
 105 #define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')
 106
 107 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 108 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 109 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 110 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 111 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 112 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 113 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 114
 115 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 116 //
 117 // Define resource status constant
 118 //
 119 #define EFI_RESOURCE_NONEXISTENT  0xFFFFFFFFFFFFFFFFULL
 120 #define EFI_RESOURCE_LESS         0xFFFFFFFFFFFFFFFEULL
 121 #define EFI_RESOURCE_SATISFIED    0x0000000000000000ULL
 122
 123 //
 124 // Define option for attribute
 125 //
 126 #define EFI_SET_SUPPORTS    0
 127 #define EFI_SET_ATTRIBUTES  1
 128
 129 typedef struct _PCI_IO_DEVICE {
 130   UINT32                                    Signature;
 131   EFI_HANDLE                                Handle;
 132   EFI_PCI_IO_PROTOCOL                       PciIo;
 133   LIST_ENTRY                                Link;
 134
 135   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 136   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 137   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 138
 139   //
 140   // PCI configuration space header type
 141   //
 142   PCI_TYPE00                                Pci;
 143
 144   //
 145   // Bus number, Device number, Function number
 146   //
 147   UINT8                                     BusNumber;
 148   UINT8                                     DeviceNumber;
 149   UINT8                                     FunctionNumber;
 150
 151   //
 152   // BAR for this PCI Device
 153   //
 154   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 155
 156   //
 157   // The bridge device this pci device is subject to
 158   //
 159   struct _PCI_IO_DEVICE                     *Parent;
 160
 161   //
 162   // A linked list for children Pci Device if it is bridge device
 163   //
 164   LIST_ENTRY                                ChildList;
 165
 166   //
 167   // TURE if the PCI bus driver creates the handle for this PCI device
 168   //
 169   BOOLEAN                                   Registered;
 170
 171   //
 172   // TRUE if the PCI bus driver successfully allocates the resource required by
 173   // this PCI device
 174   //
 175   BOOLEAN                                   Allocated;
 176
 177   //
 178   // The attribute this PCI device currently set
 179   //
 180   UINT64                                    Attributes;
 181
 182   //
 183   // The attributes this PCI device actually supports
 184   //
 185   UINT64                                    Supports;
 186
 187   //
 188   // The resource decode the bridge supports
 189   //
 190   UINT32                                    Decodes;
 191
 192   //
 193   // The OptionRom Size
 194   //
 195   UINT64                                    RomSize;
 196
 197   //
 198   // The OptionRom Size
 199   //
 200   UINT64                                    RomBase;
 201
 202   //
 203   // TRUE if all OpROM (in device or in platform specific position) have been processed
 204   //
 205   BOOLEAN                                   AllOpRomProcessed;
 206
 207   //
 208   // TRUE if there is any EFI driver in the OptionRom
 209   //
 210   BOOLEAN                                   BusOverride;
 211
 212   //
 213   //  A list tracking reserved resource on a bridge device
 214   //
 215   LIST_ENTRY                                ReservedResourceList;
 216
 217   //
 218   // A list tracking image handle of platform specific overriding driver
 219   //
 220   LIST_ENTRY                                OptionRomDriverList;
 221
 222   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 223   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 224
 225   BOOLEAN                                   IsPciExp;
 226
 227 } PCI_IO_DEVICE;
 228
 229
 230 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 231   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 232
 233 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 234   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 235
 236 #define PCI_IO_DEVICE_FROM_LINK(a) \
 237   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 238
 239 //
 240 // Global Variables
 241 //
 242 extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;
 243 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 244 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 245 extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;
 246 extern LIST_ENTRY                                   gPciDevicePool;
 247 extern BOOLEAN                                      gFullEnumeration;
 248 extern UINTN                                        gPciHostBridgeNumber;
 249 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 250 extern UINT64                                       gAllOne;
 251 extern UINT64                                       gAllZero;
 252
 253 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 254
 255 #include "PciIo.h"
 256 #include "PciCommand.h"
 257 #include "PciDeviceSupport.h"
 258 #include "PciEnumerator.h"
 259 #include "PciEnumeratorSupport.h"
 260 #include "PciDriverOverride.h"
 261 #include "PciRomTable.h"
 262 #include "PciOptionRomSupport.h"
 263 #include "PciPowerManagement.h"
 264 #include "PciHotPlugSupport.h"
 265 #include "PciLib.h"
 266
 267 //
 268 // PCI Bus Support Function Prototypes
 269 //
 270 /**
 271   Test to see if this driver supports ControllerHandle. Any ControllerHandle
 272   than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
 273
 274   @param  This                Protocol instance pointer.
 275   @param  ControllerHandle    Handle of device to test.
 276   @param  RemainingDevicePath Optional parameter use to pick a specific child.
 277                               device to start.
 278
 279   @retval EFI_SUCCESS         This driver supports this device.
 280   @retval EFI_ALREADY_STARTED This driver is already running on this device.
 281   @retval other               This driver does not support this device.
 282
 283 **/
 284 EFI_STATUS
 285 EFIAPI
 286 PciBusDriverBindingSupported (
 287   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 288   IN EFI_HANDLE                     Controller,
 289   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 290   );
 291
 292 /**
 293   Start this driver on ControllerHandle and enumerate Pci bus and start
 294   all device under PCI bus.
 295
 296   @param  This                 Protocol instance pointer.
 297   @param  ControllerHandle     Handle of device to bind driver to.
 298   @param  RemainingDevicePath  Optional parameter use to pick a specific child.
 299                                device to start.
 300
 301   @retval EFI_SUCCESS          This driver is added to ControllerHandle.
 302   @retval EFI_ALREADY_STARTED  This driver is already running on ControllerHandle.
 303   @retval other                This driver does not support this device.
 304
 305 **/
 306 EFI_STATUS
 307 EFIAPI
 308 PciBusDriverBindingStart (
 309   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 310   IN EFI_HANDLE                     Controller,
 311   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 312   );
 313
 314 /**
 315   Stop this driver on ControllerHandle. Support stoping any child handles
 316   created by this driver.
 317
 318   @param  This              Protocol instance pointer.
 319   @param  ControllerHandle  Handle of device to stop driver on.
 320   @param  NumberOfChildren  Number of Handles in ChildHandleBuffer. If number of
 321                             children is zero stop the entire bus driver.
 322   @param  ChildHandleBuffer List of Child Handles to Stop.
 323
 324   @retval EFI_SUCCESS       This driver is removed ControllerHandle.
 325   @retval other             This driver was not removed from this device.
 326
 327 **/
 328 EFI_STATUS
 329 EFIAPI
 330 PciBusDriverBindingStop (
 331   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 332   IN  EFI_HANDLE                    Controller,
 333   IN  UINTN                         NumberOfChildren,
 334   IN  EFI_HANDLE                    *ChildHandleBuffer
 335   );
 336
 337 #define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
 338
 339 #endif