IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.h

   1 /**@file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #ifndef _EFI_PCI_COMMAND_H
  16 #define _EFI_PCI_COMMAND_H
  17
  18 //
  19 // The PCI Command register bits owned by PCI Bus driver.
  20 //
  21 // They should be cleared at the beginning. The other registers
  22 // are owned by chipset, we should not touch them.
  23 //
  24 #define EFI_PCI_COMMAND_BITS_OWNED                          ( \
  25                 EFI_PCI_COMMAND_IO_SPACE                    | \
  26                 EFI_PCI_COMMAND_MEMORY_SPACE                | \
  27                 EFI_PCI_COMMAND_BUS_MASTER                  | \
  28                 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
  29                 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP           | \
  30                 EFI_PCI_COMMAND_FAST_BACK_TO_BACK             \
  31                 )
  32
  33 //
  34 // The PCI Bridge Control register bits owned by PCI Bus driver.
  35 //
  36 // They should be cleared at the beginning. The other registers
  37 // are owned by chipset, we should not touch them.
  38 //
  39 #define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED                   ( \
  40                 EFI_PCI_BRIDGE_CONTROL_ISA                  | \
  41                 EFI_PCI_BRIDGE_CONTROL_VGA                  | \
  42                 EFI_PCI_BRIDGE_CONTROL_VGA_16               | \
  43                 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \
  44                 )
  45
  46 //
  47 // The PCCard Bridge Control register bits owned by PCI Bus driver.
  48 //
  49 // They should be cleared at the beginning. The other registers
  50 // are owned by chipset, we should not touch them.
  51 //
  52 #define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED                ( \
  53                 EFI_PCI_BRIDGE_CONTROL_ISA                  | \
  54                 EFI_PCI_BRIDGE_CONTROL_VGA                  | \
  55                 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \
  56                 )
  57
  58
  59 #define EFI_GET_REGISTER      1
  60 #define EFI_SET_REGISTER      2
  61 #define EFI_ENABLE_REGISTER   3
  62 #define EFI_DISABLE_REGISTER  4
  63
  64 /**
  65   Operate the PCI register via PciIo function interface.
  66
  67   @param PciIoDevice    Pointer to instance of PCI_IO_DEVICE
  68   @param Command        Operator command
  69   @param Offset         The address within the PCI configuration space for the PCI controller.
  70   @param Operation      Type of Operation
  71   @param PtrCommand     Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER
  72
  73   @return status of PciIo operation
  74 **/
  75 EFI_STATUS
  76 PciOperateRegister (
  77   IN  PCI_IO_DEVICE *PciIoDevice,
  78   IN  UINT16        Command,
  79   IN  UINT8         Offset,
  80   IN  UINT8         Operation,
  81   OUT UINT16        *PtrCommand
  82   )
  83 ;
  84
  85 /**
  86   check the cpability of this device supports
  87
  88   @param PciIoDevice  Pointer to instance of PCI_IO_DEVICE
  89
  90   @retval TRUE  Support
  91   @retval FALSE Not support
  92 **/
  93 BOOLEAN
  94 PciCapabilitySupport (
  95   IN PCI_IO_DEVICE  *PciIoDevice
  96   )
  97 ;
  98
  99 /**
 100   Locate cap reg.
 101
 102   @param PciIoDevice         - A pointer to the PCI_IO_DEVICE.
 103   @param CapId               - The cap ID.
 104   @param Offset              - A pointer to the offset.
 105   @param NextRegBlock        - A pointer to the next block.
 106
 107   @retval EFI_UNSUPPORTED  Pci device does not support
 108   @retval EFI_NOT_FOUND    Pci device support but can not find register block.
 109   @retval EFI_SUCCESS      Success to locate capability register block
 110 **/
 111 EFI_STATUS
 112 LocateCapabilityRegBlock (
 113   IN PCI_IO_DEVICE  *PciIoDevice,
 114   IN UINT8          CapId,
 115   IN OUT UINT8      *Offset,
 116   OUT UINT8         *NextRegBlock OPTIONAL
 117   )
 118 ;
 119
 120
 121 #define PciReadCommandRegister(a,b) \
 122         PciOperateRegister (a,0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
 123
 124 #define PciSetCommandRegister(a,b) \
 125         PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
 126
 127 #define PciEnableCommandRegister(a,b) \
 128         PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
 129
 130 #define PciDisableCommandRegister(a,b) \
 131         PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
 132
 133 #define PciReadBridgeControlRegister(a,b) \
 134         PciOperateRegister (a,0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
 135
 136 #define PciSetBridgeControlRegister(a,b) \
 137         PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
 138
 139 #define PciEnableBridgeControlRegister(a,b) \
 140         PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
 141
 142 #define PciDisableBridgeControlRegister(a,b) \
 143         PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
 144
 145 #endif