IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciIo.h

   1 /** @file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #ifndef _EFI_PCI_IO_PROTOCOL_H_
  16 #define _EFI_PCI_IO_PROTOCOL_H_
  17
  18 /**
  19   Initializes a PCI I/O Instance.
  20
  21   @param PciIoDevice  Pci device instance.
  22
  23 **/
  24 VOID
  25 InitializePciIoInstance (
  26   PCI_IO_DEVICE  *PciIoDevice
  27   );
  28
  29 /**
  30   Verifies access to a PCI Base Address Register (BAR)
  31
  32   @param PciIoDevice  Pci device instance
  33   @param BarIndex     The BAR index of the standard PCI Configuration header to use as the
  34                       base address for the memory or I/O operation to perform.
  35   @param Type         Operation type could be memory or I/O
  36   @param Width        Signifies the width of the memory or I/O operations.
  37   @param Count        The number of memory or I/O operations to perform.
  38   @param Offset       The offset within the PCI configuration space for the PCI controller.
  39
  40   @retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type.
  41   @retval EFI_SUCCESS           Success Operation.
  42 **/
  43 EFI_STATUS
  44 PciIoVerifyBarAccess (
  45   PCI_IO_DEVICE                   *PciIoDevice,
  46   UINT8                           BarIndex,
  47   PCI_BAR_TYPE                    Type,
  48   IN EFI_PCI_IO_PROTOCOL_WIDTH    Width,
  49   IN UINTN                        Count,
  50   UINT64                          *Offset
  51   );
  52
  53 /**
  54   Verifies access to a PCI Config Header
  55
  56   @param PciIoDevice  Pci device instance
  57   @param Width        Signifies the width of the memory or I/O operations.
  58   @param Count        The number of memory or I/O operations to perform.
  59   @param Offset       The offset within the PCI configuration space for the PCI controller.
  60
  61   @retval EFI_INVALID_PARAMETER  Invalid Width.
  62   @retval EFI_UNSUPPORTED        Offset overflow.
  63   @retval EFI_SUCCESS            Success operation.
  64 **/
  65 EFI_STATUS
  66 PciIoVerifyConfigAccess (
  67   PCI_IO_DEVICE                 *PciIoDevice,
  68   IN EFI_PCI_IO_PROTOCOL_WIDTH  Width,
  69   IN UINTN                      Count,
  70   IN UINT64                     *Offset
  71   );
  72
  73 /**
  74   Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
  75   satisfied or after a defined duration.
  76
  77   @param This       Pointer to protocol instance of EFI_PCI_IO_PROTOCOL
  78   @param Width      Signifies the width of the memory or I/O operations.
  79   @param BarIndex   The BAR index of the standard PCI Configuration header to use as the
  80                     base address for the memory or I/O operation to perform.
  81   @param Offset     The offset within the PCI configuration space for the PCI controller.
  82   @param Mask       Mask used for the polling criteria.
  83   @param Value      The comparison value used for the polling exit criteria.
  84   @param Delay      The number of 100 ns units to poll.
  85   @param Result     Pointer to the last value read from the memory location.
  86
  87   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
  88   @retval EFI_TIMEOUT           Delay expired before a match occurred.
  89   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
  90   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
  91 **/
  92 EFI_STATUS
  93 EFIAPI
  94 PciIoPollMem (
  95   IN  EFI_PCI_IO_PROTOCOL        *This,
  96   IN  EFI_PCI_IO_PROTOCOL_WIDTH  Width,
  97   IN  UINT8                      BarIndex,
  98   IN  UINT64                     Offset,
  99   IN  UINT64                     Mask,
 100   IN  UINT64                     Value,
 101   IN  UINT64                     Delay,
 102   OUT UINT64                     *Result
 103   );
 104
 105 /**
 106   Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
 107   satisfied or after a defined duration.
 108
 109   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL.
 110   @param  Width                 Signifies the width of the memory or I/O operations.
 111   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 112                                 base address for the memory or I/O operation to perform.
 113   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 114   @param  Mask                  Mask used for the polling criteria.
 115   @param  Value                 The comparison value used for the polling exit criteria.
 116   @param  Delay                 The number of 100 ns units to poll.
 117   @param  Result                Pointer to the last value read from the memory location.
 118
 119   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
 120   @retval EFI_TIMEOUT           Delay expired before a match occurred.
 121   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 122   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 123
 124 **/
 125 EFI_STATUS
 126 EFIAPI
 127 PciIoPollIo (
 128   IN  EFI_PCI_IO_PROTOCOL        *This,
 129   IN  EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 130   IN  UINT8                      BarIndex,
 131   IN  UINT64                     Offset,
 132   IN  UINT64                     Mask,
 133   IN  UINT64                     Value,
 134   IN  UINT64                     Delay,
 135   OUT UINT64                     *Result
 136   );
 137
 138 /**
 139   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 140
 141   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 142   @param  Width                 Signifies the width of the memory or I/O operations.
 143   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 144                                 base address for the memory or I/O operation to perform.
 145   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 146   @param  Count                 The number of memory or I/O operations to perform.
 147   @param  Buffer                For read operations, the destination buffer to store the results. For write
 148                                 operations, the source buffer to write data from.
 149
 150   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 151   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 152   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 153                                 valid for the PCI BAR specified by BarIndex.
 154   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 155   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 156
 157 **/
 158 EFI_STATUS
 159 EFIAPI
 160 PciIoMemRead (
 161   IN     EFI_PCI_IO_PROTOCOL        *This,
 162   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 163   IN     UINT8                      BarIndex,
 164   IN     UINT64                     Offset,
 165   IN     UINTN                      Count,
 166   IN OUT VOID                       *Buffer
 167   );
 168
 169 /**
 170   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 171
 172   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 173   @param  Width                 Signifies the width of the memory or I/O operations.
 174   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 175                                 base address for the memory or I/O operation to perform.
 176   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 177   @param  Count                 The number of memory or I/O operations to perform.
 178   @param  Buffer                For read operations, the destination buffer to store the results. For write
 179                                 operations, the source buffer to write data from.
 180
 181   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 182   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 183   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 184                                 valid for the PCI BAR specified by BarIndex.
 185   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 186   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 187
 188 **/
 189 EFI_STATUS
 190 EFIAPI
 191 PciIoMemWrite (
 192   IN     EFI_PCI_IO_PROTOCOL        *This,
 193   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 194   IN     UINT8                      BarIndex,
 195   IN     UINT64                     Offset,
 196   IN     UINTN                      Count,
 197   IN OUT VOID                       *Buffer
 198   );
 199
 200 /**
 201   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 202
 203   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 204   @param  Width                 Signifies the width of the memory or I/O operations.
 205   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 206                                 base address for the memory or I/O operation to perform.
 207   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 208   @param  Count                 The number of memory or I/O operations to perform.
 209   @param  Buffer                For read operations, the destination buffer to store the results. For write
 210                                 operations, the source buffer to write data from.
 211
 212   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 213   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 214   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 215                                 valid for the PCI BAR specified by BarIndex.
 216   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 217   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 218
 219 **/
 220 EFI_STATUS
 221 EFIAPI
 222 PciIoIoRead (
 223   IN     EFI_PCI_IO_PROTOCOL        *This,
 224   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 225   IN     UINT8                      BarIndex,
 226   IN     UINT64                     Offset,
 227   IN     UINTN                      Count,
 228   IN OUT VOID                       *Buffer
 229   );
 230
 231 /**
 232   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 233
 234   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 235   @param  Width                 Signifies the width of the memory or I/O operations.
 236   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 237                                 base address for the memory or I/O operation to perform.
 238   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 239   @param  Count                 The number of memory or I/O operations to perform.
 240   @param  Buffer                For read operations, the destination buffer to store the results. For write
 241                                 operations, the source buffer to write data from.
 242
 243   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 244   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 245   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 246                                 valid for the PCI BAR specified by BarIndex.
 247   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 248   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 249
 250 **/
 251 EFI_STATUS
 252 EFIAPI
 253 PciIoIoWrite (
 254   IN     EFI_PCI_IO_PROTOCOL        *This,
 255   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 256   IN     UINT8                      BarIndex,
 257   IN     UINT64                     Offset,
 258   IN     UINTN                      Count,
 259   IN OUT VOID                       *Buffer
 260   );
 261
 262 /**
 263   Enable a PCI driver to access PCI controller registers in PCI configuration space.
 264
 265   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 266   @param  Width                 Signifies the width of the memory operations.
 267   @param  Offset                The offset within the PCI configuration space for the PCI controller.
 268   @param  Count                 The number of PCI configuration operations to perform.
 269   @param  Buffer                For read operations, the destination buffer to store the results. For write
 270                                 operations, the source buffer to write data from.
 271
 272
 273   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 274   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 275                                 valid for the PCI configuration header of the PCI controller.
 276   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 277   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
 278
 279 **/
 280 EFI_STATUS
 281 EFIAPI
 282 PciIoConfigRead (
 283   IN     EFI_PCI_IO_PROTOCOL        *This,
 284   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 285   IN     UINT32                     Offset,
 286   IN     UINTN                      Count,
 287   IN OUT VOID                       *Buffer
 288   );
 289
 290 /**
 291   Enable a PCI driver to access PCI controller registers in PCI configuration space.
 292
 293   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 294   @param  Width                 Signifies the width of the memory operations.
 295   @param  Offset                The offset within the PCI configuration space for the PCI controller.
 296   @param  Count                 The number of PCI configuration operations to perform.
 297   @param  Buffer                For read operations, the destination buffer to store the results. For write
 298                                 operations, the source buffer to write data from.
 299
 300
 301   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 302   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 303                                 valid for the PCI configuration header of the PCI controller.
 304   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 305   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
 306
 307 **/
 308 EFI_STATUS
 309 EFIAPI
 310 PciIoConfigWrite (
 311   IN     EFI_PCI_IO_PROTOCOL        *This,
 312   IN     EFI_PCI_IO_PROTOCOL_WIDTH  Width,
 313   IN     UINT32                     Offset,
 314   IN     UINTN                      Count,
 315   IN OUT VOID                       *Buffer
 316   );
 317
 318 /**
 319   Enables a PCI driver to copy one region of PCI memory space to another region of PCI
 320   memory space.
 321
 322   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 323   @param  Width                 Signifies the width of the memory operations.
 324   @param  DestBarIndex          The BAR index in the standard PCI Configuration header to use as the
 325                                 base address for the memory operation to perform.
 326   @param  DestOffset            The destination offset within the BAR specified by DestBarIndex to
 327                                 start the memory writes for the copy operation.
 328   @param  SrcBarIndex           The BAR index in the standard PCI Configuration header to use as the
 329                                 base address for the memory operation to perform.
 330   @param  SrcOffset             The source offset within the BAR specified by SrcBarIndex to start
 331                                 the memory reads for the copy operation.
 332   @param  Count                 The number of memory operations to perform. Bytes moved is Width
 333                                 size * Count, starting at DestOffset and SrcOffset.
 334
 335   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
 336   @retval EFI_UNSUPPORTED       DestBarIndex not valid for this PCI controller.
 337   @retval EFI_UNSUPPORTED       SrcBarIndex not valid for this PCI controller.
 338   @retval EFI_UNSUPPORTED       The address range specified by DestOffset, Width, and Count
 339                                 is not valid for the PCI BAR specified by DestBarIndex.
 340   @retval EFI_UNSUPPORTED       The address range specified by SrcOffset, Width, and Count is
 341                                 not valid for the PCI BAR specified by SrcBarIndex.
 342   @retval EFI_INVALID_PARAMETER Width is invalid.
 343   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 344
 345 **/
 346 EFI_STATUS
 347 EFIAPI
 348 PciIoCopyMem (
 349   IN EFI_PCI_IO_PROTOCOL              *This,
 350   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 351   IN     UINT8                        DestBarIndex,
 352   IN     UINT64                       DestOffset,
 353   IN     UINT8                        SrcBarIndex,
 354   IN     UINT64                       SrcOffset,
 355   IN     UINTN                        Count
 356   );
 357
 358 /**
 359   Provides the PCI controller-Cspecific addresses needed to access system memory.
 360
 361   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 362   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 363   @param  HostAddress           The system memory address to map to the PCI controller.
 364   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 365                                 that were mapped.
 366   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
 367                                 access the hosts HostAddress.
 368   @param  Mapping               A resulting value to pass to Unmap().
 369
 370   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 371   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 372   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 373   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 374   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 375
 376 **/
 377 EFI_STATUS
 378 EFIAPI
 379 PciIoMap (
 380   IN     EFI_PCI_IO_PROTOCOL            *This,
 381   IN     EFI_PCI_IO_PROTOCOL_OPERATION  Operation,
 382   IN     VOID                           *HostAddress,
 383   IN OUT UINTN                          *NumberOfBytes,
 384   OUT    EFI_PHYSICAL_ADDRESS           *DeviceAddress,
 385   OUT    VOID                           **Mapping
 386   );
 387
 388 /**
 389   Completes the Map() operation and releases any corresponding resources.
 390
 391   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 392   @param  Mapping               The mapping value returned from Map().
 393
 394   @retval EFI_SUCCESS           The range was unmapped.
 395   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 396
 397 **/
 398 EFI_STATUS
 399 EFIAPI
 400 PciIoUnmap (
 401   IN  EFI_PCI_IO_PROTOCOL  *This,
 402   IN  VOID                 *Mapping
 403   );
 404
 405 /**
 406   Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
 407   mapping.
 408
 409   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 410   @param  Type                  This parameter is not used and must be ignored.
 411   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 412                                 EfiRuntimeServicesData.
 413   @param  Pages                 The number of pages to allocate.
 414   @param  HostAddress           A pointer to store the base system memory address of the
 415                                 allocated range.
 416   @param  Attributes            The requested bit mask of attributes for the allocated range.
 417
 418   @retval EFI_SUCCESS           The requested memory pages were allocated.
 419   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 420                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 421   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 422   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 423
 424 **/
 425 EFI_STATUS
 426 EFIAPI
 427 PciIoAllocateBuffer (
 428   IN  EFI_PCI_IO_PROTOCOL   *This,
 429   IN  EFI_ALLOCATE_TYPE     Type,
 430   IN  EFI_MEMORY_TYPE       MemoryType,
 431   IN  UINTN                 Pages,
 432   OUT VOID                  **HostAddress,
 433   IN  UINT64                Attributes
 434   );
 435
 436 /**
 437   Frees memory that was allocated with AllocateBuffer().
 438
 439   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 440   @param  Pages                 The number of pages to free.
 441   @param  HostAddress           The base system memory address of the allocated range.
 442
 443   @retval EFI_SUCCESS           The requested memory pages were freed.
 444   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 445                                 was not allocated with AllocateBuffer().
 446
 447 **/
 448 EFI_STATUS
 449 EFIAPI
 450 PciIoFreeBuffer (
 451   IN  EFI_PCI_IO_PROTOCOL   *This,
 452   IN  UINTN                 Pages,
 453   IN  VOID                  *HostAddress
 454   );
 455
 456 /**
 457   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
 458
 459   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 460
 461   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
 462                                 bridge to system memory.
 463   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
 464                                 host bridge due to a hardware error.
 465
 466 **/
 467 EFI_STATUS
 468 EFIAPI
 469 PciIoFlush (
 470   IN  EFI_PCI_IO_PROTOCOL  *This
 471   );
 472
 473 /**
 474   Retrieves this PCI controller's current PCI bus number, device number, and function number.
 475
 476   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 477   @param  SegmentNumber         The PCI controller's current PCI segment number.
 478   @param  BusNumber             The PCI controller's current PCI bus number.
 479   @param  DeviceNumber          The PCI controller's current PCI device number.
 480   @param  FunctionNumber        The PCI controller's current PCI function number.
 481
 482   @retval EFI_SUCCESS           The PCI controller location was returned.
 483   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 484
 485 **/
 486 EFI_STATUS
 487 EFIAPI
 488 PciIoGetLocation (
 489   IN  EFI_PCI_IO_PROTOCOL  *This,
 490   OUT UINTN                *Segment,
 491   OUT UINTN                *Bus,
 492   OUT UINTN                *Device,
 493   OUT UINTN                *Function
 494   );
 495
 496 /**
 497   Check BAR type for PCI resource.
 498
 499   @param PciIoDevice   PCI device instance
 500   @param BarIndex      The BAR index of the standard PCI Configuration header to use as the
 501                        base address for the memory or I/O operation to perform.
 502   @param BarType       Memory or I/O
 503
 504   @return whether Pci device's bar type is same with input BarType.
 505 **/
 506 BOOLEAN
 507 CheckBarType (
 508   IN PCI_IO_DEVICE       *PciIoDevice,
 509   UINT8                  BarIndex,
 510   PCI_BAR_TYPE           BarType
 511   );
 512
 513 /**
 514   Set/Disable new attributes to a Root Bridge
 515
 516   @param  PciIoDevice  Pci device instance
 517   @param  Attributes   New attribute want to be set
 518   @param  Operation    Set or Disable
 519
 520   @retval  EFI_UNSUPPORTED  If root bridge does not support change attribute
 521   @retval  EFI_SUCCESS      Success operation.
 522 **/
 523 EFI_STATUS
 524 ModifyRootBridgeAttributes (
 525   IN  PCI_IO_DEVICE                            *PciIoDevice,
 526   IN  UINT64                                   Attributes,
 527   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation
 528   );
 529
 530 /**
 531   Check whether this device can be enable/disable to snoop
 532
 533   @param PciIoDevice  Pci device instance
 534   @param Operation    Enable/Disable
 535
 536   @retval EFI_UNSUPPORTED  Pci device is not GFX device or not support snoop
 537   @retval EFI_SUCCESS      Snoop can be supported.
 538 **/
 539 EFI_STATUS
 540 SupportPaletteSnoopAttributes (
 541   IN  PCI_IO_DEVICE                            *PciIoDevice,
 542   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation
 543   );
 544
 545 /**
 546   Performs an operation on the attributes that this PCI controller supports. The operations include
 547   getting the set of supported attributes, retrieving the current attributes, setting the current
 548   attributes, enabling attributes, and disabling attributes.
 549
 550   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 551   @param  Operation             The operation to perform on the attributes for this PCI controller.
 552   @param  Attributes            The mask of attributes that are used for Set, Enable, and Disable
 553                                 operations.
 554   @param  Result                A pointer to the result mask of attributes that are returned for the Get
 555                                 and Supported operations.
 556
 557   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
 558   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 559   @retval EFI_UNSUPPORTED       one or more of the bits set in
 560                                 Attributes are not supported by this PCI controller or one of
 561                                 its parent bridges when Operation is Set, Enable or Disable.
 562
 563 **/
 564 EFI_STATUS
 565 EFIAPI
 566 PciIoAttributes (
 567   IN EFI_PCI_IO_PROTOCOL                       * This,
 568   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
 569   IN  UINT64                                   Attributes,
 570   OUT UINT64                                   *Result OPTIONAL
 571   );
 572
 573 /**
 574   Gets the attributes that this PCI controller supports setting on a BAR using
 575   SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
 576
 577   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 578   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 579                                 base address for resource range. The legal range for this field is 0..5.
 580   @param  Supports              A pointer to the mask of attributes that this PCI controller supports
 581                                 setting for this BAR with SetBarAttributes().
 582   @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current
 583                                 configuration of this BAR of the PCI controller.
 584
 585   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI
 586                                 controller supports are returned in Supports. If Resources
 587                                 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
 588                                 controller is currently using are returned in Resources.
 589   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
 590   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 591   @retval EFI_OUT_OF_RESOURCES  There are not enough resources available to allocate
 592                                 Resources.
 593
 594 **/
 595 EFI_STATUS
 596 EFIAPI
 597 PciIoGetBarAttributes (
 598   IN EFI_PCI_IO_PROTOCOL             * This,
 599   IN  UINT8                          BarIndex,
 600   OUT UINT64                         *Supports, OPTIONAL
 601   OUT VOID                           **Resources OPTIONAL
 602   );
 603
 604 /**
 605   Sets the attributes for a range of a BAR on a PCI controller.
 606
 607   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 608   @param  Attributes            The mask of attributes to set for the resource range specified by
 609                                 BarIndex, Offset, and Length.
 610   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 611                                 base address for resource range. The legal range for this field is 0..5.
 612   @param  Offset                A pointer to the BAR relative base address of the resource range to be
 613                                 modified by the attributes specified by Attributes.
 614   @param  Length                A pointer to the length of the resource range to be modified by the
 615                                 attributes specified by Attributes.
 616
 617   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
 618                                 range specified by BarIndex, Offset, and Length were
 619                                 set on the PCI controller, and the actual resource range is returned
 620                                 in Offset and Length.
 621   @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
 622   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 623   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
 624                                 resource range specified by BarIndex, Offset, and
 625                                 Length.
 626
 627 **/
 628 EFI_STATUS
 629 EFIAPI
 630 PciIoSetBarAttributes (
 631   IN EFI_PCI_IO_PROTOCOL              *This,
 632   IN     UINT64                       Attributes,
 633   IN     UINT8                        BarIndex,
 634   IN OUT UINT64                       *Offset,
 635   IN OUT UINT64                       *Length
 636   );
 637
 638 /**
 639   Program parent bridge's attribute recurrently.
 640
 641   @param PciIoDevice  Child Pci device instance
 642   @param Operation    The operation to perform on the attributes for this PCI controller.
 643   @param Attributes   The mask of attributes that are used for Set, Enable, and Disable
 644                       operations.
 645
 646   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
 647   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 648   @retval EFI_UNSUPPORTED       one or more of the bits set in
 649                                 Attributes are not supported by this PCI controller or one of
 650                                 its parent bridges when Operation is Set, Enable or Disable.
 651
 652 **/
 653 EFI_STATUS
 654 UpStreamBridgesAttributes (
 655   IN  PCI_IO_DEVICE                            *PciIoDevice,
 656   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
 657   IN  UINT64                                   Attributes
 658   );
 659
 660 /**
 661   Test whether two Pci device has same parent bridge.
 662
 663   @param PciDevice1  the frist pci device for testing
 664   @param PciDevice2  the second pci device for testing
 665
 666   @return whether two Pci device has same parent bridge.
 667 **/
 668 BOOLEAN
 669 PciDevicesOnTheSamePath (
 670   IN PCI_IO_DEVICE        *PciDevice1,
 671   IN PCI_IO_DEVICE        *PciDevice2
 672   );
 673
 674 #endif