IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

   1 /** @file
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciLib.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver Lib header file.
  19   Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
  20   support hot plug.
  21
  22 Revision History
  23
  24 **/
  25
  26 #ifndef _EFI_PCI_LIB_H_
  27 #define _EFI_PCI_LIB_H_
  28
  29 //
  30 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
  31 //
  32 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01
  33 #define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02
  34 #define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04
  35 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08
  36 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a
  37
  38 typedef struct {
  39   EFI_HANDLE            Handle;
  40 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
  41
  42 typedef struct {
  43   UINT32                             Bar;
  44   UINT16                             DevicePathSize;
  45   UINT16                             ReqResSize;
  46   UINT16                             AllocResSize;
  47   UINT8                              *DevicePath;
  48   UINT8                              *ReqRes;
  49   UINT8                              *AllocRes;
  50 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
  51
  52 /**
  53   Install protocol gEfiPciHotPlugRequestProtocolGuid
  54   @param Status    return status of protocol installation.
  55 **/
  56 VOID
  57 InstallHotPlugRequestProtocol (
  58   IN  EFI_STATUS                    *Status
  59   );
  60
  61 /**
  62   Retrieve the BAR information via PciIo interface.
  63
  64   @param PciIoDevice Pci device instance.
  65 **/
  66 VOID
  67 GetBackPcCardBar (
  68   IN  PCI_IO_DEVICE                  *PciIoDevice
  69   );
  70
  71 /**
  72   Remove rejected pci device from specific root bridge
  73   handle.
  74
  75   @param RootBridgeHandle  specific parent root bridge handle.
  76   @param Bridge            Bridge device instance.
  77
  78   @retval EFI_SUCCESS  Success operation.
  79 **/
  80 EFI_STATUS
  81 RemoveRejectedPciDevices (
  82   EFI_HANDLE        RootBridgeHandle,
  83   IN PCI_IO_DEVICE  *Bridge
  84   );
  85
  86 /**
  87   Wrapper function for allocating resource for pci host bridge.
  88
  89   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
  90
  91 **/
  92 EFI_STATUS
  93 PciHostBridgeResourceAllocator (
  94   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
  95   );
  96
  97 /**
  98   Wrapper function for allocating resource for pci host bridge without hotplug device support.
  99
 100   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 101
 102 **/
 103 EFI_STATUS
 104 PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
 105   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 106   );
 107
 108 /**
 109   Wrapper function for allocating resource for pci host bridge with hotplug device support.
 110
 111   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 112
 113 **/
 114 EFI_STATUS
 115 PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
 116   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 117   );
 118
 119 /**
 120   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 121   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 122
 123   @param  Bridge          Bridge device instance.
 124   @param  StartBusNumber  start point.
 125   @param  SubBusNumber    Point to sub bus number.
 126   @param  PaddedBusRange  Customized bus number.
 127
 128   @retval EFI_SUCCESS     Success.
 129   @retval EFI_DEVICE_ERROR Fail to scan bus.
 130 **/
 131 EFI_STATUS
 132 PciScanBus (
 133   IN PCI_IO_DEVICE                      *Bridge,
 134   IN UINT8                              StartBusNumber,
 135   OUT UINT8                             *SubBusNumber,
 136   OUT UINT8                             *PaddedBusRange
 137   );
 138
 139 /**
 140   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 141   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 142
 143   @param  Bridge          Bridge device instance.
 144   @param  StartBusNumber  start point.
 145   @param  SubBusNumber    Point to sub bus number.
 146   @param  PaddedBusRange  Customized bus number.
 147
 148   @retval EFI_SUCCESS     Success.
 149   @retval EFI_DEVICE_ERROR Fail to scan bus.
 150 **/
 151 EFI_STATUS
 152 PciScanBus_WithHotPlugDeviceSupport (
 153   IN PCI_IO_DEVICE                      *Bridge,
 154   IN UINT8                              StartBusNumber,
 155   OUT UINT8                             *SubBusNumber,
 156   OUT UINT8                             *PaddedBusRange
 157   );
 158
 159 /**
 160   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 161   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 162
 163   @param  Bridge          Bridge device instance.
 164   @param  StartBusNumber  start point.
 165   @param  SubBusNumber    Point to sub bus number.
 166   @param  PaddedBusRange  Customized bus number.
 167
 168   @retval EFI_SUCCESS     Success.
 169   @retval EFI_DEVICE_ERROR Fail to scan bus.
 170 **/
 171 EFI_STATUS
 172 PciScanBus_WithoutHotPlugDeviceSupport (
 173   IN PCI_IO_DEVICE                      *Bridge,
 174   IN UINT8                              StartBusNumber,
 175   OUT UINT8                             *SubBusNumber,
 176   OUT UINT8                             *PaddedBusRange
 177   );
 178
 179 /**
 180   Process Option Rom on this host bridge.
 181
 182   @param Bridge  Pci bridge device instance.
 183
 184   @retval EFI_SUCCESS Success.
 185 **/
 186 EFI_STATUS
 187 PciRootBridgeP2CProcess (
 188   IN PCI_IO_DEVICE *Bridge
 189   );
 190
 191 /**
 192   Process Option Rom on this host bridge.
 193
 194   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 195
 196   @retval EFI_NOT_FOUND Can not find the root bridge instance.
 197   @retval EFI_SUCCESS   Success process.
 198 **/
 199 EFI_STATUS
 200 PciHostBridgeP2CProcess (
 201   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 202   );
 203
 204 /**
 205   This function is used to enumerate the entire host bridge
 206   in a given platform.
 207
 208   @param PciResAlloc   A pointer to the resource allocate protocol.
 209
 210   @retval EFI_OUT_OF_RESOURCES no enough resource.
 211   @retval EFI_SUCCESS Success.
 212
 213 **/
 214 EFI_STATUS
 215 PciHostBridgeEnumerator (
 216   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc
 217   );
 218
 219 /**
 220   Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
 221
 222   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 223   @param  Width               Signifies the width of the memory operations.
 224   @param  Address             The address within the PCI configuration space for the PCI controller.
 225   @param  Count               The number of unit to be read.
 226   @param  Buffer              For read operations, the destination buffer to store the results. For
 227                               write operations, the source buffer to write data from.
 228
 229   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 230   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 231   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 232   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 233
 234 **/
 235 EFI_STATUS
 236 PciIoRead (
 237   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 238   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 239   IN       UINT32                                 Address,
 240   IN       UINTN                                  Count,
 241   IN OUT   VOID                                   *Buffer
 242   );
 243
 244 /**
 245   Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
 246
 247   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 248   @param  Width               Signifies the width of the memory operations.
 249   @param  Address             The address within the PCI configuration space for the PCI controller.
 250   @param  Count               The number of unit to be write.
 251   @param  Buffer              For read operations, the destination buffer to store the results. For
 252                               write operations, the source buffer to write data from.
 253
 254   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 255   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 256   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 257   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 258
 259 **/
 260 EFI_STATUS
 261 PciIoWrite (
 262   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 263   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 264   IN       UINT32                                 Address,
 265   IN       UINTN                                  Count,
 266   IN OUT   VOID                                   *Buffer
 267   );
 268
 269 /**
 270   Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 271
 272   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 273   @param  Pci                 A pointer to PCI_TYPE00.
 274   @param  Width               Signifies the width of the memory operations.
 275   @param  Address             The address within the PCI configuration space for the PCI controller.
 276   @param  Count               The number of unit to be write.
 277   @param  Buffer              For read operations, the destination buffer to store the results. For
 278                               write operations, the source buffer to write data from.
 279
 280   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 281   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 282   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 283   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 284
 285 **/
 286 EFI_STATUS
 287 PciRootBridgeIoWrite (
 288   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 289   IN       PCI_TYPE00                             *Pci,
 290   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 291   IN       UINT64                                 Address,
 292   IN       UINTN                                  Count,
 293   IN OUT   VOID                                   *Buffer
 294   );
 295
 296 /**
 297   Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 298
 299   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 300   @param  Pci                 A pointer to PCI_TYPE00.
 301   @param  Width               Signifies the width of the memory operations.
 302   @param  Address             The address within the PCI configuration space for the PCI controller.
 303   @param  Count               The number of unit to be read.
 304   @param  Buffer              For read operations, the destination buffer to store the results. For
 305                               write operations, the source buffer to write data from.
 306
 307   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 308   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 309   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 310   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 311
 312 **/
 313 EFI_STATUS
 314 PciRootBridgeIoRead (
 315   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 316   IN       PCI_TYPE00                             *Pci,         OPTIONAL
 317   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 318   IN       UINT64                                 Address,
 319   IN       UINTN                                  Count,
 320   IN OUT   VOID                                   *Buffer
 321   );
 322 #endif