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Build a valid device path to an EFI driver loaded from a PCI Option ROM
[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciOptionRomSupport.c
1 /**@file
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 **/
13
14 #include "pcibus.h"
15 #include "PciResourceSupport.h"
16
17 #include <IndustryStandard/Pci23.h>
18
19 //
20 // Module global for a template of the PCI option ROM Image Device Path Node
21 //
22 MEMMAP_DEVICE_PATH mPciOptionRomImageDevicePathNodeTemplate = {
23 {
24 HARDWARE_DEVICE_PATH,
25 HW_MEMMAP_DP,
26 sizeof (MEMMAP_DEVICE_PATH)
27 },
28 EfiMemoryMappedIO,
29 0,
30 0
31 };
32
33 EFI_STATUS
34 GetOpRomInfo (
35 IN PCI_IO_DEVICE *PciIoDevice
36 )
37 /*++
38
39 Routine Description:
40
41 Arguments:
42
43 Returns:
44
45 --*/
46 // TODO: PciIoDevice - add argument and description to function comment
47 // TODO: EFI_NOT_FOUND - add return value to function comment
48 // TODO: EFI_SUCCESS - add return value to function comment
49 {
50 UINT8 RomBarIndex;
51 UINT32 AllOnes;
52 UINT64 Address;
53 EFI_STATUS Status;
54 UINT8 Bus;
55 UINT8 Device;
56 UINT8 Function;
57 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
58
59 Bus = PciIoDevice->BusNumber;
60 Device = PciIoDevice->DeviceNumber;
61 Function = PciIoDevice->FunctionNumber;
62
63 PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
64
65 //
66 // offset is 0x30 if is not ppb
67 //
68
69 //
70 // 0x30
71 //
72 RomBarIndex = PCI_DEVICE_ROMBAR;
73
74 if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
75 //
76 // if is ppb
77 //
78
79 //
80 // 0x38
81 //
82 RomBarIndex = PCI_BRIDGE_ROMBAR;
83 }
84 //
85 // the bit0 is 0 to prevent the enabling of the Rom address decoder
86 //
87 AllOnes = 0xfffffffe;
88 Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);
89
90 Status = PciRootBridgeIoWrite (
91 PciRootBridgeIo,
92 &PciIoDevice->Pci,
93 EfiPciWidthUint32,
94 Address,
95 1,
96 &AllOnes
97 );
98 if (EFI_ERROR (Status)) {
99 return Status;
100 }
101
102 //
103 // read back
104 //
105 Status = PciRootBridgeIoRead (
106 PciRootBridgeIo,
107 &PciIoDevice->Pci,
108 EfiPciWidthUint32,
109 Address,
110 1,
111 &AllOnes
112 );
113 if (EFI_ERROR (Status)) {
114 return Status;
115 }
116 //
117 // Bits [1, 10] are reserved
118 //
119 AllOnes &= 0xFFFFF800;
120 if ((AllOnes == 0) || (AllOnes == 0xFFFFF800)) {
121 return EFI_NOT_FOUND;
122 }
123
124 PciIoDevice->RomSize = (UINT64) ((~AllOnes) + 1);
125 return EFI_SUCCESS;
126 }
127
128 EFI_STATUS
129 LoadOpRomImage (
130 IN PCI_IO_DEVICE *PciDevice,
131 IN UINT64 RomBase
132 )
133 /*++
134
135 Routine Description:
136
137 Load option rom image for specified PCI device
138
139 Arguments:
140
141 Returns:
142
143 --*/
144 // TODO: PciDevice - add argument and description to function comment
145 // TODO: RomBase - add argument and description to function comment
146 // TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
147 // TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
148 // TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
149 {
150 UINT8 RomBarIndex;
151 UINT8 Indicator;
152 UINT16 OffsetPcir;
153 UINT32 RomBarOffset;
154 UINT32 RomBar;
155 EFI_STATUS retStatus;
156 BOOLEAN FirstCheck;
157 UINT8 *Image;
158 PCI_EXPANSION_ROM_HEADER *RomHeader;
159 PCI_DATA_STRUCTURE *RomPcir;
160 UINT64 RomSize;
161 UINT64 RomImageSize;
162 UINT8 *RomInMemory;
163 UINT8 CodeType;
164
165 RomSize = PciDevice->RomSize;
166
167 Indicator = 0;
168 RomImageSize = 0;
169 RomInMemory = NULL;
170 CodeType = 0xFF;
171
172 //
173 // Get the RomBarIndex
174 //
175
176 //
177 // 0x30
178 //
179 RomBarIndex = PCI_DEVICE_ROMBAR;
180 if (IS_PCI_BRIDGE (&(PciDevice->Pci))) {
181 //
182 // if is ppb
183 //
184
185 //
186 // 0x38
187 //
188 RomBarIndex = PCI_BRIDGE_ROMBAR;
189 }
190 //
191 // Allocate memory for Rom header and PCIR
192 //
193 RomHeader = AllocatePool (sizeof (PCI_EXPANSION_ROM_HEADER));
194 if (RomHeader == NULL) {
195 return EFI_OUT_OF_RESOURCES;
196 }
197
198 RomPcir = AllocatePool (sizeof (PCI_DATA_STRUCTURE));
199 if (RomPcir == NULL) {
200 gBS->FreePool (RomHeader);
201 return EFI_OUT_OF_RESOURCES;
202 }
203
204 RomBar = (UINT32) RomBase;
205
206 //
207 // Enable RomBar
208 //
209 RomDecode (PciDevice, RomBarIndex, RomBar, TRUE);
210
211 RomBarOffset = RomBar;
212 retStatus = EFI_NOT_FOUND;
213 FirstCheck = TRUE;
214
215 do {
216 PciDevice->PciRootBridgeIo->Mem.Read (
217 PciDevice->PciRootBridgeIo,
218 EfiPciWidthUint8,
219 RomBarOffset,
220 sizeof (PCI_EXPANSION_ROM_HEADER),
221 (UINT8 *) RomHeader
222 );
223
224 if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
225 RomBarOffset = RomBarOffset + 512;
226 if (FirstCheck) {
227 break;
228 } else {
229 RomImageSize = RomImageSize + 512;
230 continue;
231 }
232 }
233
234 FirstCheck = FALSE;
235 OffsetPcir = RomHeader->PcirOffset;
236 PciDevice->PciRootBridgeIo->Mem.Read (
237 PciDevice->PciRootBridgeIo,
238 EfiPciWidthUint8,
239 RomBarOffset + OffsetPcir,
240 sizeof (PCI_DATA_STRUCTURE),
241 (UINT8 *) RomPcir
242 );
243 if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
244 CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
245 }
246 Indicator = RomPcir->Indicator;
247 RomImageSize = RomImageSize + RomPcir->ImageLength * 512;
248 RomBarOffset = RomBarOffset + RomPcir->ImageLength * 512;
249 } while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < RomSize));
250
251 //
252 // Some Legacy Cards do not report the correct ImageLength so used the maximum
253 // of the legacy length and the PCIR Image Length
254 //
255 if (CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
256 RomImageSize = MAX(RomImageSize, (((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512 * 512));
257 }
258
259 if (RomImageSize > 0) {
260 retStatus = EFI_SUCCESS;
261 Image = AllocatePool ((UINT32) RomImageSize);
262 if (Image == NULL) {
263 RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
264 gBS->FreePool (RomHeader);
265 gBS->FreePool (RomPcir);
266 return EFI_OUT_OF_RESOURCES;
267 }
268
269 //
270 // Copy Rom image into memory
271 //
272 PciDevice->PciRootBridgeIo->Mem.Read (
273 PciDevice->PciRootBridgeIo,
274 EfiPciWidthUint8,
275 RomBar,
276 (UINT32) RomImageSize,
277 Image
278 );
279 RomInMemory = Image;
280 }
281
282 RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
283
284 PciDevice->PciIo.RomSize = RomImageSize;
285 PciDevice->PciIo.RomImage = RomInMemory;
286
287 PciRomAddImageMapping (
288 NULL,
289 PciDevice->PciRootBridgeIo->SegmentNumber,
290 PciDevice->BusNumber,
291 PciDevice->DeviceNumber,
292 PciDevice->FunctionNumber,
293 (UINT64) (UINTN) PciDevice->PciIo.RomImage,
294 PciDevice->PciIo.RomSize
295 );
296
297 //
298 // Free allocated memory
299 //
300 gBS->FreePool (RomHeader);
301 gBS->FreePool (RomPcir);
302
303 return retStatus;
304 }
305
306 EFI_STATUS
307 RomDecode (
308 IN PCI_IO_DEVICE *PciDevice,
309 IN UINT8 RomBarIndex,
310 IN UINT32 RomBar,
311 IN BOOLEAN Enable
312 )
313 /*++
314
315 Routine Description:
316
317 Arguments:
318
319 Returns:
320
321 --*/
322 // TODO: PciDevice - add argument and description to function comment
323 // TODO: RomBarIndex - add argument and description to function comment
324 // TODO: RomBar - add argument and description to function comment
325 // TODO: Enable - add argument and description to function comment
326 // TODO: EFI_SUCCESS - add return value to function comment
327 {
328 UINT32 Value32;
329 UINT32 Offset;
330 EFI_PCI_IO_PROTOCOL *PciIo;
331
332 PciIo = &PciDevice->PciIo;
333 if (Enable) {
334 //
335 // Clear all bars
336 //
337 for (Offset = 0x10; Offset <= 0x24; Offset += sizeof (UINT32)) {
338 PciIoWrite (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllZero);
339 }
340
341 //
342 // set the Rom base address: now is hardcode
343 // enable its decoder
344 //
345 Value32 = RomBar | 0x1;
346 PciIoWrite (
347 PciIo,
348 (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
349 RomBarIndex,
350 1,
351 &Value32
352 );
353
354 //
355 // Programe all upstream bridge
356 //
357 ProgrameUpstreamBridgeForRom(PciDevice, RomBar, TRUE);
358
359 //
360 // Setting the memory space bit in the function's command register
361 //
362 PciEnableCommandRegister(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
363
364 } else {
365
366 //
367 // disable command register decode to memory
368 //
369 PciDisableCommandRegister(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
370
371 //
372 // Destroy the programmed bar in all the upstream bridge.
373 //
374 ProgrameUpstreamBridgeForRom(PciDevice, RomBar, FALSE);
375
376 //
377 // disable rom decode
378 //
379 Value32 = 0xFFFFFFFE;
380 PciIoWrite (
381 PciIo,
382 (EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
383 RomBarIndex,
384 1,
385 &Value32
386 );
387
388 }
389
390 return EFI_SUCCESS;
391
392 }
393
394 EFI_STATUS
395 ProcessOpRomImage (
396 PCI_IO_DEVICE *PciDevice
397 )
398 /*++
399
400 Routine Description:
401
402 Process the oprom image.
403
404 Arguments:
405 PciDevice A pointer to a pci device.
406
407 Returns:
408
409 EFI Status.
410
411 --*/
412 {
413 UINT8 Indicator;
414 UINT32 ImageSize;
415 UINT16 ImageOffset;
416 VOID *RomBar;
417 UINT8 *RomBarOffset;
418 EFI_HANDLE ImageHandle;
419 EFI_STATUS Status;
420 EFI_STATUS retStatus;
421 BOOLEAN FirstCheck;
422 BOOLEAN SkipImage;
423 UINT32 DestinationSize;
424 UINT32 ScratchSize;
425 UINT8 *Scratch;
426 VOID *ImageBuffer;
427 VOID *DecompressedImageBuffer;
428 UINT32 ImageLength;
429 EFI_DECOMPRESS_PROTOCOL *Decompress;
430 EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
431 PCI_DATA_STRUCTURE *Pcir;
432 EFI_DEVICE_PATH_PROTOCOL *PciOptionRomImageDevicePath;
433
434 Indicator = 0;
435
436 //
437 // Get the Address of the Rom image
438 //
439 RomBar = PciDevice->PciIo.RomImage;
440 RomBarOffset = (UINT8 *) RomBar;
441 retStatus = EFI_NOT_FOUND;
442 FirstCheck = TRUE;
443
444 do {
445 EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset;
446 if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
447 RomBarOffset = RomBarOffset + 512;
448 if (FirstCheck) {
449 break;
450 } else {
451 continue;
452 }
453 }
454
455 FirstCheck = FALSE;
456 Pcir = (PCI_DATA_STRUCTURE *) (RomBarOffset + EfiRomHeader->PcirOffset);
457 ImageSize = (UINT32) (Pcir->ImageLength * 512);
458 Indicator = Pcir->Indicator;
459
460 if ((Pcir->CodeType == PCI_CODE_TYPE_EFI_IMAGE) &&
461 (EfiRomHeader->EfiSignature == EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE)) {
462
463 if ((EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER) ||
464 (EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER)) {
465
466 ImageOffset = EfiRomHeader->EfiImageHeaderOffset;
467 ImageSize = (UINT32) (EfiRomHeader->InitializationSize * 512);
468
469 ImageBuffer = (VOID *) (RomBarOffset + ImageOffset);
470 ImageLength = ImageSize - (UINT32)ImageOffset;
471 DecompressedImageBuffer = NULL;
472
473 //
474 // decompress here if needed
475 //
476 SkipImage = FALSE;
477 if (EfiRomHeader->CompressionType > EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
478 SkipImage = TRUE;
479 }
480
481 if (EfiRomHeader->CompressionType == EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
482 Status = gBS->LocateProtocol (&gEfiDecompressProtocolGuid, NULL, (VOID **) &Decompress);
483 if (EFI_ERROR (Status)) {
484 SkipImage = TRUE;
485 } else {
486 SkipImage = TRUE;
487 Status = Decompress->GetInfo (
488 Decompress,
489 ImageBuffer,
490 ImageLength,
491 &DestinationSize,
492 &ScratchSize
493 );
494 if (!EFI_ERROR (Status)) {
495 DecompressedImageBuffer = NULL;
496 DecompressedImageBuffer = AllocatePool (DestinationSize);
497 if (DecompressedImageBuffer != NULL) {
498 Scratch = AllocatePool (ScratchSize);
499 if (Scratch != NULL) {
500 Status = Decompress->Decompress (
501 Decompress,
502 ImageBuffer,
503 ImageLength,
504 DecompressedImageBuffer,
505 DestinationSize,
506 Scratch,
507 ScratchSize
508 );
509 if (!EFI_ERROR (Status)) {
510 ImageBuffer = DecompressedImageBuffer;
511 ImageLength = DestinationSize;
512 SkipImage = FALSE;
513 }
514
515 gBS->FreePool (Scratch);
516 }
517 }
518 }
519 }
520 }
521
522 if (!SkipImage) {
523 //
524 // Build full device path to the PCI Option ROM Image being loaded
525 //
526 mPciOptionRomImageDevicePathNodeTemplate.StartingAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)RomBarOffset;
527 mPciOptionRomImageDevicePathNodeTemplate.EndingAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(RomBarOffset + ImageSize - 1);
528 PciOptionRomImageDevicePath = AppendDevicePathNode (PciDevice->DevicePath, (const EFI_DEVICE_PATH_PROTOCOL *)&mPciOptionRomImageDevicePathNodeTemplate);
529 ASSERT (PciOptionRomImageDevicePath != NULL);
530
531 //
532 // load image and start image
533 //
534 Status = gBS->LoadImage (
535 FALSE,
536 gPciBusDriverBinding.DriverBindingHandle,
537 PciOptionRomImageDevicePath,
538 ImageBuffer,
539 ImageLength,
540 &ImageHandle
541 );
542
543 //
544 // Free the device path after it has been used by LoadImage
545 //
546 gBS->FreePool (PciOptionRomImageDevicePath);
547
548 if (!EFI_ERROR (Status)) {
549 Status = gBS->StartImage (ImageHandle, NULL, NULL);
550 if (!EFI_ERROR (Status)) {
551 AddDriver (PciDevice, ImageHandle);
552 PciRomAddImageMapping (
553 ImageHandle,
554 PciDevice->PciRootBridgeIo->SegmentNumber,
555 PciDevice->BusNumber,
556 PciDevice->DeviceNumber,
557 PciDevice->FunctionNumber,
558 (UINT64) (UINTN) PciDevice->PciIo.RomImage,
559 PciDevice->PciIo.RomSize
560 );
561 retStatus = EFI_SUCCESS;
562 }
563 }
564 }
565
566 RomBarOffset = RomBarOffset + ImageSize;
567 } else {
568 RomBarOffset = RomBarOffset + ImageSize;
569 }
570 } else {
571 RomBarOffset = RomBarOffset + ImageSize;
572 }
573
574 } while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize));
575
576 return retStatus;
577
578 }