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1 /** @file
2 The incompatible PCI device list
3
4 Copyright (c) 2006 - 2007, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
16 #define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
17
18
19 #include <PiDxe.h>
20
21 #include <Library/PciIncompatibleDeviceSupportLib.h>
22 #include <Library/MemoryAllocationLib.h>
23 #include <Library/DebugLib.h>
24
25 #include <IndustryStandard/pci22.h>
26 #include <IndustryStandard/Acpi.h>
27
28
29 #define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
30 VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
31
32 #define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
33 #define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
34
35 #define DEVICE_INF_TAG 0xFFF2
36 #define DEVICE_RES_TAG 0xFFF1
37 #define LIST_END_TAG 0x0000
38
39 //
40 // descriptor for access width of incompatible PCI device
41 //
42 typedef struct {
43 UINT64 AccessType;
44 UINT64 AccessWidth;
45 EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;
46 } EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;
47
48 //
49 // descriptor for register value of incompatible PCI device
50 //
51 typedef struct {
52 UINT64 AccessType;
53 UINT64 Offset;
54 EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
55 } EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
56
57
58 //
59 // the incompatible PCI devices list for ACPI resource
60 //
61 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
62 //
63 // DEVICE_INF_TAG,
64 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
65 // DEVICE_RES_TAG,
66 // ResType, GFlag , SFlag, Granularity, RangeMin,
67 // RangeMax, Offset, AddrLen
68 //
69 //
70 // Device Adaptec 9004
71 //
72 DEVICE_INF_TAG,
73 PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
74 DEVICE_RES_TAG,
75 PCI_BAR_TYPE_IO,
76 PCI_ACPI_UNUSED,
77 PCI_ACPI_UNUSED,
78 PCI_ACPI_UNUSED,
79 PCI_ACPI_UNUSED,
80 PCI_BAR_EVEN_ALIGN,
81 PCI_BAR_ALL,
82 PCI_BAR_NOCHANGE,
83 //
84 // Device Adaptec 9005
85 //
86 DEVICE_INF_TAG,
87 PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
88 DEVICE_RES_TAG,
89 PCI_BAR_TYPE_IO,
90 PCI_ACPI_UNUSED,
91 PCI_ACPI_UNUSED,
92 PCI_ACPI_UNUSED,
93 PCI_ACPI_UNUSED,
94 PCI_BAR_EVEN_ALIGN,
95 PCI_BAR_ALL,
96 PCI_BAR_NOCHANGE,
97 //
98 // Device QLogic 1007
99 //
100 DEVICE_INF_TAG,
101 PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
102 DEVICE_RES_TAG,
103 PCI_BAR_TYPE_IO,
104 PCI_ACPI_UNUSED,
105 PCI_ACPI_UNUSED,
106 PCI_ACPI_UNUSED,
107 PCI_ACPI_UNUSED,
108 PCI_BAR_EVEN_ALIGN,
109 PCI_BAR_ALL,
110 PCI_BAR_NOCHANGE,
111 //
112 // Device Agilent 103C
113 //
114 DEVICE_INF_TAG,
115 PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
116 DEVICE_RES_TAG,
117 PCI_BAR_TYPE_IO,
118 PCI_ACPI_UNUSED,
119 PCI_ACPI_UNUSED,
120 PCI_ACPI_UNUSED,
121 PCI_ACPI_UNUSED,
122 PCI_BAR_EVEN_ALIGN,
123 PCI_BAR_ALL,
124 PCI_BAR_NOCHANGE,
125 //
126 // Device Agilent 15BC
127 //
128 DEVICE_INF_TAG,
129 PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
130 DEVICE_RES_TAG,
131 PCI_BAR_TYPE_IO,
132 PCI_ACPI_UNUSED,
133 PCI_ACPI_UNUSED,
134 PCI_ACPI_UNUSED,
135 PCI_ACPI_UNUSED,
136 PCI_BAR_EVEN_ALIGN,
137 PCI_BAR_ALL,
138 PCI_BAR_NOCHANGE,
139 //
140 // The end of the list
141 //
142 LIST_END_TAG
143 };
144
145 //
146 // the incompatible PCI devices list for the values of configuration registers
147 //
148 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
149 //
150 // DEVICE_INF_TAG,
151 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
152 // PCI_RES_TAG,
153 // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,
154 // AND_VALUE, OR_VALUE
155
156 //
157 // Device Lava 0x1407, DeviceId 0x0110
158 //
159 DEVICE_INF_TAG,
160 PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
161 DEVICE_RES_TAG,
162 PCI_REGISTER_READ,
163 PCI_CAPBILITY_POINTER_OFFSET,
164 0xffffff00,
165 VALUE_NOCARE,
166
167 //
168 // Device Lava 0x1407, DeviceId 0x0111
169 //
170 DEVICE_INF_TAG,
171 PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
172 DEVICE_RES_TAG,
173 PCI_REGISTER_READ,
174 PCI_CAPBILITY_POINTER_OFFSET,
175 0xffffff00,
176 VALUE_NOCARE,
177
178 //
179 // The end of the list
180 //
181 LIST_END_TAG
182 };
183
184 //
185 // the incompatible PCI devices list for the access width of configuration registers
186 //
187 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
188 //
189 // DEVICE_INF_TAG,
190 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
191 // DEVICE_RES_TAG,
192 // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,
193 // START_ADDRESS, END_ADDRESS,
194 // ACTUAL_PCI_ACCESS_WIDTH,
195 //
196
197 //
198 // Sample Device
199 //
200 //DEVICE_INF_TAG,
201 //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
202 //DEVICE_RES_TAG,
203 //PCI_REGISTER_READ,
204 //EfiPciWidthUint8,
205 //0,
206 //0xFF,
207 //EfiPciWidthUint32,
208 //
209
210 //
211 // The end of the list
212 //
213 LIST_END_TAG
214 };
215
216 #endif