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1 /** @file
2 The header file provides interface definitions exposed by CSM (Compatible Support Module).
3
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional
6 option ROM (OpROM).
7
8 These definitions are from Compatibility Support Module Spec Version 0.97.
9
10 Copyright (c) 2007-2009, Intel Corporation
11 All rights reserved. This program and the accompanying materials
12 are licensed and made available under the terms and conditions of the BSD License
13 which accompanies this distribution. The full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 **/
20
21 #ifndef _FRAMEWORK_LEGACY_16_H_
22 #define _FRAMEWORK_LEGACY_16_H_
23
24 #include <Base.h>
25
26 #pragma pack(1)
27
28 typedef UINT8 SERIAL_MODE;
29 typedef UINT8 PARALLEL_MODE;
30
31 #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
32
33 ///
34 /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
35 /// physical address range. It is located on a 16-byte boundary and provides the physical address of the
36 /// entry point for the Compatibility16 functions. These functions provide the platform-specific
37 /// information that is required by the generic EfiCompatibility code. The functions are invoked via
38 /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
39 /// entry point.
40 ///
41 typedef struct {
42 ///
43 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
44 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
45 ///
46 UINT32 Signature;
47
48 ///
49 /// The value required such that byte checksum of TableLength equals zero.
50 ///
51 UINT8 TableChecksum;
52
53 ///
54 /// The length of this table.
55 ///
56 UINT8 TableLength;
57
58 ///
59 /// The major EFI revision for which this table was generated.
60 ///
61 UINT8 EfiMajorRevision;
62
63 ///
64 /// The minor EFI revision for which this table was generated.
65 ///
66 UINT8 EfiMinorRevision;
67
68 ///
69 /// The major revision of this table.
70 ///
71 UINT8 TableMajorRevision;
72
73 ///
74 /// The minor revision of this table.
75 ///
76 UINT8 TableMinorRevision;
77
78 ///
79 /// Reserved for future usage.
80 ///
81 UINT16 Reserved;
82
83 ///
84 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
85 ///
86 UINT16 Compatibility16CallSegment;
87
88 ///
89 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
90 ///
91 UINT16 Compatibility16CallOffset;
92
93 ///
94 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
95 ///
96 UINT16 PnPInstallationCheckSegment;
97
98 ///
99 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
100 ///
101 UINT16 PnPInstallationCheckOffset;
102
103 ///
104 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI
105 /// Driver Execution Environment Core Interface Specification (DXE CIS).
106 ///
107 UINT32 EfiSystemTable;
108
109 ///
110 /// The address of an OEM-provided identifier string. The string is null terminated.
111 ///
112 UINT32 OemIdStringPointer;
113
114 ///
115 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
116 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
117 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
118 /// RSD PTR with either the ACPI 1.0b or 2.0 values.
119 ///
120 UINT32 AcpiRsdPtrPointer;
121
122 ///
123 /// The OEM revision number. Usage is undefined but provided for OEM module usage.
124 ///
125 UINT16 OemRevision;
126
127 ///
128 /// The 32-bit physical address where INT15 E820 data is stored within the traditional
129 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
130 /// data to the indicated area.
131 ///
132 UINT32 E820Pointer;
133
134 ///
135 /// The length of the E820 data and is filled in by the EfiCompatibility code.
136 ///
137 UINT32 E820Length;
138
139 ///
140 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
141 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
142 /// copy the data to the indicated area.
143 ///
144 UINT32 IrqRoutingTablePointer;
145
146 ///
147 /// The length of the $PIR table and is filled in by the EfiCompatibility code.
148 ///
149 UINT32 IrqRoutingTableLength;
150
151 ///
152 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
153 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.
154 ///
155 UINT32 MpTablePtr;
156
157 ///
158 /// The length of the MP table and is filled in by the EfiCompatibility code.
159 ///
160 UINT32 MpTableLength;
161
162 ///
163 /// The segment of the OEM-specific INT 15 table/code.
164 ///
165 UINT16 OemInt15Segment;
166
167 ///
168 /// The offset of the OEM-specific INT 15 table/code.
169 ///
170 UINT16 OemInt15Offset;
171
172 ///
173 /// The segment of the OEM-specific 32-bit table/code.
174 ///
175 UINT16 Oem32Segment;
176
177 ///
178 /// The offset of the OEM-specific 32-bit table/code.
179 ///
180 UINT16 Oem32Offset;
181 UINT16 Oem16Segment;
182 UINT16 Oem16Offset;
183 UINT16 TpmSegment;
184 UINT16 TpmOffset;
185
186 ///
187 /// A pointer to a string identifying the independent BIOS vendor.
188 ///
189 UINT32 IbvPointer;
190 UINT32 PciExpressBase;
191 UINT8 LastPciBus;
192 } EFI_COMPATIBILITY16_TABLE;
193
194 ///
195 /// Functions provided by the CSM binary which communicate between the EfiCompatibility
196 /// and Compatability16 code.
197 ///
198 typedef enum {
199 ///
200 /// Causes the Compatibility16 code to do any internal initialization required.
201 /// Input:
202 /// AX = Compatibility16InitializeYourself
203 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
204 /// Return:
205 /// AX = Return Status codes
206 ///
207 Compatibility16InitializeYourself = 0x0000,
208
209 ///
210 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
211 /// Input:
212 /// AX = Compatibility16UpdateBbs
213 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
214 /// Return:
215 /// AX = Returned status codes
216 ///
217 Compatibility16UpdateBbs = 0x0001,
218
219 ///
220 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
221 /// code is read/write.
222 /// Input:
223 /// AX = Compatibility16PrepareToBoot
224 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
225 /// Return:
226 /// AX = Returned status codes
227 ///
228 Compatibility16PrepareToBoot = 0x0002,
229
230 ///
231 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
232 /// Input:
233 /// AX = Compatibility16Boot
234 /// Output:
235 /// AX = Returned status codes
236 ///
237 Compatibility16Boot = 0x0003,
238
239 ///
240 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
241 /// stored in CMOS and is the priority number of the last attempted boot device.
242 /// Input:
243 /// AX = Compatibility16RetrieveLastBootDevice
244 /// Output:
245 /// AX = Returned status codes
246 /// BX = Priority number of the boot device.
247 ///
248 Compatibility16RetrieveLastBootDevice= 0x0004,
249
250 ///
251 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
252 /// Input:
253 /// AX = Compatibility16DispatchOprom
254 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
255 /// Output:
256 /// AX = Returned status codes
257 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
258 ///
259 Compatibility16DispatchOprom = 0x0005,
260
261 ///
262 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
263 /// of that region.
264 /// Input:
265 /// AX = Compatibility16GetTableAddress
266 /// BX = Allocation region
267 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
268 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
269 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
270 /// CX = Requested length in bytes.
271 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
272 /// Output:
273 /// AX = Returned status codes
274 /// DS:BX = Address of the region
275 ///
276 Compatibility16GetTableAddress = 0x0006,
277
278 ///
279 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
280 /// Input:
281 /// AX = Compatibility16SetKeyboardLeds
282 /// CL = LED status.
283 /// Bit 0 – Scroll Lock 0 = Off
284 /// Bit 1 – NumLock
285 /// Bit 2 – Caps Lock
286 /// Output:
287 /// AX = Returned status codes
288 ///
289 Compatibility16SetKeyboardLeds = 0x0007,
290
291 ///
292 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
293 /// do not have an OpROM associated with them. An example is SATA.
294 /// Input:
295 /// AX = Compatibility16InstallPciHandler
296 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
297 /// Output:
298 /// AX = Returned status codes
299 ///
300 Compatibility16InstallPciHandler = 0x0008
301 } EFI_COMPATIBILITY_FUNCTIONS;
302
303
304 ///
305 /// EFI_DISPATCH_OPROM_TABLE
306 ///
307 typedef struct {
308 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
309 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
310 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
311 UINT8 PciBus; ///< The PCI bus.
312 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
313 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
314 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
315 ///< OpROM BIOS Setup to be executed.
316 VOID *BbsTable; ///< Pointer to the BBS table.
317 UINT16 RuntimeSegment;
318 } EFI_DISPATCH_OPROM_TABLE;
319
320 ///
321 /// EFI_TO_COMPATIBILITY16_INIT_TABLE
322 ///
323 typedef struct {
324 ///
325 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
326 ///
327 UINT32 BiosLessThan1MB;
328
329 ///
330 /// Starting address of the high memory block.
331 ///
332 UINT32 HiPmmMemory;
333
334 ///
335 /// Length of high memory block.
336 ///
337 UINT32 HiPmmMemorySizeInBytes;
338
339 ///
340 /// The segment of the reverse thunk call code.
341 ///
342 UINT16 ReverseThunkCallSegment;
343
344 ///
345 /// The offset of the reverse thunk call code.
346 ///
347 UINT16 ReverseThunkCallOffset;
348
349 ///
350 /// The number of E820 entries copied to the Compatibility16 BIOS.
351 ///
352 UINT32 NumberE820Entries;
353
354 ///
355 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
356 ///
357 UINT32 OsMemoryAbove1Mb;
358
359 ///
360 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
361 ///
362 UINT32 ThunkStart;
363
364 ///
365 /// The size of the thunk code.
366 ///
367 UINT32 ThunkSizeInBytes;
368 UINT32 LowPmmMemory;
369 UINT32 LowPmmMemorySizeInBytes;
370 } EFI_TO_COMPATIBILITY16_INIT_TABLE;
371
372 ///
373 /// DEVICE_PRODUCER_SERIAL & its modes
374 ///
375 typedef struct {
376 UINT16 Address; ///< I/O address assigned to the serial port
377 UINT8 Irq; ///< IRQ assigned to the serial port.
378 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
379 } DEVICE_PRODUCER_SERIAL;
380
381 #define DEVICE_SERIAL_MODE_NORMAL 0x00
382 #define DEVICE_SERIAL_MODE_IRDA 0x01
383 #define DEVICE_SERIAL_MODE_ASK_IR 0x02
384 #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
385 #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
386
387 ///
388 /// DEVICE_PRODUCER_PARALLEL & its modes
389 ///
390 typedef struct {
391 UINT16 Address; ///< I/O address assigned to the parallel port
392 UINT8 Irq; ///< IRQ assigned to the parallel port.
393 UINT8 Dma; ///< DMA assigned to the parallel port.
394 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
395 } DEVICE_PRODUCER_PARALLEL;
396
397 #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
398 #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
399 #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
400 #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
401
402 ///
403 /// DEVICE_PRODUCER_FLOPPY
404 ///
405 typedef struct {
406 UINT16 Address; ///< I/O address assigned to the floppy
407 UINT8 Irq; ///< IRQ assigned to the floppy.
408 UINT8 Dma; ///< DMA assigned to the floppy.
409 UINT8 NumberOfFloppy; ///< Number of floppies in the system.
410 } DEVICE_PRODUCER_FLOPPY;
411
412 ///
413 /// LEGACY_DEVICE_FLAGS
414 ///
415 typedef struct {
416 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
417 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
418 UINT32 Reserved : 30; ///< Reserved for future usage.
419 } LEGACY_DEVICE_FLAGS;
420
421 ///
422 /// DEVICE_PRODUCER_DATA_HEADER
423 ///
424 typedef struct {
425 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
426 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
427 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
428 UINT8 MousePresent; ///< Flag to indicate if mouse is present.
429 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
430 } DEVICE_PRODUCER_DATA_HEADER;
431
432 ///
433 /// ATAPI_IDENTIFY
434 ///
435 typedef struct {
436 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
437 } ATAPI_IDENTIFY;
438
439 ///
440 /// HDD_INFO & its status
441 ///
442 typedef struct {
443 ///
444 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
445 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
446 /// 1 is slave.
447 ///
448 UINT16 Status;
449
450 ///
451 /// PCI bus of IDE controller.
452 ///
453 UINT32 Bus;
454
455 ///
456 /// PCI device of IDE controller.
457 ///
458 UINT32 Device;
459
460 ///
461 /// PCI function of IDE controller.
462 ///
463 UINT32 Function;
464
465 ///
466 /// Command ports base address.
467 ///
468 UINT16 CommandBaseAddress;
469
470 ///
471 /// Control ports base address.
472 ///
473 UINT16 ControlBaseAddress;
474
475 ///
476 /// Bus master address
477 ///
478 UINT16 BusMasterAddress;
479
480 UINT8 HddIrq;
481
482 ///
483 /// Data that identifies the drive data, one per possible attached drive
484 ///
485 ATAPI_IDENTIFY IdentifyDrive[2];
486 } HDD_INFO;
487
488 #define HDD_PRIMARY 0x01
489 #define HDD_SECONDARY 0x02
490 #define HDD_MASTER_ATAPI_CDROM 0x04
491 #define HDD_SLAVE_ATAPI_CDROM 0x08
492 #define HDD_MASTER_IDE 0x20
493 #define HDD_SLAVE_IDE 0x40
494 #define HDD_MASTER_ATAPI_ZIPDISK 0x10
495 #define HDD_SLAVE_ATAPI_ZIPDISK 0x80
496
497 ///
498 /// BBS_STATUS_FLAGS
499 ///
500 typedef struct {
501 UINT16 OldPosition : 4; ///< Prior priority.
502 UINT16 Reserved1 : 4; ///< Reserved for future use.
503 UINT16 Enabled : 1; ///< If 0, ignore this entry.
504 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
505 ///< 1 = Boot attempted failed.
506
507 ///
508 /// State of media present.
509 /// 00 = No bootable media is present in the device.
510 /// 01 = Unknown if a bootable media present.
511 /// 10 = Media is present and appears bootable.
512 /// 11 = Reserved.
513 ///
514 UINT16 MediaPresent : 2;
515 UINT16 Reserved2 : 4; ///< Reserved for future use.
516 } BBS_STATUS_FLAGS;
517
518 ///
519 /// BBS_TABLE, device type values & boot priority values
520 ///
521 typedef struct {
522 ///
523 /// The boot priority for this boot device. Values are defined below.
524 ///
525 UINT16 BootPriority;
526
527 ///
528 /// The PCI bus for this boot device.
529 ///
530 UINT32 Bus;
531
532 ///
533 /// The PCI device for this boot device.
534 ///
535 UINT32 Device;
536
537 ///
538 /// The PCI function for the boot device.
539 ///
540 UINT32 Function;
541
542 ///
543 /// The PCI class for this boot device.
544 ///
545 UINT8 Class;
546
547 ///
548 /// The PCI Subclass for this boot device.
549 ///
550 UINT8 SubClass;
551
552 ///
553 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
554 ///
555 UINT16 MfgStringOffset;
556
557 ///
558 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
559 ///
560 UINT16 MfgStringSegment;
561
562 ///
563 /// BBS device type. BBS device types are defined below.
564 ///
565 UINT16 DeviceType;
566
567 ///
568 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
569 ///
570 BBS_STATUS_FLAGS StatusFlags;
571
572 ///
573 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
574 /// BCV devices.
575 ///
576 UINT16 BootHandlerOffset;
577
578 ///
579 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
580 /// BCV devices.
581 ///
582 UINT16 BootHandlerSegment;
583
584 ///
585 /// Segment:offset address of an ASCIIZ description string describing this device.
586 ///
587 UINT16 DescStringOffset;
588
589 ///
590 /// Segment:offset address of an ASCIIZ description string describing this device.
591 ///
592 UINT16 DescStringSegment;
593
594 ///
595 /// Reserved.
596 ///
597 UINT32 InitPerReserved;
598
599 ///
600 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
601 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
602 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
603 ///
604 UINT32 AdditionalIrq13Handler;
605
606 ///
607 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
608 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
609 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
610 ///
611 UINT32 AdditionalIrq18Handler;
612
613 ///
614 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
615 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
616 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
617 ///
618 UINT32 AdditionalIrq19Handler;
619
620 ///
621 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
622 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
623 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
624 ///
625 UINT32 AdditionalIrq40Handler;
626 UINT8 AssignedDriveNumber;
627 UINT32 AdditionalIrq41Handler;
628 UINT32 AdditionalIrq46Handler;
629 UINT32 IBV1;
630 UINT32 IBV2;
631 } BBS_TABLE;
632
633 #define BBS_FLOPPY 0x01
634 #define BBS_HARDDISK 0x02
635 #define BBS_CDROM 0x03
636 #define BBS_PCMCIA 0x04
637 #define BBS_USB 0x05
638 #define BBS_EMBED_NETWORK 0x06
639 #define BBS_BEV_DEVICE 0x80
640 #define BBS_UNKNOWN 0xff
641
642 #define BBS_DO_NOT_BOOT_FROM 0xFFFC
643 #define BBS_LOWEST_PRIORITY 0xFFFD
644 #define BBS_UNPRIORITIZED_ENTRY 0xFFFE
645 #define BBS_IGNORE_ENTRY 0xFFFF
646
647 ///
648 /// SMM_ATTRIBUTES & relating type, port and data size constants
649 ///
650 typedef struct {
651 ///
652 /// Access mechanism used to generate the soft SMI. Defined types are below. The other
653 /// values are reserved for future usage.
654 ///
655 UINT16 Type : 3;
656
657 ///
658 /// Size of "port" in bits. Defined values are below.
659 ///
660 UINT16 PortGranularity : 3;
661
662 ///
663 /// Size of data in bits. Defined values are below.
664 ///
665 UINT16 DataGranularity : 3;
666
667 ///
668 /// Reserved for future use.
669 ///
670 UINT16 Reserved : 7;
671 } SMM_ATTRIBUTES;
672
673 #define STANDARD_IO 0x00
674 #define STANDARD_MEMORY 0x01
675
676 #define PORT_SIZE_8 0x00
677 #define PORT_SIZE_16 0x01
678 #define PORT_SIZE_32 0x02
679 #define PORT_SIZE_64 0x03
680
681 #define DATA_SIZE_8 0x00
682 #define DATA_SIZE_16 0x01
683 #define DATA_SIZE_32 0x02
684 #define DATA_SIZE_64 0x03
685
686 ///
687 /// SMM_FUNCTION & relating constants
688 ///
689 typedef struct {
690 UINT16 Function : 15;
691 UINT16 Owner : 1;
692 } SMM_FUNCTION;
693
694 #define INT15_D042 0x0000
695 #define GET_USB_BOOT_INFO 0x0001
696 #define DMI_PNP_50_57 0x0002
697
698 #define STANDARD_OWNER 0x0
699 #define OEM_OWNER 0x1
700
701 /**
702 * SMM_ENTRY
703 *
704 * This structure assumes both port and data sizes are 1. SmmAttribute must be
705 * properly to reflect that assumption.
706 **/
707 typedef struct {
708 ///
709 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
710 /// SMM_ATTRIBUTES is defined below.
711 ///
712 SMM_ATTRIBUTES SmmAttributes;
713
714 ///
715 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
716 ///
717 SMM_FUNCTION SmmFunction;
718
719 ///
720 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
721 ///
722 UINT8 SmmPort;
723
724 ///
725 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
726 ///
727 UINT8 SmmData;
728 } SMM_ENTRY;
729
730 ///
731 /// SMM_TABLE
732 ///
733 typedef struct {
734 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
735 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
736 } SMM_TABLE;
737
738 ///
739 /// UDC_ATTRIBUTES
740 ///
741 typedef struct {
742 ///
743 /// This bit set indicates that the ServiceAreaData is valid.
744 ///
745 UINT8 DirectoryServiceValidity : 1;
746
747 ///
748 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
749 /// DirectoryServiceValidity is 0.
750 ///
751 UINT8 RabcaUsedFlag : 1;
752
753 ///
754 /// This bit set indicates to execute hard disk diagnostics.
755 ///
756 UINT8 ExecuteHddDiagnosticsFlag : 1;
757
758 ///
759 /// Reserved for future use. Set to 0.
760 ///
761 UINT8 Reserved : 5;
762 } UDC_ATTRIBUTES;
763
764 ///
765 /// UD_TABLE
766 ///
767 typedef struct {
768 ///
769 /// This field contains the bit-mapped attributes of the PARTIES information. Type
770 /// UDC_ATTRIBUTES is defined below.
771 ///
772 UDC_ATTRIBUTES Attributes;
773
774 ///
775 /// This field contains the zero-based device on which the selected
776 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
777 ///
778 UINT8 DeviceNumber;
779
780 ///
781 /// This field contains the zero-based index into the BbsTable for the parent device.
782 /// This index allows the user to reference the parent device information such as PCI
783 /// bus, device function.
784 ///
785 UINT8 BbsTableEntryNumberForParentDevice;
786
787 ///
788 /// This field contains the zero-based index into the BbsTable for the boot entry.
789 ///
790 UINT8 BbsTableEntryNumberForBoot;
791
792 ///
793 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
794 ///
795 UINT8 BbsTableEntryNumberForHddDiag;
796
797 ///
798 /// The raw Beer data.
799 ///
800 UINT8 BeerData[128];
801
802 ///
803 /// The raw data of selected service area.
804 ///
805 UINT8 ServiceAreaData[64];
806 } UD_TABLE;
807
808 #define EFI_TO_LEGACY_MAJOR_VERSION 0x02
809 #define EFI_TO_LEGACY_MINOR_VERSION 0x00
810 #define MAX_IDE_CONTROLLER 8
811
812 ///
813 /// EFI_TO_COMPATIBILITY16_BOOT_TABLE
814 ///
815 typedef struct {
816 UINT16 MajorVersion; ///< The EfiCompatibility major version number.
817 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
818 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
819 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
820 UINT32 SmbiosTableLength;
821 //
822 // Legacy SIO state
823 //
824 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
825 UINT16 DevicePathType; ///< The default boot type.
826 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
827 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
828 ///< Compatibility16InitializeYourself() function.
829 //
830 // Controller & Drive Identify[2] per controller information
831 //
832 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
833 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
834 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
835 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
836 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
837 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
838 ///< memory may have been discovered.
839 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
840 ///< UD_TABLE is defined below.
841 } EFI_TO_COMPATIBILITY16_BOOT_TABLE;
842
843 ///
844 /// EFI_LEGACY_INSTALL_PCI_HANDLER
845 ///
846 typedef struct {
847 UINT8 PciBus; ///< The PCI bus of the device.
848 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
849 UINT8 PciSegment; ///< The PCI segment of the device.
850 UINT8 PciClass; ///< The PCI class code of the device.
851 UINT8 PciSubclass; ///< The PCI subclass code of the device.
852 UINT8 PciInterface; ///< The PCI interface code of the device.
853 //
854 // Primary section
855 //
856 UINT8 PrimaryIrq; ///< The primary device IRQ.
857 UINT8 PrimaryReserved; ///< Reserved.
858 UINT16 PrimaryControl; ///< The primary device control I/O base.
859 UINT16 PrimaryBase; ///< The primary device I/O base.
860 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
861 //
862 // Secondary Section
863 //
864 UINT8 SecondaryIrq; ///< The secondary device IRQ.
865 UINT8 SecondaryReserved; ///< Reserved.
866 UINT16 SecondaryControl; ///< The secondary device control I/O base.
867 UINT16 SecondaryBase; ///< The secondary device I/O base.
868 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
869 } EFI_LEGACY_INSTALL_PCI_HANDLER;
870
871 //
872 // Restore default pack value
873 //
874 #pragma pack()
875
876 #endif /* _FRAMEWORK_LEGACY_16_H_ */
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