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1 /** @file
2 The header file provides interface definitions exposed by CSM (Compatible Support Module).
3
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional
6 option ROM (OpROM).
7
8 These definitions are from Compatibility Support Module Spec Version 0.97.
9
10 Copyright (c) 2007-2009, Intel Corporation
11 All rights reserved. This program and the accompanying materials
12 are licensed and made available under the terms and conditions of the BSD License
13 which accompanies this distribution. The full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 @par Revision Reference:
20 These definitions are from Compatibility Support Module Spec
21 Version 0.97.
22
23 **/
24
25 #ifndef _FRAMEWORK_LEGACY_16_H_
26 #define _FRAMEWORK_LEGACY_16_H_
27
28 #include <Base.h>
29
30 #pragma pack(1)
31
32 typedef UINT8 SERIAL_MODE;
33 typedef UINT8 PARALLEL_MODE;
34
35 #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
36
37 ///
38 /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
39 /// physical address range. It is located on a 16-byte boundary and provides the physical address of the
40 /// entry point for the Compatibility16 functions. These functions provide the platform-specific
41 /// information that is required by the generic EfiCompatibility code. The functions are invoked via
42 /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
43 /// entry point.
44 ///
45 typedef struct {
46 ///
47 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
48 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
49 ///
50 UINT32 Signature;
51
52 ///
53 /// The value required such that byte checksum of TableLength equals zero.
54 ///
55 UINT8 TableChecksum;
56
57 ///
58 /// The length of this table.
59 ///
60 UINT8 TableLength;
61
62 ///
63 /// The major EFI revision for which this table was generated.
64 ///
65 UINT8 EfiMajorRevision;
66
67 ///
68 /// The minor EFI revision for which this table was generated.
69 ///
70 UINT8 EfiMinorRevision;
71
72 ///
73 /// The major revision of this table.
74 ///
75 UINT8 TableMajorRevision;
76
77 ///
78 /// The minor revision of this table.
79 ///
80 UINT8 TableMinorRevision;
81
82 ///
83 /// Reserved for future usage.
84 ///
85 UINT16 Reserved;
86
87 ///
88 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
89 ///
90 UINT16 Compatibility16CallSegment;
91
92 ///
93 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
94 ///
95 UINT16 Compatibility16CallOffset;
96
97 ///
98 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
99 ///
100 UINT16 PnPInstallationCheckSegment;
101
102 ///
103 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
104 ///
105 UINT16 PnPInstallationCheckOffset;
106
107 ///
108 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI
109 /// Driver Execution Environment Core Interface Specification (DXE CIS).
110 ///
111 UINT32 EfiSystemTable;
112
113 ///
114 /// The address of an OEM-provided identifier string. The string is null terminated.
115 ///
116 UINT32 OemIdStringPointer;
117
118 ///
119 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
120 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
121 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
122 /// RSD PTR with either the ACPI 1.0b or 2.0 values.
123 ///
124 UINT32 AcpiRsdPtrPointer;
125
126 ///
127 /// The OEM revision number. Usage is undefined but provided for OEM module usage.
128 ///
129 UINT16 OemRevision;
130
131 ///
132 /// The 32-bit physical address where INT15 E820 data is stored within the traditional
133 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
134 /// data to the indicated area.
135 ///
136 UINT32 E820Pointer;
137
138 ///
139 /// The length of the E820 data and is filled in by the EfiCompatibility code.
140 ///
141 UINT32 E820Length;
142
143 ///
144 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
145 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
146 /// copy the data to the indicated area.
147 ///
148 UINT32 IrqRoutingTablePointer;
149
150 ///
151 /// The length of the $PIR table and is filled in by the EfiCompatibility code.
152 ///
153 UINT32 IrqRoutingTableLength;
154
155 ///
156 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
157 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.
158 ///
159 UINT32 MpTablePtr;
160
161 ///
162 /// The length of the MP table and is filled in by the EfiCompatibility code.
163 ///
164 UINT32 MpTableLength;
165
166 ///
167 /// The segment of the OEM-specific INT table/code.
168 ///
169 UINT16 OemIntSegment;
170
171 ///
172 /// The offset of the OEM-specific INT table/code.
173 ///
174 UINT16 OemIntOffset;
175
176 ///
177 /// The segment of the OEM-specific 32-bit table/code.
178 ///
179 UINT16 Oem32Segment;
180
181 ///
182 /// The offset of the OEM-specific 32-bit table/code.
183 ///
184 UINT16 Oem32Offset;
185
186 ///
187 /// The segment of the OEM-specific 16-bit table/code.
188 ///
189 UINT16 Oem16Segment;
190
191 ///
192 /// The offset of the OEM-specific 16-bit table/code.
193 ///
194 UINT16 Oem16Offset;
195
196 ///
197 /// The segment of the TPM binary passed to 16-bit CSM.
198 ///
199 UINT16 TpmSegment;
200
201 ///
202 /// The offset of the TPM binary passed to 16-bit CSM.
203 ///
204 UINT16 TpmOffset;
205
206 ///
207 /// A pointer to a string identifying the independent BIOS vendor.
208 ///
209 UINT32 IbvPointer;
210
211 ///
212 /// This field is NULL for all systems not supporting PCI Express. This field is the base
213 /// value of the start of the PCI Express memory-mapped configuration registers and
214 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
215 /// Compatibility16InitializeYourself().
216 /// Compatibility16InitializeYourself() is defined in Compatability16
217 /// Functions.
218 ///
219 UINT32 PciExpressBase;
220
221 ///
222 /// Maximum PCI bus number assigned.
223 ///
224 UINT8 LastPciBus;
225 } EFI_COMPATIBILITY16_TABLE;
226
227 ///
228 /// Functions provided by the CSM binary which communicate between the EfiCompatibility
229 /// and Compatability16 code.
230 ///
231 /// Inconsistent with specification here:
232 /// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
233 /// has been changed to "Legacy16" since keeping backward compatible.
234 ///
235 typedef enum {
236 ///
237 /// Causes the Compatibility16 code to do any internal initialization required.
238 /// Input:
239 /// AX = Compatibility16InitializeYourself
240 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
241 /// Return:
242 /// AX = Return Status codes
243 ///
244 Legacy16InitializeYourself = 0x0000,
245
246 ///
247 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
248 /// Input:
249 /// AX = Compatibility16UpdateBbs
250 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
251 /// Return:
252 /// AX = Returned status codes
253 ///
254 Legacy16UpdateBbs = 0x0001,
255
256 ///
257 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
258 /// code is read/write.
259 /// Input:
260 /// AX = Compatibility16PrepareToBoot
261 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
262 /// Return:
263 /// AX = Returned status codes
264 ///
265 Legacy16PrepareToBoot = 0x0002,
266
267 ///
268 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
269 /// Input:
270 /// AX = Compatibility16Boot
271 /// Output:
272 /// AX = Returned status codes
273 ///
274 Legacy16Boot = 0x0003,
275
276 ///
277 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
278 /// stored in CMOS and is the priority number of the last attempted boot device.
279 /// Input:
280 /// AX = Compatibility16RetrieveLastBootDevice
281 /// Output:
282 /// AX = Returned status codes
283 /// BX = Priority number of the boot device.
284 ///
285 Legacy16RetrieveLastBootDevice = 0x0004,
286
287 ///
288 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
289 /// Input:
290 /// AX = Compatibility16DispatchOprom
291 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
292 /// Output:
293 /// AX = Returned status codes
294 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
295 ///
296 Legacy16DispatchOprom = 0x0005,
297
298 ///
299 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
300 /// of that region.
301 /// Input:
302 /// AX = Compatibility16GetTableAddress
303 /// BX = Allocation region
304 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
305 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
306 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
307 /// CX = Requested length in bytes.
308 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
309 /// Output:
310 /// AX = Returned status codes
311 /// DS:BX = Address of the region
312 ///
313 Legacy16GetTableAddress = 0x0006,
314
315 ///
316 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
317 /// Input:
318 /// AX = Compatibility16SetKeyboardLeds
319 /// CL = LED status.
320 /// Bit 0 Scroll Lock 0 = Off
321 /// Bit 1 NumLock
322 /// Bit 2 Caps Lock
323 /// Output:
324 /// AX = Returned status codes
325 ///
326 Legacy16SetKeyboardLeds = 0x0007,
327
328 ///
329 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
330 /// do not have an OpROM associated with them. An example is SATA.
331 /// Input:
332 /// AX = Compatibility16InstallPciHandler
333 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
334 /// Output:
335 /// AX = Returned status codes
336 ///
337 Legacy16InstallPciHandler = 0x0008
338 } EFI_COMPATIBILITY_FUNCTIONS;
339
340
341 ///
342 /// EFI_DISPATCH_OPROM_TABLE
343 ///
344 typedef struct {
345 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
346 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
347 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
348 UINT8 PciBus; ///< The PCI bus.
349 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
350 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
351 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
352 ///< OpROM BIOS Setup to be executed.
353 VOID *BbsTablePointer; ///< Pointer to the BBS table.
354 UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
355 ///< means that the relocation of this run time code is not supported.
356 ///< Inconsistent with specification here:
357 ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
358 ///< has been changed to "RuntimeSegment" since keeping backward compatible.
359
360 } EFI_DISPATCH_OPROM_TABLE;
361
362 ///
363 /// EFI_TO_COMPATIBILITY16_INIT_TABLE
364 ///
365 typedef struct {
366 ///
367 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
368 ///
369 UINT32 BiosLessThan1MB;
370
371 ///
372 /// Starting address of the high memory block.
373 ///
374 UINT32 HiPmmMemory;
375
376 ///
377 /// Length of high memory block.
378 ///
379 UINT32 HiPmmMemorySizeInBytes;
380
381 ///
382 /// The segment of the reverse thunk call code.
383 ///
384 UINT16 ReverseThunkCallSegment;
385
386 ///
387 /// The offset of the reverse thunk call code.
388 ///
389 UINT16 ReverseThunkCallOffset;
390
391 ///
392 /// The number of E820 entries copied to the Compatibility16 BIOS.
393 ///
394 UINT32 NumberE820Entries;
395
396 ///
397 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
398 ///
399 UINT32 OsMemoryAbove1Mb;
400
401 ///
402 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
403 ///
404 UINT32 ThunkStart;
405
406 ///
407 /// The size of the thunk code.
408 ///
409 UINT32 ThunkSizeInBytes;
410
411 ///
412 /// Starting address of memory under 1 MB.
413 ///
414 UINT32 LowPmmMemory;
415
416 ///
417 /// Length of low Memory block.
418 ///
419 UINT32 LowPmmMemorySizeInBytes;
420 } EFI_TO_COMPATIBILITY16_INIT_TABLE;
421
422 ///
423 /// DEVICE_PRODUCER_SERIAL
424 ///
425 typedef struct {
426 UINT16 Address; ///< I/O address assigned to the serial port
427 UINT8 Irq; ///< IRQ assigned to the serial port.
428 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
429 } DEVICE_PRODUCER_SERIAL;
430
431 ///
432 /// DEVICE_PRODUCER_SERIAL's modes
433 ///@{
434 #define DEVICE_SERIAL_MODE_NORMAL 0x00
435 #define DEVICE_SERIAL_MODE_IRDA 0x01
436 #define DEVICE_SERIAL_MODE_ASK_IR 0x02
437 #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
438 #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
439 ///@)
440
441 ///
442 /// DEVICE_PRODUCER_PARALLEL
443 ///
444 typedef struct {
445 UINT16 Address; ///< I/O address assigned to the parallel port
446 UINT8 Irq; ///< IRQ assigned to the parallel port.
447 UINT8 Dma; ///< DMA assigned to the parallel port.
448 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
449 } DEVICE_PRODUCER_PARALLEL;
450
451 ///
452 /// DEVICE_PRODUCER_PARALLEL's modes
453 ///@{
454 #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
455 #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
456 #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
457 #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
458 ///@}
459
460 ///
461 /// DEVICE_PRODUCER_FLOPPY
462 ///
463 typedef struct {
464 UINT16 Address; ///< I/O address assigned to the floppy
465 UINT8 Irq; ///< IRQ assigned to the floppy.
466 UINT8 Dma; ///< DMA assigned to the floppy.
467 UINT8 NumberOfFloppy; ///< Number of floppies in the system.
468 } DEVICE_PRODUCER_FLOPPY;
469
470 ///
471 /// LEGACY_DEVICE_FLAGS
472 ///
473 typedef struct {
474 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
475 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
476 UINT32 Reserved : 30; ///< Reserved for future usage.
477 } LEGACY_DEVICE_FLAGS;
478
479 ///
480 /// DEVICE_PRODUCER_DATA_HEADER
481 ///
482 typedef struct {
483 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
484 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
485 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
486 UINT8 MousePresent; ///< Flag to indicate if mouse is present.
487 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
488 } DEVICE_PRODUCER_DATA_HEADER;
489
490 ///
491 /// ATAPI_IDENTIFY
492 ///
493 typedef struct {
494 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
495 } ATAPI_IDENTIFY;
496
497 ///
498 /// HDD_INFO
499 ///
500 typedef struct {
501 ///
502 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
503 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
504 /// 1 is slave.
505 ///
506 UINT16 Status;
507
508 ///
509 /// PCI bus of IDE controller.
510 ///
511 UINT32 Bus;
512
513 ///
514 /// PCI device of IDE controller.
515 ///
516 UINT32 Device;
517
518 ///
519 /// PCI function of IDE controller.
520 ///
521 UINT32 Function;
522
523 ///
524 /// Command ports base address.
525 ///
526 UINT16 CommandBaseAddress;
527
528 ///
529 /// Control ports base address.
530 ///
531 UINT16 ControlBaseAddress;
532
533 ///
534 /// Bus master address
535 ///
536 UINT16 BusMasterAddress;
537
538 UINT8 HddIrq;
539
540 ///
541 /// Data that identifies the drive data, one per possible attached drive
542 ///
543 ATAPI_IDENTIFY IdentifyDrive[2];
544 } HDD_INFO;
545
546 ///
547 /// HDD_INFO status bits
548 ///
549 #define HDD_PRIMARY 0x01
550 #define HDD_SECONDARY 0x02
551 #define HDD_MASTER_ATAPI_CDROM 0x04
552 #define HDD_SLAVE_ATAPI_CDROM 0x08
553 #define HDD_MASTER_IDE 0x20
554 #define HDD_SLAVE_IDE 0x40
555 #define HDD_MASTER_ATAPI_ZIPDISK 0x10
556 #define HDD_SLAVE_ATAPI_ZIPDISK 0x80
557
558 ///
559 /// BBS_STATUS_FLAGS
560 ///
561 typedef struct {
562 UINT16 OldPosition : 4; ///< Prior priority.
563 UINT16 Reserved1 : 4; ///< Reserved for future use.
564 UINT16 Enabled : 1; ///< If 0, ignore this entry.
565 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
566 ///< 1 = Boot attempted failed.
567
568 ///
569 /// State of media present.
570 /// 00 = No bootable media is present in the device.
571 /// 01 = Unknown if a bootable media present.
572 /// 10 = Media is present and appears bootable.
573 /// 11 = Reserved.
574 ///
575 UINT16 MediaPresent : 2;
576 UINT16 Reserved2 : 4; ///< Reserved for future use.
577 } BBS_STATUS_FLAGS;
578
579 ///
580 /// BBS_TABLE, device type values & boot priority values
581 ///
582 typedef struct {
583 ///
584 /// The boot priority for this boot device. Values are defined below.
585 ///
586 UINT16 BootPriority;
587
588 ///
589 /// The PCI bus for this boot device.
590 ///
591 UINT32 Bus;
592
593 ///
594 /// The PCI device for this boot device.
595 ///
596 UINT32 Device;
597
598 ///
599 /// The PCI function for the boot device.
600 ///
601 UINT32 Function;
602
603 ///
604 /// The PCI class for this boot device.
605 ///
606 UINT8 Class;
607
608 ///
609 /// The PCI Subclass for this boot device.
610 ///
611 UINT8 SubClass;
612
613 ///
614 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
615 ///
616 UINT16 MfgStringOffset;
617
618 ///
619 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
620 ///
621 UINT16 MfgStringSegment;
622
623 ///
624 /// BBS device type. BBS device types are defined below.
625 ///
626 UINT16 DeviceType;
627
628 ///
629 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
630 ///
631 BBS_STATUS_FLAGS StatusFlags;
632
633 ///
634 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
635 /// BCV devices.
636 ///
637 UINT16 BootHandlerOffset;
638
639 ///
640 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
641 /// BCV devices.
642 ///
643 UINT16 BootHandlerSegment;
644
645 ///
646 /// Segment:offset address of an ASCIIZ description string describing this device.
647 ///
648 UINT16 DescStringOffset;
649
650 ///
651 /// Segment:offset address of an ASCIIZ description string describing this device.
652 ///
653 UINT16 DescStringSegment;
654
655 ///
656 /// Reserved.
657 ///
658 UINT32 InitPerReserved;
659
660 ///
661 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
662 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
663 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
664 ///
665 UINT32 AdditionalIrq13Handler;
666
667 ///
668 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
669 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
670 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
671 ///
672 UINT32 AdditionalIrq18Handler;
673
674 ///
675 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
676 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
677 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
678 ///
679 UINT32 AdditionalIrq19Handler;
680
681 ///
682 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
683 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
684 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
685 ///
686 UINT32 AdditionalIrq40Handler;
687 UINT8 AssignedDriveNumber;
688 UINT32 AdditionalIrq41Handler;
689 UINT32 AdditionalIrq46Handler;
690 UINT32 IBV1;
691 UINT32 IBV2;
692 } BBS_TABLE;
693
694 ///
695 /// BBS device type values
696 ///@{
697 #define BBS_FLOPPY 0x01
698 #define BBS_HARDDISK 0x02
699 #define BBS_CDROM 0x03
700 #define BBS_PCMCIA 0x04
701 #define BBS_USB 0x05
702 #define BBS_EMBED_NETWORK 0x06
703 #define BBS_BEV_DEVICE 0x80
704 #define BBS_UNKNOWN 0xff
705 ///@}
706
707 ///
708 /// BBS boot priority values
709 ///@{
710 #define BBS_DO_NOT_BOOT_FROM 0xFFFC
711 #define BBS_LOWEST_PRIORITY 0xFFFD
712 #define BBS_UNPRIORITIZED_ENTRY 0xFFFE
713 #define BBS_IGNORE_ENTRY 0xFFFF
714 ///@}
715
716 ///
717 /// SMM_ATTRIBUTES
718 ///
719 typedef struct {
720 ///
721 /// Access mechanism used to generate the soft SMI. Defined types are below. The other
722 /// values are reserved for future usage.
723 ///
724 UINT16 Type : 3;
725
726 ///
727 /// Size of "port" in bits. Defined values are below.
728 ///
729 UINT16 PortGranularity : 3;
730
731 ///
732 /// Size of data in bits. Defined values are below.
733 ///
734 UINT16 DataGranularity : 3;
735
736 ///
737 /// Reserved for future use.
738 ///
739 UINT16 Reserved : 7;
740 } SMM_ATTRIBUTES;
741
742 ///
743 /// SMM_ATTRIBUTES type values
744 ///@{
745 #define STANDARD_IO 0x00
746 #define STANDARD_MEMORY 0x01
747 ///@}
748
749 ///
750 /// SMM_ATTRIBUTES port size constants
751 ///@{
752 #define PORT_SIZE_8 0x00
753 #define PORT_SIZE_16 0x01
754 #define PORT_SIZE_32 0x02
755 #define PORT_SIZE_64 0x03
756 ///@}
757
758 ///
759 /// SMM_ATTRIBUTES data size constants
760 ///@{
761 #define DATA_SIZE_8 0x00
762 #define DATA_SIZE_16 0x01
763 #define DATA_SIZE_32 0x02
764 #define DATA_SIZE_64 0x03
765 ///@}
766
767 ///
768 /// SMM_FUNCTION & relating constants
769 ///
770 typedef struct {
771 UINT16 Function : 15;
772 UINT16 Owner : 1;
773 } SMM_FUNCTION;
774
775 ///
776 /// SMM_FUNCTION Function constants
777 ///@{
778 #define INT15_D042 0x0000
779 #define GET_USB_BOOT_INFO 0x0001
780 #define DMI_PNP_50_57 0x0002
781 ///@}
782
783 ///
784 /// SMM_FUNCTION Owner constants
785 ///@{
786 #define STANDARD_OWNER 0x0
787 #define OEM_OWNER 0x1
788 ///@}
789
790 /**
791 * SMM_ENTRY
792 *
793 * This structure assumes both port and data sizes are 1. SmmAttribute must be
794 * properly to reflect that assumption.
795 **/
796 typedef struct {
797 ///
798 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
799 /// SMM_ATTRIBUTES is defined below.
800 ///
801 SMM_ATTRIBUTES SmmAttributes;
802
803 ///
804 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
805 ///
806 SMM_FUNCTION SmmFunction;
807
808 ///
809 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
810 ///
811 UINT8 SmmPort;
812
813 ///
814 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
815 ///
816 UINT8 SmmData;
817 } SMM_ENTRY;
818
819 ///
820 /// SMM_TABLE
821 ///
822 typedef struct {
823 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
824 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
825 } SMM_TABLE;
826
827 ///
828 /// UDC_ATTRIBUTES
829 ///
830 typedef struct {
831 ///
832 /// This bit set indicates that the ServiceAreaData is valid.
833 ///
834 UINT8 DirectoryServiceValidity : 1;
835
836 ///
837 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
838 /// DirectoryServiceValidity is 0.
839 ///
840 UINT8 RabcaUsedFlag : 1;
841
842 ///
843 /// This bit set indicates to execute hard disk diagnostics.
844 ///
845 UINT8 ExecuteHddDiagnosticsFlag : 1;
846
847 ///
848 /// Reserved for future use. Set to 0.
849 ///
850 UINT8 Reserved : 5;
851 } UDC_ATTRIBUTES;
852
853 ///
854 /// UD_TABLE
855 ///
856 typedef struct {
857 ///
858 /// This field contains the bit-mapped attributes of the PARTIES information. Type
859 /// UDC_ATTRIBUTES is defined below.
860 ///
861 UDC_ATTRIBUTES Attributes;
862
863 ///
864 /// This field contains the zero-based device on which the selected
865 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
866 ///
867 UINT8 DeviceNumber;
868
869 ///
870 /// This field contains the zero-based index into the BbsTable for the parent device.
871 /// This index allows the user to reference the parent device information such as PCI
872 /// bus, device function.
873 ///
874 UINT8 BbsTableEntryNumberForParentDevice;
875
876 ///
877 /// This field contains the zero-based index into the BbsTable for the boot entry.
878 ///
879 UINT8 BbsTableEntryNumberForBoot;
880
881 ///
882 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
883 ///
884 UINT8 BbsTableEntryNumberForHddDiag;
885
886 ///
887 /// The raw Beer data.
888 ///
889 UINT8 BeerData[128];
890
891 ///
892 /// The raw data of selected service area.
893 ///
894 UINT8 ServiceAreaData[64];
895 } UD_TABLE;
896
897 #define EFI_TO_LEGACY_MAJOR_VERSION 0x02
898 #define EFI_TO_LEGACY_MINOR_VERSION 0x00
899 #define MAX_IDE_CONTROLLER 8
900
901 ///
902 /// EFI_TO_COMPATIBILITY16_BOOT_TABLE
903 ///
904 typedef struct {
905 UINT16 MajorVersion; ///< The EfiCompatibility major version number.
906 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
907 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
908 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
909 UINT32 SmbiosTableLength;
910 //
911 // Legacy SIO state
912 //
913 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
914 UINT16 DevicePathType; ///< The default boot type.
915 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
916 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
917 ///< Compatibility16InitializeYourself() function.
918 //
919 // Controller & Drive Identify[2] per controller information
920 //
921 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
922 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
923 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
924 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
925 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
926 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
927 ///< memory may have been discovered.
928 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
929 ///< UD_TABLE is defined below.
930 } EFI_TO_COMPATIBILITY16_BOOT_TABLE;
931
932 ///
933 /// EFI_LEGACY_INSTALL_PCI_HANDLER
934 ///
935 typedef struct {
936 UINT8 PciBus; ///< The PCI bus of the device.
937 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
938 UINT8 PciSegment; ///< The PCI segment of the device.
939 UINT8 PciClass; ///< The PCI class code of the device.
940 UINT8 PciSubclass; ///< The PCI subclass code of the device.
941 UINT8 PciInterface; ///< The PCI interface code of the device.
942 //
943 // Primary section
944 //
945 UINT8 PrimaryIrq; ///< The primary device IRQ.
946 UINT8 PrimaryReserved; ///< Reserved.
947 UINT16 PrimaryControl; ///< The primary device control I/O base.
948 UINT16 PrimaryBase; ///< The primary device I/O base.
949 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
950 //
951 // Secondary Section
952 //
953 UINT8 SecondaryIrq; ///< The secondary device IRQ.
954 UINT8 SecondaryReserved; ///< Reserved.
955 UINT16 SecondaryControl; ///< The secondary device control I/O base.
956 UINT16 SecondaryBase; ///< The secondary device I/O base.
957 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
958 } EFI_LEGACY_INSTALL_PCI_HANDLER;
959
960 //
961 // Restore default pack value
962 //
963 #pragma pack()
964
965 #endif /* _FRAMEWORK_LEGACY_16_H_ */