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1 /** @file
2 The header file provides interface definitions exposed by CSM (Compatible Support Module).
3
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional
6 option ROM (OpROM).
7
8 These definitions are from Compatibility Support Module Spec Version 0.97.
9
10 Copyright (c) 2007-2009, Intel Corporation
11 All rights reserved. This program and the accompanying materials
12 are licensed and made available under the terms and conditions of the BSD License
13 which accompanies this distribution. The full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 **/
20
21 #ifndef _FRAMEWORK_LEGACY_16_H_
22 #define _FRAMEWORK_LEGACY_16_H_
23
24 #include <Base.h>
25
26 #pragma pack(1)
27
28 typedef UINT8 SERIAL_MODE;
29 typedef UINT8 PARALLEL_MODE;
30
31 #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
32
33 ///
34 /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
35 /// physical address range. It is located on a 16-byte boundary and provides the physical address of the
36 /// entry point for the Compatibility16 functions. These functions provide the platform-specific
37 /// information that is required by the generic EfiCompatibility code. The functions are invoked via
38 /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
39 /// entry point.
40 ///
41 typedef struct {
42 ///
43 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
44 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
45 ///
46 UINT32 Signature;
47
48 ///
49 /// The value required such that byte checksum of TableLength equals zero.
50 ///
51 UINT8 TableChecksum;
52
53 ///
54 /// The length of this table.
55 ///
56 UINT8 TableLength;
57
58 ///
59 /// The major EFI revision for which this table was generated.
60 ///
61 UINT8 EfiMajorRevision;
62
63 ///
64 /// The minor EFI revision for which this table was generated.
65 ///
66 UINT8 EfiMinorRevision;
67
68 ///
69 /// The major revision of this table.
70 ///
71 UINT8 TableMajorRevision;
72
73 ///
74 /// The minor revision of this table.
75 ///
76 UINT8 TableMinorRevision;
77
78 ///
79 /// Reserved for future usage.
80 ///
81 UINT16 Reserved;
82
83 ///
84 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
85 ///
86 UINT16 Compatibility16CallSegment;
87
88 ///
89 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
90 ///
91 UINT16 Compatibility16CallOffset;
92
93 ///
94 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
95 ///
96 UINT16 PnPInstallationCheckSegment;
97
98 ///
99 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
100 ///
101 UINT16 PnPInstallationCheckOffset;
102
103 ///
104 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI
105 /// Driver Execution Environment Core Interface Specification (DXE CIS).
106 ///
107 UINT32 EfiSystemTable;
108
109 ///
110 /// The address of an OEM-provided identifier string. The string is null terminated.
111 ///
112 UINT32 OemIdStringPointer;
113
114 ///
115 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
116 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
117 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
118 /// RSD PTR with either the ACPI 1.0b or 2.0 values.
119 ///
120 UINT32 AcpiRsdPtrPointer;
121
122 ///
123 /// The OEM revision number. Usage is undefined but provided for OEM module usage.
124 ///
125 UINT16 OemRevision;
126
127 ///
128 /// The 32-bit physical address where INT15 E820 data is stored within the traditional
129 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
130 /// data to the indicated area.
131 ///
132 UINT32 E820Pointer;
133
134 ///
135 /// The length of the E820 data and is filled in by the EfiCompatibility code.
136 ///
137 UINT32 E820Length;
138
139 ///
140 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
141 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
142 /// copy the data to the indicated area.
143 ///
144 UINT32 IrqRoutingTablePointer;
145
146 ///
147 /// The length of the $PIR table and is filled in by the EfiCompatibility code.
148 ///
149 UINT32 IrqRoutingTableLength;
150
151 ///
152 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
153 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.
154 ///
155 UINT32 MpTablePtr;
156
157 ///
158 /// The length of the MP table and is filled in by the EfiCompatibility code.
159 ///
160 UINT32 MpTableLength;
161
162 ///
163 /// The segment of the OEM-specific INT table/code.
164 ///
165 UINT16 OemIntSegment;
166
167 ///
168 /// The offset of the OEM-specific INT table/code.
169 ///
170 UINT16 OemIntOffset;
171
172 ///
173 /// The segment of the OEM-specific 32-bit table/code.
174 ///
175 UINT16 Oem32Segment;
176
177 ///
178 /// The offset of the OEM-specific 32-bit table/code.
179 ///
180 UINT16 Oem32Offset;
181
182 ///
183 /// The segment of the OEM-specific 16-bit table/code.
184 ///
185 UINT16 Oem16Segment;
186
187 ///
188 /// The offset of the OEM-specific 16-bit table/code.
189 ///
190 UINT16 Oem16Offset;
191
192 ///
193 /// The segment of the TPM binary passed to 16-bit CSM.
194 ///
195 UINT16 TpmSegment;
196
197 ///
198 /// The offset of the TPM binary passed to 16-bit CSM.
199 ///
200 UINT16 TpmOffset;
201
202 ///
203 /// A pointer to a string identifying the independent BIOS vendor.
204 ///
205 UINT32 IbvPointer;
206
207 ///
208 /// This field is NULL for all systems not supporting PCI Express. This field is the base
209 /// value of the start of the PCI Express memory-mapped configuration registers and
210 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
211 /// Compatibility16InitializeYourself().
212 /// Compatibility16InitializeYourself() is defined in Compatability16
213 /// Functions.
214 ///
215 UINT32 PciExpressBase;
216
217 ///
218 /// Maximum PCI bus number assigned.
219 ///
220 UINT8 LastPciBus;
221 } EFI_COMPATIBILITY16_TABLE;
222
223 ///
224 /// Functions provided by the CSM binary which communicate between the EfiCompatibility
225 /// and Compatability16 code.
226 ///
227 typedef enum {
228 ///
229 /// Causes the Compatibility16 code to do any internal initialization required.
230 /// Input:
231 /// AX = Compatibility16InitializeYourself
232 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
233 /// Return:
234 /// AX = Return Status codes
235 ///
236 Compatibility16InitializeYourself = 0x0000,
237
238 ///
239 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
240 /// Input:
241 /// AX = Compatibility16UpdateBbs
242 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
243 /// Return:
244 /// AX = Returned status codes
245 ///
246 Compatibility16UpdateBbs = 0x0001,
247
248 ///
249 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
250 /// code is read/write.
251 /// Input:
252 /// AX = Compatibility16PrepareToBoot
253 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
254 /// Return:
255 /// AX = Returned status codes
256 ///
257 Compatibility16PrepareToBoot = 0x0002,
258
259 ///
260 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
261 /// Input:
262 /// AX = Compatibility16Boot
263 /// Output:
264 /// AX = Returned status codes
265 ///
266 Compatibility16Boot = 0x0003,
267
268 ///
269 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
270 /// stored in CMOS and is the priority number of the last attempted boot device.
271 /// Input:
272 /// AX = Compatibility16RetrieveLastBootDevice
273 /// Output:
274 /// AX = Returned status codes
275 /// BX = Priority number of the boot device.
276 ///
277 Compatibility16RetrieveLastBootDevice= 0x0004,
278
279 ///
280 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
281 /// Input:
282 /// AX = Compatibility16DispatchOprom
283 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
284 /// Output:
285 /// AX = Returned status codes
286 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
287 ///
288 Compatibility16DispatchOprom = 0x0005,
289
290 ///
291 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
292 /// of that region.
293 /// Input:
294 /// AX = Compatibility16GetTableAddress
295 /// BX = Allocation region
296 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
297 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
298 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
299 /// CX = Requested length in bytes.
300 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
301 /// Output:
302 /// AX = Returned status codes
303 /// DS:BX = Address of the region
304 ///
305 Compatibility16GetTableAddress = 0x0006,
306
307 ///
308 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
309 /// Input:
310 /// AX = Compatibility16SetKeyboardLeds
311 /// CL = LED status.
312 /// Bit 0 Scroll Lock 0 = Off
313 /// Bit 1 NumLock
314 /// Bit 2 Caps Lock
315 /// Output:
316 /// AX = Returned status codes
317 ///
318 Compatibility16SetKeyboardLeds = 0x0007,
319
320 ///
321 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
322 /// do not have an OpROM associated with them. An example is SATA.
323 /// Input:
324 /// AX = Compatibility16InstallPciHandler
325 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
326 /// Output:
327 /// AX = Returned status codes
328 ///
329 Compatibility16InstallPciHandler = 0x0008
330 } EFI_COMPATIBILITY_FUNCTIONS;
331
332
333 ///
334 /// EFI_DISPATCH_OPROM_TABLE
335 ///
336 typedef struct {
337 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
338 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
339 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
340 UINT8 PciBus; ///< The PCI bus.
341 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
342 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
343 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
344 ///< OpROM BIOS Setup to be executed.
345 VOID *BbsTablePointer; ///< Pointer to the BBS table.
346 UINT16 OpromDestinationSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
347 ///< means that the relocation of this run time code is not supported.
348 } EFI_DISPATCH_OPROM_TABLE;
349
350 ///
351 /// EFI_TO_COMPATIBILITY16_INIT_TABLE
352 ///
353 typedef struct {
354 ///
355 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
356 ///
357 UINT32 BiosLessThan1MB;
358
359 ///
360 /// Starting address of the high memory block.
361 ///
362 UINT32 HiPmmMemory;
363
364 ///
365 /// Length of high memory block.
366 ///
367 UINT32 HiPmmMemorySizeInBytes;
368
369 ///
370 /// The segment of the reverse thunk call code.
371 ///
372 UINT16 ReverseThunkCallSegment;
373
374 ///
375 /// The offset of the reverse thunk call code.
376 ///
377 UINT16 ReverseThunkCallOffset;
378
379 ///
380 /// The number of E820 entries copied to the Compatibility16 BIOS.
381 ///
382 UINT32 NumberE820Entries;
383
384 ///
385 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
386 ///
387 UINT32 OsMemoryAbove1Mb;
388
389 ///
390 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
391 ///
392 UINT32 ThunkStart;
393
394 ///
395 /// The size of the thunk code.
396 ///
397 UINT32 ThunkSizeInBytes;
398
399 ///
400 /// Starting address of memory under 1 MB.
401 ///
402 UINT32 LowPmmMemory;
403
404 ///
405 /// Length of low Memory block.
406 ///
407 UINT32 LowPmmMemorySizeInBytes;
408 } EFI_TO_COMPATIBILITY16_INIT_TABLE;
409
410 ///
411 /// DEVICE_PRODUCER_SERIAL
412 ///
413 typedef struct {
414 UINT16 Address; ///< I/O address assigned to the serial port
415 UINT8 Irq; ///< IRQ assigned to the serial port.
416 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
417 } DEVICE_PRODUCER_SERIAL;
418
419 ///
420 /// DEVICE_PRODUCER_SERIAL's modes
421 ///@{
422 #define DEVICE_SERIAL_MODE_NORMAL 0x00
423 #define DEVICE_SERIAL_MODE_IRDA 0x01
424 #define DEVICE_SERIAL_MODE_ASK_IR 0x02
425 #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
426 #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
427 ///@)
428
429 ///
430 /// DEVICE_PRODUCER_PARALLEL
431 ///
432 typedef struct {
433 UINT16 Address; ///< I/O address assigned to the parallel port
434 UINT8 Irq; ///< IRQ assigned to the parallel port.
435 UINT8 Dma; ///< DMA assigned to the parallel port.
436 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
437 } DEVICE_PRODUCER_PARALLEL;
438
439 ///
440 /// DEVICE_PRODUCER_PARALLEL's modes
441 ///@{
442 #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
443 #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
444 #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
445 #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
446 ///@}
447
448 ///
449 /// DEVICE_PRODUCER_FLOPPY
450 ///
451 typedef struct {
452 UINT16 Address; ///< I/O address assigned to the floppy
453 UINT8 Irq; ///< IRQ assigned to the floppy.
454 UINT8 Dma; ///< DMA assigned to the floppy.
455 UINT8 NumberOfFloppy; ///< Number of floppies in the system.
456 } DEVICE_PRODUCER_FLOPPY;
457
458 ///
459 /// LEGACY_DEVICE_FLAGS
460 ///
461 typedef struct {
462 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
463 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
464 UINT32 Reserved : 30; ///< Reserved for future usage.
465 } LEGACY_DEVICE_FLAGS;
466
467 ///
468 /// DEVICE_PRODUCER_DATA_HEADER
469 ///
470 typedef struct {
471 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
472 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
473 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
474 UINT8 MousePresent; ///< Flag to indicate if mouse is present.
475 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
476 } DEVICE_PRODUCER_DATA_HEADER;
477
478 ///
479 /// ATAPI_IDENTIFY
480 ///
481 typedef struct {
482 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
483 } ATAPI_IDENTIFY;
484
485 ///
486 /// HDD_INFO
487 ///
488 typedef struct {
489 ///
490 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
491 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
492 /// 1 is slave.
493 ///
494 UINT16 Status;
495
496 ///
497 /// PCI bus of IDE controller.
498 ///
499 UINT32 Bus;
500
501 ///
502 /// PCI device of IDE controller.
503 ///
504 UINT32 Device;
505
506 ///
507 /// PCI function of IDE controller.
508 ///
509 UINT32 Function;
510
511 ///
512 /// Command ports base address.
513 ///
514 UINT16 CommandBaseAddress;
515
516 ///
517 /// Control ports base address.
518 ///
519 UINT16 ControlBaseAddress;
520
521 ///
522 /// Bus master address
523 ///
524 UINT16 BusMasterAddress;
525
526 UINT8 HddIrq;
527
528 ///
529 /// Data that identifies the drive data, one per possible attached drive
530 ///
531 ATAPI_IDENTIFY IdentifyDrive[2];
532 } HDD_INFO;
533
534 ///
535 /// HDD_INFO status bits
536 ///
537 #define HDD_PRIMARY 0x01
538 #define HDD_SECONDARY 0x02
539 #define HDD_MASTER_ATAPI_CDROM 0x04
540 #define HDD_SLAVE_ATAPI_CDROM 0x08
541 #define HDD_MASTER_IDE 0x20
542 #define HDD_SLAVE_IDE 0x40
543 #define HDD_MASTER_ATAPI_ZIPDISK 0x10
544 #define HDD_SLAVE_ATAPI_ZIPDISK 0x80
545
546 ///
547 /// BBS_STATUS_FLAGS
548 ///
549 typedef struct {
550 UINT16 OldPosition : 4; ///< Prior priority.
551 UINT16 Reserved1 : 4; ///< Reserved for future use.
552 UINT16 Enabled : 1; ///< If 0, ignore this entry.
553 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
554 ///< 1 = Boot attempted failed.
555
556 ///
557 /// State of media present.
558 /// 00 = No bootable media is present in the device.
559 /// 01 = Unknown if a bootable media present.
560 /// 10 = Media is present and appears bootable.
561 /// 11 = Reserved.
562 ///
563 UINT16 MediaPresent : 2;
564 UINT16 Reserved2 : 4; ///< Reserved for future use.
565 } BBS_STATUS_FLAGS;
566
567 ///
568 /// BBS_TABLE, device type values & boot priority values
569 ///
570 typedef struct {
571 ///
572 /// The boot priority for this boot device. Values are defined below.
573 ///
574 UINT16 BootPriority;
575
576 ///
577 /// The PCI bus for this boot device.
578 ///
579 UINT32 Bus;
580
581 ///
582 /// The PCI device for this boot device.
583 ///
584 UINT32 Device;
585
586 ///
587 /// The PCI function for the boot device.
588 ///
589 UINT32 Function;
590
591 ///
592 /// The PCI class for this boot device.
593 ///
594 UINT8 Class;
595
596 ///
597 /// The PCI Subclass for this boot device.
598 ///
599 UINT8 SubClass;
600
601 ///
602 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
603 ///
604 UINT16 MfgStringOffset;
605
606 ///
607 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
608 ///
609 UINT16 MfgStringSegment;
610
611 ///
612 /// BBS device type. BBS device types are defined below.
613 ///
614 UINT16 DeviceType;
615
616 ///
617 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
618 ///
619 BBS_STATUS_FLAGS StatusFlags;
620
621 ///
622 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
623 /// BCV devices.
624 ///
625 UINT16 BootHandlerOffset;
626
627 ///
628 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
629 /// BCV devices.
630 ///
631 UINT16 BootHandlerSegment;
632
633 ///
634 /// Segment:offset address of an ASCIIZ description string describing this device.
635 ///
636 UINT16 DescStringOffset;
637
638 ///
639 /// Segment:offset address of an ASCIIZ description string describing this device.
640 ///
641 UINT16 DescStringSegment;
642
643 ///
644 /// Reserved.
645 ///
646 UINT32 InitPerReserved;
647
648 ///
649 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
650 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
651 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
652 ///
653 UINT32 AdditionalIrq13Handler;
654
655 ///
656 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
657 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
658 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
659 ///
660 UINT32 AdditionalIrq18Handler;
661
662 ///
663 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
664 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
665 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
666 ///
667 UINT32 AdditionalIrq19Handler;
668
669 ///
670 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
671 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
672 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
673 ///
674 UINT32 AdditionalIrq40Handler;
675 UINT8 AssignedDriveNumber;
676 UINT32 AdditionalIrq41Handler;
677 UINT32 AdditionalIrq46Handler;
678 UINT32 IBV1;
679 UINT32 IBV2;
680 } BBS_TABLE;
681
682 ///
683 /// BBS device type values
684 ///@{
685 #define BBS_FLOPPY 0x01
686 #define BBS_HARDDISK 0x02
687 #define BBS_CDROM 0x03
688 #define BBS_PCMCIA 0x04
689 #define BBS_USB 0x05
690 #define BBS_EMBED_NETWORK 0x06
691 #define BBS_BEV_DEVICE 0x80
692 #define BBS_UNKNOWN 0xff
693 ///@}
694
695 ///
696 /// BBS boot priority values
697 ///@{
698 #define BBS_DO_NOT_BOOT_FROM 0xFFFC
699 #define BBS_LOWEST_PRIORITY 0xFFFD
700 #define BBS_UNPRIORITIZED_ENTRY 0xFFFE
701 #define BBS_IGNORE_ENTRY 0xFFFF
702 ///@}
703
704 ///
705 /// SMM_ATTRIBUTES
706 ///
707 typedef struct {
708 ///
709 /// Access mechanism used to generate the soft SMI. Defined types are below. The other
710 /// values are reserved for future usage.
711 ///
712 UINT16 Type : 3;
713
714 ///
715 /// Size of "port" in bits. Defined values are below.
716 ///
717 UINT16 PortGranularity : 3;
718
719 ///
720 /// Size of data in bits. Defined values are below.
721 ///
722 UINT16 DataGranularity : 3;
723
724 ///
725 /// Reserved for future use.
726 ///
727 UINT16 Reserved : 7;
728 } SMM_ATTRIBUTES;
729
730 ///
731 /// SMM_ATTRIBUTES type values
732 ///@{
733 #define STANDARD_IO 0x00
734 #define STANDARD_MEMORY 0x01
735 ///@}
736
737 ///
738 /// SMM_ATTRIBUTES port size constants
739 ///@{
740 #define PORT_SIZE_8 0x00
741 #define PORT_SIZE_16 0x01
742 #define PORT_SIZE_32 0x02
743 #define PORT_SIZE_64 0x03
744 ///@}
745
746 ///
747 /// SMM_ATTRIBUTES data size constants
748 ///@{
749 #define DATA_SIZE_8 0x00
750 #define DATA_SIZE_16 0x01
751 #define DATA_SIZE_32 0x02
752 #define DATA_SIZE_64 0x03
753 ///@}
754
755 ///
756 /// SMM_FUNCTION & relating constants
757 ///
758 typedef struct {
759 UINT16 Function : 15;
760 UINT16 Owner : 1;
761 } SMM_FUNCTION;
762
763 ///
764 /// SMM_FUNCTION Function constants
765 ///@{
766 #define INT15_D042 0x0000
767 #define GET_USB_BOOT_INFO 0x0001
768 #define DMI_PNP_50_57 0x0002
769 ///@}
770
771 ///
772 /// SMM_FUNCTION Owner constants
773 ///@{
774 #define STANDARD_OWNER 0x0
775 #define OEM_OWNER 0x1
776 ///@}
777
778 /**
779 * SMM_ENTRY
780 *
781 * This structure assumes both port and data sizes are 1. SmmAttribute must be
782 * properly to reflect that assumption.
783 **/
784 typedef struct {
785 ///
786 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
787 /// SMM_ATTRIBUTES is defined below.
788 ///
789 SMM_ATTRIBUTES SmmAttributes;
790
791 ///
792 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
793 ///
794 SMM_FUNCTION SmmFunction;
795
796 ///
797 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
798 ///
799 UINT8 SmmPort;
800
801 ///
802 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
803 ///
804 UINT8 SmmData;
805 } SMM_ENTRY;
806
807 ///
808 /// SMM_TABLE
809 ///
810 typedef struct {
811 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
812 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
813 } SMM_TABLE;
814
815 ///
816 /// UDC_ATTRIBUTES
817 ///
818 typedef struct {
819 ///
820 /// This bit set indicates that the ServiceAreaData is valid.
821 ///
822 UINT8 DirectoryServiceValidity : 1;
823
824 ///
825 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
826 /// DirectoryServiceValidity is 0.
827 ///
828 UINT8 RabcaUsedFlag : 1;
829
830 ///
831 /// This bit set indicates to execute hard disk diagnostics.
832 ///
833 UINT8 ExecuteHddDiagnosticsFlag : 1;
834
835 ///
836 /// Reserved for future use. Set to 0.
837 ///
838 UINT8 Reserved : 5;
839 } UDC_ATTRIBUTES;
840
841 ///
842 /// UD_TABLE
843 ///
844 typedef struct {
845 ///
846 /// This field contains the bit-mapped attributes of the PARTIES information. Type
847 /// UDC_ATTRIBUTES is defined below.
848 ///
849 UDC_ATTRIBUTES Attributes;
850
851 ///
852 /// This field contains the zero-based device on which the selected
853 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
854 ///
855 UINT8 DeviceNumber;
856
857 ///
858 /// This field contains the zero-based index into the BbsTable for the parent device.
859 /// This index allows the user to reference the parent device information such as PCI
860 /// bus, device function.
861 ///
862 UINT8 BbsTableEntryNumberForParentDevice;
863
864 ///
865 /// This field contains the zero-based index into the BbsTable for the boot entry.
866 ///
867 UINT8 BbsTableEntryNumberForBoot;
868
869 ///
870 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
871 ///
872 UINT8 BbsTableEntryNumberForHddDiag;
873
874 ///
875 /// The raw Beer data.
876 ///
877 UINT8 BeerData[128];
878
879 ///
880 /// The raw data of selected service area.
881 ///
882 UINT8 ServiceAreaData[64];
883 } UD_TABLE;
884
885 #define EFI_TO_LEGACY_MAJOR_VERSION 0x02
886 #define EFI_TO_LEGACY_MINOR_VERSION 0x00
887 #define MAX_IDE_CONTROLLER 8
888
889 ///
890 /// EFI_TO_COMPATIBILITY16_BOOT_TABLE
891 ///
892 typedef struct {
893 UINT16 MajorVersion; ///< The EfiCompatibility major version number.
894 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
895 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
896 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
897 UINT32 SmbiosTableLength;
898 //
899 // Legacy SIO state
900 //
901 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
902 UINT16 DevicePathType; ///< The default boot type.
903 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
904 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
905 ///< Compatibility16InitializeYourself() function.
906 //
907 // Controller & Drive Identify[2] per controller information
908 //
909 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
910 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
911 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
912 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
913 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
914 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
915 ///< memory may have been discovered.
916 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
917 ///< UD_TABLE is defined below.
918 } EFI_TO_COMPATIBILITY16_BOOT_TABLE;
919
920 ///
921 /// EFI_LEGACY_INSTALL_PCI_HANDLER
922 ///
923 typedef struct {
924 UINT8 PciBus; ///< The PCI bus of the device.
925 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
926 UINT8 PciSegment; ///< The PCI segment of the device.
927 UINT8 PciClass; ///< The PCI class code of the device.
928 UINT8 PciSubclass; ///< The PCI subclass code of the device.
929 UINT8 PciInterface; ///< The PCI interface code of the device.
930 //
931 // Primary section
932 //
933 UINT8 PrimaryIrq; ///< The primary device IRQ.
934 UINT8 PrimaryReserved; ///< Reserved.
935 UINT16 PrimaryControl; ///< The primary device control I/O base.
936 UINT16 PrimaryBase; ///< The primary device I/O base.
937 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
938 //
939 // Secondary Section
940 //
941 UINT8 SecondaryIrq; ///< The secondary device IRQ.
942 UINT8 SecondaryReserved; ///< Reserved.
943 UINT16 SecondaryControl; ///< The secondary device control I/O base.
944 UINT16 SecondaryBase; ///< The secondary device I/O base.
945 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
946 } EFI_LEGACY_INSTALL_PCI_HANDLER;
947
948 //
949 // Restore default pack value
950 //
951 #pragma pack()
952
953 #endif /* _FRAMEWORK_LEGACY_16_H_ */