IntelFrameworkPkg/Include/Ppi/PciCfg.h

   1 /** @file
   2   This file declares PciCfg PPI used to access PCI configuration space in PEI
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   Module Name:  PciCfg.h
  14
  15   @par Revision Reference:
  16   This PPI is defined in PEI CIS
  17   Version 0.91.
  18
  19 **/
  20
  21 #ifndef __PEI_PCI_CFG_H__
  22 #define __PEI_PCI_CFG_H__
  23
  24 #include <Pi/PiPeiCis.h>
  25 //
  26 // Get the common definitions for EFI_PEI_PCI_CFG_PPI_WIDTH.
  27 //
  28 #include <Ppi/PciCfg2.h>
  29
  30 #define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \
  31   { \
  32     0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \
  33   }
  34
  35 typedef struct _EFI_PEI_PCI_CFG_PPI   EFI_PEI_PCI_CFG_PPI;
  36
  37 #define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg)  ( \
  38       (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
  39     ) & 0x00000000ffffffff
  40
  41 /**
  42   PCI read and write operation.
  43
  44   @param  PeiServices    An indirect pointer to the PEI Services Table
  45                          published by the PEI Foundation.
  46   @param  This           Pointer to local data for the interface.
  47   @param  Width          The width of the access. Enumerated in bytes.
  48   @param  Address        The physical address of the access.
  49   @param  Buffer         A pointer to the buffer of data.
  50
  51   @retval EFI_SUCCESS           The function completed successfully.
  52   @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
  53
  54 **/
  55 typedef
  56 EFI_STATUS
  57 (EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (
  58   IN EFI_PEI_SERVICES             **PeiServices,
  59   IN EFI_PEI_PCI_CFG_PPI          *This,
  60   IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,
  61   IN UINT64                       Address,
  62   IN OUT VOID                     *Buffer
  63   );
  64
  65 /**
  66   PCI read-modify-write operation.
  67
  68   @param  PeiServices    An indirect pointer to the PEI Services Table
  69                          published by the PEI Foundation.
  70   @param  This           Pointer to local data for the interface.
  71   @param  Width          The width of the access. Enumerated in bytes.
  72   @param  Address        The physical address of the access.
  73   @param  SetBits        Value of the bits to set.
  74   @param  ClearBits      Value of the bits to clear.
  75
  76   @retval EFI_SUCCESS           The function completed successfully.
  77
  78 **/
  79 typedef
  80 EFI_STATUS
  81 (EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (
  82   IN EFI_PEI_SERVICES             **PeiServices,
  83   IN EFI_PEI_PCI_CFG_PPI          *This,
  84   IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,
  85   IN UINT64                       Address,
  86   IN UINTN                        SetBits,
  87   IN UINTN                        ClearBits
  88   );
  89
  90 /**
  91   The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
  92   controllers behind a PCI root bridge controller.
  93
  94   @param Read
  95   PCI read services.  See the Read() function description.
  96
  97   @param Write
  98   PCI write services.  See the Write() function description.
  99
 100   @param Modify
 101   PCI read-modify-write services.  See the Modify() function description.
 102
 103 **/
 104 struct _EFI_PEI_PCI_CFG_PPI {
 105   EFI_PEI_PCI_CFG_PPI_IO  Read;
 106   EFI_PEI_PCI_CFG_PPI_IO  Write;
 107   EFI_PEI_PCI_CFG_PPI_RW  Modify;
 108 };
 109
 110 extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;
 111
 112 #endif