2 Intel FSP Header File definition from Intel Firmware Support Package External
3 Architecture Specification v2.0.
5 Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef __FSP_HEADER_FILE_H__
11 #define __FSP_HEADER_FILE_H__
13 #define FSP_HEADER_REVISION_3 3
15 #define FSPE_HEADER_REVISION_1 1
16 #define FSPP_HEADER_REVISION_1 1
19 /// Fixed FSP header offset in the FSP image
21 #define FSP_INFO_HEADER_OFF 0x94
23 #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
25 #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
30 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
34 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.
38 /// Byte 0x04: Length of the FSP Information Header.
42 /// Byte 0x08: Reserved.
46 /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.
50 /// Byte 0x0B: Revision of the FSP Information Header.
54 /// Byte 0x0C: Revision of the FSP binary.
58 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.
62 /// Byte 0x18: Size of the entire FSP binary.
66 /// Byte 0x1C: FSP binary preferred base address.
70 /// Byte 0x20: Attribute for the FSP binary.
72 UINT16 ImageAttribute
;
74 /// Byte 0x22: Attributes of the FSP Component.
76 UINT16 ComponentAttribute
;
78 /// Byte 0x24: Offset of the FSP configuration region.
80 UINT32 CfgRegionOffset
;
82 /// Byte 0x28: Size of the FSP configuration region.
86 /// Byte 0x2C: Reserved2.
90 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.
92 UINT32 TempRamInitEntryOffset
;
94 /// Byte 0x34: Reserved3.
98 /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.
100 UINT32 NotifyPhaseEntryOffset
;
102 /// Byte 0x3C: The offset for the API to initialize the memory.
104 UINT32 FspMemoryInitEntryOffset
;
106 /// Byte 0x40: The offset for the API to tear down temporary RAM.
108 UINT32 TempRamExitEntryOffset
;
110 /// Byte 0x44: The offset for the API to initialize the CPU and chipset.
112 UINT32 FspSiliconInitEntryOffset
;
116 /// Signature of the FSP Extended Header
118 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')
121 /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.
125 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.
129 /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
133 /// Byte 0x08: FSP producer defined revision of the table.
137 /// Byte 0x09: Reserved for future use.
141 /// Byte 0x0A: FSP producer identification string
143 CHAR8 FspProducerId
[6];
145 /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
147 UINT32 FspProducerRevision
;
149 /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
151 UINT32 FspProducerDataSize
;
153 /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
155 } FSP_INFO_EXTENDED_HEADER
;
158 // A generic table search algorithm for additional tables can be implemented with a
159 // signature search algorithm until a terminator signature 'FSPP' is found.
161 #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')
162 #define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE
165 /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.
169 /// Byte 0x00: FSP Patch Table Signature "FSPP".
173 /// Byte 0x04: Size including the PatchData.
177 /// Byte 0x06: Revision is set to 0x01.
179 UINT8 HeaderRevision
;
181 /// Byte 0x07: Reserved for future use.
185 /// Byte 0x08: Number of entries to Patch.
187 UINT32 PatchEntryNum
;
189 /// Byte 0x0C: Patch Data.
191 //UINT32 PatchData[];
196 extern EFI_GUID gFspHeaderFileGuid
;