]> git.proxmox.com Git - mirror_edk2.git/blob - IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
IntelFsp2Pkg: FspSecCore support for X64
[mirror_edk2.git] / IntelFsp2Pkg / Include / Guid / FspHeaderFile.h
1 /** @file
2 Intel FSP Header File definition from Intel Firmware Support Package External
3 Architecture Specification v2.0 and above.
4
5 Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9
10 #include <Base.h>
11
12 #ifndef __FSP_HEADER_FILE_H__
13 #define __FSP_HEADER_FILE_H__
14
15 #define FSP_HEADER_REVISION_3 3
16
17 #define FSPE_HEADER_REVISION_1 1
18 #define FSPP_HEADER_REVISION_1 1
19
20 ///
21 /// Fixed FSP header offset in the FSP image
22 ///
23 #define FSP_INFO_HEADER_OFF 0x94
24
25 #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
26
27 #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
28
29 #define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT BIT0
30 #define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT BIT1
31 #define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT BIT2
32 #define FSP_IA32 0
33 #define FSP_X64 1
34
35 #pragma pack(1)
36
37 ///
38 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
39 ///
40 typedef struct {
41 ///
42 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.
43 ///
44 UINT32 Signature;
45 ///
46 /// Byte 0x04: Length of the FSP Information Header.
47 ///
48 UINT32 HeaderLength;
49 ///
50 /// Byte 0x08: Reserved.
51 ///
52 UINT8 Reserved1[2];
53 ///
54 /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.
55 /// For revision v2.3 the value will be 0x23.
56 ///
57 UINT8 SpecVersion;
58 ///
59 /// Byte 0x0B: Revision of the FSP Information Header.
60 /// The Current value for this field is 0x7.
61 ///
62 UINT8 HeaderRevision;
63 ///
64 /// Byte 0x0C: Revision of the FSP binary.
65 /// Major.Minor.Revision.Build
66 /// If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows:
67 /// 7 : 0 - Build Number
68 /// 15 : 8 - Revision
69 /// 23 : 16 - Minor Version
70 /// 31 : 24 - Major Version
71 /// If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision
72 /// while ExtendedImageRevision specifies the high-order bytes of the build number and revision.
73 /// 7 : 0 - Low Byte of Build Number
74 /// 15 : 8 - Low Byte of Revision
75 /// 23 : 16 - Minor Version
76 /// 31 : 24 - Major Version
77 ///
78 UINT32 ImageRevision;
79 ///
80 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.
81 ///
82 CHAR8 ImageId[8];
83 ///
84 /// Byte 0x18: Size of the entire FSP binary.
85 ///
86 UINT32 ImageSize;
87 ///
88 /// Byte 0x1C: FSP binary preferred base address.
89 ///
90 UINT32 ImageBase;
91 ///
92 /// Byte 0x20: Attribute for the FSP binary.
93 /// Bit 0: Graphics Support - Set to 1 when FSP supports enabling Graphics Display.
94 /// Bit 1: Dispatch Mode Support - Set to 1 when FSP supports the optional Dispatch Mode API defined in Section 7.2 and 9. This bit is only valid if FSP HeaderRevision is >= 4.
95 /// Bit 2: 64-bit mode support - Set to 1 to indicate FSP supports 64-bit long mode interfaces. Set to 0 to indicate FSP supports 32-bit mode interfaces. This bit is only valid if FSP HeaderRevision is >= 7.
96 /// Bits 15:3 - Reserved
97 ///
98 UINT16 ImageAttribute;
99 ///
100 /// Byte 0x22: Attributes of the FSP Component.
101 ///
102 UINT16 ComponentAttribute;
103 ///
104 /// Byte 0x24: Offset of the FSP configuration region.
105 ///
106 UINT32 CfgRegionOffset;
107 ///
108 /// Byte 0x28: Size of the FSP configuration region.
109 ///
110 UINT32 CfgRegionSize;
111 ///
112 /// Byte 0x2C: Reserved2.
113 ///
114 UINT32 Reserved2;
115 ///
116 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.
117 ///
118 UINT32 TempRamInitEntryOffset;
119 ///
120 /// Byte 0x34: Reserved3.
121 ///
122 UINT32 Reserved3;
123 ///
124 /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.
125 ///
126 UINT32 NotifyPhaseEntryOffset;
127 ///
128 /// Byte 0x3C: The offset for the API to initialize the memory.
129 ///
130 UINT32 FspMemoryInitEntryOffset;
131 ///
132 /// Byte 0x40: The offset for the API to tear down temporary RAM.
133 ///
134 UINT32 TempRamExitEntryOffset;
135 ///
136 /// Byte 0x44: The offset for the API to initialize the CPU and chipset.
137 ///
138 UINT32 FspSiliconInitEntryOffset;
139 ///
140 /// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization.
141 /// This value is only valid if FSP HeaderRevision is >= 5.
142 /// If the value is set to 0x00000000, then this API is not available in this component.
143 ///
144 UINT32 FspMultiPhaseSiInitEntryOffset;
145 ///
146 /// Byte 0x4C: Extended revision of the FSP binary.
147 /// This value is only valid if FSP HeaderRevision is >= 6.
148 /// ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision.
149 /// 7 : 0 - High Byte of Build Number
150 /// 15 : 8 - High Byte of Revision
151 /// The FSP binary build number can be decoded as follows:
152 /// Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0]
153 /// Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8]
154 /// Minor Version = ImageRevision[23:16]
155 /// Major Version = ImageRevision[31:24]
156 ///
157 UINT16 ExtendedImageRevision;
158 ///
159 /// Byte 0x4E: Reserved4.
160 ///
161 UINT16 Reserved4;
162 } FSP_INFO_HEADER;
163
164 ///
165 /// Signature of the FSP Extended Header
166 ///
167 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')
168
169 ///
170 /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.
171 ///
172 typedef struct {
173 ///
174 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.
175 ///
176 UINT32 Signature;
177 ///
178 /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
179 ///
180 UINT32 Length;
181 ///
182 /// Byte 0x08: FSP producer defined revision of the table.
183 ///
184 UINT8 Revision;
185 ///
186 /// Byte 0x09: Reserved for future use.
187 ///
188 UINT8 Reserved;
189 ///
190 /// Byte 0x0A: FSP producer identification string
191 ///
192 CHAR8 FspProducerId[6];
193 ///
194 /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
195 ///
196 UINT32 FspProducerRevision;
197 ///
198 /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
199 ///
200 UINT32 FspProducerDataSize;
201 ///
202 /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
203 ///
204 } FSP_INFO_EXTENDED_HEADER;
205
206 //
207 // A generic table search algorithm for additional tables can be implemented with a
208 // signature search algorithm until a terminator signature 'FSPP' is found.
209 //
210 #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')
211 #define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE
212
213 ///
214 /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.
215 ///
216 typedef struct {
217 ///
218 /// Byte 0x00: FSP Patch Table Signature "FSPP".
219 ///
220 UINT32 Signature;
221 ///
222 /// Byte 0x04: Size including the PatchData.
223 ///
224 UINT16 HeaderLength;
225 ///
226 /// Byte 0x06: Revision is set to 0x01.
227 ///
228 UINT8 HeaderRevision;
229 ///
230 /// Byte 0x07: Reserved for future use.
231 ///
232 UINT8 Reserved;
233 ///
234 /// Byte 0x08: Number of entries to Patch.
235 ///
236 UINT32 PatchEntryNum;
237 ///
238 /// Byte 0x0C: Patch Data.
239 ///
240 // UINT32 PatchData[];
241 } FSP_PATCH_TABLE;
242
243 #pragma pack()
244
245 extern EFI_GUID gFspHeaderFileGuid;
246
247 #endif