IntelFsp2Pkg/Include/Guid/FspHeaderFile.h

   1 /** @file
   2   Intel FSP Header File definition from Intel Firmware Support Package External
   3   Architecture Specification v2.0 and above.
   4
   5   Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9
  10 #ifndef __FSP_HEADER_FILE_H__
  11 #define __FSP_HEADER_FILE_H__
  12
  13 #define FSP_HEADER_REVISION_3   3
  14
  15 #define FSPE_HEADER_REVISION_1  1
  16 #define FSPP_HEADER_REVISION_1  1
  17
  18 ///
  19 /// Fixed FSP header offset in the FSP image
  20 ///
  21 #define FSP_INFO_HEADER_OFF    0x94
  22
  23 #define OFFSET_IN_FSP_INFO_HEADER(x)  (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
  24
  25 #define FSP_INFO_HEADER_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'H')
  26
  27 #pragma pack(1)
  28
  29 ///
  30 /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1.
  31 ///
  32 typedef struct {
  33   ///
  34   /// Byte 0x00: Signature ('FSPH') for the FSP Information Header.
  35   ///
  36   UINT32  Signature;
  37   ///
  38   /// Byte 0x04: Length of the FSP Information Header.
  39   ///
  40   UINT32  HeaderLength;
  41   ///
  42   /// Byte 0x08: Reserved.
  43   ///
  44   UINT8   Reserved1[2];
  45   ///
  46   /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.
  47   ///            For revision v2.3 the value will be 0x23.
  48   ///
  49   UINT8   SpecVersion;
  50   ///
  51   /// Byte 0x0B: Revision of the FSP Information Header.
  52   ///            The Current value for this field is 0x6.
  53   ///
  54   UINT8   HeaderRevision;
  55   ///
  56   /// Byte 0x0C: Revision of the FSP binary.
  57   ///            Major.Minor.Revision.Build
  58   ///            If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows:
  59   ///               7 : 0  - Build Number
  60   ///              15 : 8  - Revision
  61   ///              23 : 16 - Minor Version
  62   ///              31 : 24 - Major Version
  63   ///            If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision
  64   ///            while ExtendedImageRevision specifies the high-order bytes of the build number and revision.
  65   ///               7 : 0  - Low Byte of Build Number
  66   ///              15 : 8  - Low Byte of Revision
  67   ///              23 : 16 - Minor Version
  68   ///              31 : 24 - Major Version
  69   ///
  70   UINT32  ImageRevision;
  71   ///
  72   /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration.
  73   ///
  74   CHAR8   ImageId[8];
  75   ///
  76   /// Byte 0x18: Size of the entire FSP binary.
  77   ///
  78   UINT32  ImageSize;
  79   ///
  80   /// Byte 0x1C: FSP binary preferred base address.
  81   ///
  82   UINT32  ImageBase;
  83   ///
  84   /// Byte 0x20: Attribute for the FSP binary.
  85   ///
  86   UINT16  ImageAttribute;
  87   ///
  88   /// Byte 0x22: Attributes of the FSP Component.
  89   ///
  90   UINT16  ComponentAttribute;
  91   ///
  92   /// Byte 0x24: Offset of the FSP configuration region.
  93   ///
  94   UINT32  CfgRegionOffset;
  95   ///
  96   /// Byte 0x28: Size of the FSP configuration region.
  97   ///
  98   UINT32  CfgRegionSize;
  99   ///
 100   /// Byte 0x2C: Reserved2.
 101   ///
 102   UINT32  Reserved2;
 103   ///
 104   /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized.
 105   ///
 106   UINT32  TempRamInitEntryOffset;
 107   ///
 108   /// Byte 0x34: Reserved3.
 109   ///
 110   UINT32  Reserved3;
 111   ///
 112   /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process.
 113   ///
 114   UINT32  NotifyPhaseEntryOffset;
 115   ///
 116   /// Byte 0x3C: The offset for the API to initialize the memory.
 117   ///
 118   UINT32  FspMemoryInitEntryOffset;
 119   ///
 120   /// Byte 0x40: The offset for the API to tear down temporary RAM.
 121   ///
 122   UINT32  TempRamExitEntryOffset;
 123   ///
 124   /// Byte 0x44: The offset for the API to initialize the CPU and chipset.
 125   ///
 126   UINT32  FspSiliconInitEntryOffset;
 127   ///
 128   /// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization.
 129   ///            This value is only valid if FSP HeaderRevision is >= 5.
 130   ///            If the value is set to 0x00000000, then this API is not available in this component.
 131   ///
 132   UINT32  FspMultiPhaseSiInitEntryOffset;
 133   ///
 134   /// Byte 0x4C: Extended revision of the FSP binary.
 135   ///            This value is only valid if FSP HeaderRevision is >= 6.
 136   ///            ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision.
 137   ///               7 : 0 - High Byte of Build Number
 138   ///              15 : 8 - High Byte of Revision
 139   ///            The FSP binary build number can be decoded as follows:
 140   ///            Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0]
 141   ///            Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8]
 142   ///            Minor Version = ImageRevision[23:16]
 143   ///            Major Version = ImageRevision[31:24]
 144   ///
 145   UINT16  ExtendedImageRevision;
 146   ///
 147   /// Byte 0x4E: Reserved4.
 148   ///
 149   UINT16  Reserved4;
 150 } FSP_INFO_HEADER;
 151
 152 ///
 153 /// Signature of the FSP Extended Header
 154 ///
 155 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'E')
 156
 157 ///
 158 /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2.
 159 ///
 160 typedef struct {
 161   ///
 162   /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header.
 163   ///
 164   UINT32  Signature;
 165   ///
 166   /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
 167   ///
 168   UINT32  Length;
 169   ///
 170   /// Byte 0x08: FSP producer defined revision of the table.
 171   ///
 172   UINT8   Revision;
 173   ///
 174   /// Byte 0x09: Reserved for future use.
 175   ///
 176   UINT8   Reserved;
 177   ///
 178   /// Byte 0x0A: FSP producer identification string
 179   ///
 180   CHAR8   FspProducerId[6];
 181   ///
 182   /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
 183   ///
 184   UINT32  FspProducerRevision;
 185   ///
 186   /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
 187   ///
 188   UINT32  FspProducerDataSize;
 189   ///
 190   /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
 191   ///
 192 } FSP_INFO_EXTENDED_HEADER;
 193
 194 //
 195 // A generic table search algorithm for additional tables can be implemented with a
 196 // signature search algorithm until a terminator signature 'FSPP' is found.
 197 //
 198 #define FSP_FSPP_SIGNATURE  SIGNATURE_32 ('F', 'S', 'P', 'P')
 199 #define FSP_PATCH_TABLE_SIGNATURE  FSP_FSPP_SIGNATURE
 200
 201 ///
 202 /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5.
 203 ///
 204 typedef struct {
 205   ///
 206   /// Byte 0x00: FSP Patch Table Signature "FSPP".
 207   ///
 208   UINT32  Signature;
 209   ///
 210   /// Byte 0x04: Size including the PatchData.
 211   ///
 212   UINT16  HeaderLength;
 213   ///
 214   /// Byte 0x06: Revision is set to 0x01.
 215   ///
 216   UINT8   HeaderRevision;
 217   ///
 218   /// Byte 0x07: Reserved for future use.
 219   ///
 220   UINT8   Reserved;
 221   ///
 222   /// Byte 0x08: Number of entries to Patch.
 223   ///
 224   UINT32  PatchEntryNum;
 225   ///
 226   /// Byte 0x0C: Patch Data.
 227   ///
 228 //UINT32  PatchData[];
 229 } FSP_PATCH_TABLE;
 230
 231 #pragma pack()
 232
 233 extern EFI_GUID gFspHeaderFileGuid;
 234
 235 #endif