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1 /** @file
2 Header file for FSP-M Arch Config PPI for Dispatch mode
3
4 @copyright
5 Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
6
7 This program and the accompanying materials are licensed and made available under
8 the terms and conditions of the BSD License which accompanies this distribution.
9 The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _FSPM_ARCH_CONFIG_PPI_H_
18 #define _FSPM_ARCH_CONFIG_PPI_H_
19
20 #define FSPM_ARCH_CONFIG_PPI_REVISION 0x1
21
22 ///
23 /// Global ID for the FSPM_ARCH_CONFIG_PPI.
24 ///
25 #define FSPM_ARCH_CONFIG_GUID \
26 { \
27 0x824d5a3a, 0xaf92, 0x4c0c, { 0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb } \
28 }
29
30 ///
31 /// This PPI provides FSP-M Arch Config PPI.
32 ///
33 typedef struct {
34 ///
35 /// Revision of the structure
36 ///
37 UINT8 Revision;
38 UINT8 Reserved[3];
39 ///
40 /// Pointer to the non-volatile storage (NVS) data buffer.
41 /// If it is NULL it indicates the NVS data is not available.
42 ///
43 VOID *NvsBufferPtr;
44 ///
45 /// Size of memory to be reserved by FSP below "top
46 /// of low usable memory" for bootloader usage.
47 ///
48 UINT32 BootLoaderTolumSize;
49 UINT8 Reserved1[4];
50 } FSPM_ARCH_CONFIG_PPI;
51
52 extern EFI_GUID gFspmArchConfigPpiGuid;
53
54 #endif // _FSPM_ARCH_CONFIG_PPI_H_