MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h

   1 /** @file
   2
   3   Provides some data struct used by EHCI controller driver.
   4
   5 Copyright (c) 2006 - 2007, Intel Corporation
   6 All rights reserved. This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef _EFI_EHCI_H_
  17 #define _EFI_EHCI_H_
  18
  19
  20 #include <Uefi.h>
  21
  22 #include <Protocol/Usb2HostController.h>
  23 #include <Protocol/PciIo.h>
  24
  25 #include <Library/DebugLib.h>
  26 #include <Library/BaseMemoryLib.h>
  27 #include <Library/UefiDriverEntryPoint.h>
  28 #include <Library/UefiBootServicesTableLib.h>
  29 #include <Library/UefiLib.h>
  30 #include <Library/BaseLib.h>
  31 #include <Library/MemoryAllocationLib.h>
  32 #include <Library/PcdLib.h>
  33
  34 #include <IndustryStandard/Pci22.h>
  35
  36 typedef struct _USB2_HC_DEV  USB2_HC_DEV;
  37
  38 #include "UsbHcMem.h"
  39 #include "EhciReg.h"
  40 #include "EhciUrb.h"
  41 #include "EhciSched.h"
  42 #include "EhciDebug.h"
  43
  44 typedef enum {
  45   EHC_1_MICROSECOND            = 1,
  46   EHC_1_MILLISECOND            = 1000 * EHC_1_MICROSECOND,
  47   EHC_1_SECOND                 = 1000 * EHC_1_MILLISECOND,
  48
  49   //
  50   // EHCI register operation timeout, set by experience
  51   //
  52   EHC_RESET_TIMEOUT            = 1 * EHC_1_SECOND,
  53   EHC_GENERIC_TIMEOUT          = 10 * EHC_1_MILLISECOND,
  54
  55   //
  56   // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
  57   //
  58   EHC_ROOT_PORT_RECOVERY_STALL = 20 * EHC_1_MILLISECOND,
  59
  60   //
  61   // Sync and Async transfer polling interval, set by experience,
  62   // and the unit of Async is 100us, means 50ms as interval.
  63   //
  64   EHC_SYNC_POLL_INTERVAL       = 20 * EHC_1_MICROSECOND,
  65   EHC_ASYNC_POLL_INTERVAL      = 50 * 10000U
  66 } EHC_TIMEOUT_EXPERIENCE_VALUE;
  67
  68
  69   //
  70   // EHC raises TPL to TPL_NOTIFY to serialize all its operations
  71   // to protect shared data structures.
  72   //
  73 #define  EHC_TPL                TPL_NOTIFY
  74
  75 #define  USB2_HC_DEV_SIGNATURE  EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
  76
  77 //
  78 //Iterate through the doule linked list. NOT delete safe
  79 //
  80 #define EFI_LIST_FOR_EACH(Entry, ListHead)    \
  81   for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
  82
  83 //
  84 //Iterate through the doule linked list. This is delete-safe.
  85 //Don't touch NextEntry
  86 //
  87 #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead)            \
  88   for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
  89       Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
  90
  91 #define EFI_LIST_CONTAINER(Entry, Type, Field) _CR(Entry, Type, Field)
  92
  93
  94 #define EHC_LOW_32BIT(Addr64)     ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
  95 #define EHC_HIGH_32BIT(Addr64)    ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
  96 #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
  97
  98 #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
  99           (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
 100
 101 #define EHC_FROM_THIS(a)   CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
 102
 103 struct _USB2_HC_DEV {
 104   UINTN                     Signature;
 105   EFI_USB2_HC_PROTOCOL      Usb2Hc;
 106
 107   EFI_PCI_IO_PROTOCOL       *PciIo;
 108   UINT64                    OriginalPciAttributes;
 109   USBHC_MEM_POOL            *MemPool;
 110
 111   //
 112   // Schedule data shared between asynchronous and periodic
 113   // transfers:
 114   // ShortReadStop, as its name indicates, is used to terminate
 115   // the short read except the control transfer. EHCI follows
 116   // the alternative next QTD point when a short read happens.
 117   // For control transfer, even the short read happens, try the
 118   // status stage.
 119   //
 120   EHC_QTD                  *ShortReadStop;
 121   EFI_EVENT                 PollTimer;
 122
 123   //
 124   // Asynchronous(bulk and control) transfer schedule data:
 125   // ReclaimHead is used as the head of the asynchronous transfer
 126   // list. It acts as the reclamation header.
 127   //
 128   EHC_QH                   *ReclaimHead;
 129
 130   //
 131   // Peroidic (interrupt) transfer schedule data:
 132   //
 133   VOID                      *PeriodFrame;     // Mapped as common buffer
 134   VOID                      *PeriodFrameHost;
 135   VOID                      *PeriodFrameMap;
 136
 137   EHC_QH                    *PeriodOne;
 138   LIST_ENTRY                AsyncIntTransfers;
 139
 140   //
 141   // EHCI configuration data
 142   //
 143   UINT32                    HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
 144   UINT32                    HcCapParams;    // Cache of HC capability parameter, HCCPARAMS
 145   UINT32                    CapLen;         // Capability length
 146   UINT32                    High32bitAddr;
 147
 148   //
 149   // Misc
 150   //
 151   EFI_UNICODE_STRING_TABLE  *ControllerNameTable;
 152 };
 153
 154
 155 extern EFI_DRIVER_BINDING_PROTOCOL      gEhciDriverBinding;
 156 extern EFI_COMPONENT_NAME_PROTOCOL      gEhciComponentName;
 157 extern EFI_COMPONENT_NAME2_PROTOCOL     gEhciComponentName2;
 158
 159 #endif