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MdeModulePkg/EhciDxe: factor out EhcIsDebugPortInUse()
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1 /** @file
2
3 Provides some data struct used by EHCI controller driver.
4
5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef _EFI_EHCI_H_
17 #define _EFI_EHCI_H_
18
19
20 #include <Uefi.h>
21
22 #include <Protocol/Usb2HostController.h>
23 #include <Protocol/PciIo.h>
24
25 #include <Guid/EventGroup.h>
26
27 #include <Library/DebugLib.h>
28 #include <Library/BaseMemoryLib.h>
29 #include <Library/UefiDriverEntryPoint.h>
30 #include <Library/UefiBootServicesTableLib.h>
31 #include <Library/UefiLib.h>
32 #include <Library/BaseLib.h>
33 #include <Library/MemoryAllocationLib.h>
34 #include <Library/PcdLib.h>
35 #include <Library/ReportStatusCodeLib.h>
36
37 #include <IndustryStandard/Pci.h>
38
39 typedef struct _USB2_HC_DEV USB2_HC_DEV;
40
41 #include "UsbHcMem.h"
42 #include "EhciReg.h"
43 #include "EhciUrb.h"
44 #include "EhciSched.h"
45 #include "EhciDebug.h"
46 #include "ComponentName.h"
47
48 //
49 // EHC timeout experience values
50 //
51
52 #define EHC_1_MICROSECOND 1
53 #define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
54 #define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
55
56 //
57 // EHCI register operation timeout, set by experience
58 //
59 #define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
60 #define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
61
62 //
63 // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
64 //
65 #define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
66
67 //
68 // Sync and Async transfer polling interval, set by experience,
69 // and the unit of Async is 100us, means 1ms as interval.
70 //
71 #define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
72 #define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
73
74 //
75 // EHCI debug port control status register bit definition
76 //
77 #define USB_DEBUG_PORT_IN_USE BIT10
78 #define USB_DEBUG_PORT_ENABLE BIT28
79 #define USB_DEBUG_PORT_OWNER BIT30
80 #define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \
81 USB_DEBUG_PORT_OWNER)
82
83 //
84 // EHC raises TPL to TPL_NOTIFY to serialize all its operations
85 // to protect shared data structures.
86 //
87 #define EHC_TPL TPL_NOTIFY
88
89 //
90 //Iterate through the double linked list. NOT delete safe
91 //
92 #define EFI_LIST_FOR_EACH(Entry, ListHead) \
93 for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
94
95 //
96 //Iterate through the double linked list. This is delete-safe.
97 //Don't touch NextEntry
98 //
99 #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
100 for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
101 Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
102
103 #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
104
105
106 #define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
107 #define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
108 #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
109
110 #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
111 (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
112
113 #define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
114 #define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
115
116 struct _USB2_HC_DEV {
117 UINTN Signature;
118 EFI_USB2_HC_PROTOCOL Usb2Hc;
119
120 EFI_PCI_IO_PROTOCOL *PciIo;
121 EFI_DEVICE_PATH_PROTOCOL *DevicePath;
122 UINT64 OriginalPciAttributes;
123 USBHC_MEM_POOL *MemPool;
124
125 //
126 // Schedule data shared between asynchronous and periodic
127 // transfers:
128 // ShortReadStop, as its name indicates, is used to terminate
129 // the short read except the control transfer. EHCI follows
130 // the alternative next QTD point when a short read happens.
131 // For control transfer, even the short read happens, try the
132 // status stage.
133 //
134 EHC_QTD *ShortReadStop;
135 EFI_EVENT PollTimer;
136
137 //
138 // ExitBootServicesEvent is used to stop the EHC DMA operation
139 // after exit boot service.
140 //
141 EFI_EVENT ExitBootServiceEvent;
142
143 //
144 // Asynchronous(bulk and control) transfer schedule data:
145 // ReclaimHead is used as the head of the asynchronous transfer
146 // list. It acts as the reclamation header.
147 //
148 EHC_QH *ReclaimHead;
149
150 //
151 // Periodic (interrupt) transfer schedule data:
152 //
153 VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
154 VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
155 VOID *PeriodFrameMap;
156
157 EHC_QH *PeriodOne;
158 LIST_ENTRY AsyncIntTransfers;
159
160 //
161 // EHCI configuration data
162 //
163 UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
164 UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
165 UINT32 CapLen; // Capability length
166
167 //
168 // Misc
169 //
170 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
171
172 //
173 // EHCI debug port info
174 //
175 UINT16 DebugPortOffset; // The offset of debug port mmio register
176 UINT8 DebugPortBarNum; // The bar number of debug port mmio register
177 UINT8 DebugPortNum; // The port number of usb debug port
178
179 BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
180 };
181
182
183 extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
184 extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
185 extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
186
187 /**
188 Test to see if this driver supports ControllerHandle. Any
189 ControllerHandle that has Usb2HcProtocol installed will
190 be supported.
191
192 @param This Protocol instance pointer.
193 @param Controller Handle of device to test.
194 @param RemainingDevicePath Not used.
195
196 @return EFI_SUCCESS This driver supports this device.
197 @return EFI_UNSUPPORTED This driver does not support this device.
198
199 **/
200 EFI_STATUS
201 EFIAPI
202 EhcDriverBindingSupported (
203 IN EFI_DRIVER_BINDING_PROTOCOL *This,
204 IN EFI_HANDLE Controller,
205 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
206 );
207
208 /**
209 Starting the Usb EHCI Driver.
210
211 @param This Protocol instance pointer.
212 @param Controller Handle of device to test.
213 @param RemainingDevicePath Not used.
214
215 @return EFI_SUCCESS supports this device.
216 @return EFI_UNSUPPORTED do not support this device.
217 @return EFI_DEVICE_ERROR cannot be started due to device Error.
218 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
219
220 **/
221 EFI_STATUS
222 EFIAPI
223 EhcDriverBindingStart (
224 IN EFI_DRIVER_BINDING_PROTOCOL *This,
225 IN EFI_HANDLE Controller,
226 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
227 );
228
229 /**
230 Stop this driver on ControllerHandle. Support stopping any child handles
231 created by this driver.
232
233 @param This Protocol instance pointer.
234 @param Controller Handle of device to stop driver on.
235 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
236 @param ChildHandleBuffer List of handles for the children we need to stop.
237
238 @return EFI_SUCCESS Success.
239 @return EFI_DEVICE_ERROR Fail.
240
241 **/
242 EFI_STATUS
243 EFIAPI
244 EhcDriverBindingStop (
245 IN EFI_DRIVER_BINDING_PROTOCOL *This,
246 IN EFI_HANDLE Controller,
247 IN UINTN NumberOfChildren,
248 IN EFI_HANDLE *ChildHandleBuffer
249 );
250
251 #endif
252