3 This file contains URB request, each request is warpped in a
4 URB (Usb Request Block).
6 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
15 Create a single QTD to hold the data.
17 @param Ehc The EHCI device.
18 @param Data The cpu memory address of current data not associated with a QTD.
19 @param DataPhy The pci bus address of current data not associated with a QTD.
20 @param DataLen The length of the data.
21 @param PktId Packet ID to use in the QTD.
22 @param Toggle Data toggle to use in the QTD.
23 @param MaxPacket Maximu packet length of the endpoint.
25 @return Created QTD or NULL if failed to create one.
47 Qtd
= UsbHcAllocateMem (Ehc
->MemPool
, sizeof (EHC_QTD
));
53 Qtd
->Signature
= EHC_QTD_SIG
;
57 InitializeListHead (&Qtd
->QtdList
);
60 QtdHw
->NextQtd
= QTD_LINK (NULL
, TRUE
);
61 QtdHw
->AltNext
= QTD_LINK (NULL
, TRUE
);
62 QtdHw
->Status
= QTD_STAT_ACTIVE
;
64 QtdHw
->ErrCnt
= QTD_MAX_ERR
;
66 QtdHw
->TotalBytes
= 0;
67 QtdHw
->DataToggle
= Toggle
;
70 // Fill in the buffer points
75 for (Index
= 0; Index
<= QTD_MAX_BUFFER
; Index
++) {
77 // Set the buffer point (Check page 41 EHCI Spec 1.0). No need to
78 // compute the offset and clear Reserved fields. This is already
79 // done in the data point.
81 QtdHw
->Page
[Index
] = EHC_LOW_32BIT (DataPhy
);
82 QtdHw
->PageHigh
[Index
] = EHC_HIGH_32BIT (DataPhy
);
84 ThisBufLen
= QTD_BUF_LEN
- (EHC_LOW_32BIT (DataPhy
) & QTD_BUF_MASK
);
86 if (Len
+ ThisBufLen
>= DataLen
) {
93 DataPhy
+= ThisBufLen
;
97 // Need to fix the last pointer if the Qtd can't hold all the
98 // user's data to make sure that the length is in the unit of
99 // max packets. If it can hold all the data, there is no such
103 Len
= Len
- Len
% MaxPacket
;
106 QtdHw
->TotalBytes
= (UINT32
) Len
;
116 Initialize the queue head for interrupt transfer,
117 that is, initialize the following three fields:
118 1. SplitXState in the Status field
122 @param Ep The queue head's related endpoint.
123 @param QhHw The queue head to initialize.
133 // Because UEFI interface can't utilitize an endpoint with
134 // poll rate faster than 1ms, only need to set one bit in
135 // the queue head. simple. But it may be changed later. If
136 // sub-1ms interrupt is supported, need to update the S-Mask
139 if (Ep
->DevSpeed
== EFI_USB_SPEED_HIGH
) {
140 QhHw
->SMask
= QH_MICROFRAME_0
;
145 // For low/full speed device, the transfer must go through
146 // the split transaction. Need to update three fields
147 // 1. SplitXState in the status
148 // 2. Microframe S-Mask
149 // 3. Microframe C-Mask
150 // UEFI USB doesn't exercise admission control. It simplely
151 // schedule the high speed transactions in microframe 0, and
152 // full/low speed transactions at microframe 1. This also
153 // avoid the use of FSTN.
155 QhHw
->SMask
= QH_MICROFRAME_1
;
156 QhHw
->CMask
= QH_MICROFRAME_3
| QH_MICROFRAME_4
| QH_MICROFRAME_5
;
162 Allocate and initialize a EHCI queue head.
164 @param Ehci The EHCI device.
165 @param Ep The endpoint to create queue head for.
167 @return Created queue head or NULL if failed to create one.
172 IN USB2_HC_DEV
*Ehci
,
179 Qh
= UsbHcAllocateMem (Ehci
->MemPool
, sizeof (EHC_QH
));
185 Qh
->Signature
= EHC_QH_SIG
;
187 Qh
->Interval
= Ep
->PollRate
;
189 InitializeListHead (&Qh
->Qtds
);
192 QhHw
->HorizonLink
= QH_LINK (NULL
, 0, TRUE
);
193 QhHw
->DeviceAddr
= Ep
->DevAddr
;
195 QhHw
->EpNum
= Ep
->EpAddr
;
196 QhHw
->EpSpeed
= Ep
->DevSpeed
;
198 QhHw
->ReclaimHead
= 0;
199 QhHw
->MaxPacketLen
= (UINT32
) Ep
->MaxPacket
;
201 QhHw
->NakReload
= QH_NAK_RELOAD
;
202 QhHw
->HubAddr
= Ep
->HubAddr
;
203 QhHw
->PortNum
= Ep
->HubPort
;
204 QhHw
->Multiplier
= 1;
205 QhHw
->DataToggle
= Ep
->Toggle
;
207 if (Ep
->DevSpeed
!= EFI_USB_SPEED_HIGH
) {
208 QhHw
->Status
|= QTD_STAT_DO_SS
;
212 case EHC_CTRL_TRANSFER
:
214 // Special initialization for the control transfer:
215 // 1. Control transfer initialize data toggle from each QTD
216 // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
220 if (Ep
->DevSpeed
!= EFI_USB_SPEED_HIGH
) {
225 case EHC_INT_TRANSFER_ASYNC
:
226 case EHC_INT_TRANSFER_SYNC
:
228 // Special initialization for the interrupt transfer
229 // to set the S-Mask and C-Mask
232 EhcInitIntQh (Ep
, QhHw
);
235 case EHC_BULK_TRANSFER
:
236 if ((Ep
->DevSpeed
== EFI_USB_SPEED_HIGH
) && (Ep
->Direction
== EfiUsbDataOut
)) {
237 QhHw
->Status
|= QTD_STAT_DO_PING
;
248 Convert the poll interval from application to that
249 be used by EHCI interface data structure. Only need
250 to get the max 2^n that is less than interval. UEFI
251 can't support high speed endpoint with a interval less
252 than 8 microframe because interval is specified in
253 the unit of ms (millisecond).
255 @param Interval The interval to convert.
257 @return The converted interval.
272 // Find the index (1 based) of the highest non-zero bit
276 while (Interval
!= 0) {
281 return (UINTN
)1 << (BitCount
- 1);
288 @param Ehc The EHCI device.
289 @param Qtds The list head of the QTD.
302 EFI_LIST_FOR_EACH_SAFE (Entry
, Next
, Qtds
) {
303 Qtd
= EFI_LIST_CONTAINER (Entry
, EHC_QTD
, QtdList
);
305 RemoveEntryList (&Qtd
->QtdList
);
306 UsbHcFreeMem (Ehc
->MemPool
, Qtd
, sizeof (EHC_QTD
));
312 Free an allocated URB. It is possible for it to be partially inited.
314 @param Ehc The EHCI device.
315 @param Urb The URB to free.
324 EFI_PCI_IO_PROTOCOL
*PciIo
;
328 if (Urb
->RequestPhy
!= NULL
) {
329 PciIo
->Unmap (PciIo
, Urb
->RequestMap
);
332 if (Urb
->DataMap
!= NULL
) {
333 PciIo
->Unmap (PciIo
, Urb
->DataMap
);
336 if (Urb
->Qh
!= NULL
) {
338 // Ensure that this queue head has been unlinked from the
339 // schedule data structures. Free all the associated QTDs
341 EhcFreeQtds (Ehc
, &Urb
->Qh
->Qtds
);
342 UsbHcFreeMem (Ehc
->MemPool
, Urb
->Qh
, sizeof (EHC_QH
));
350 Create a list of QTDs for the URB.
352 @param Ehc The EHCI device.
353 @param Urb The URB to create QTDs for.
355 @retval EFI_OUT_OF_RESOURCES Failed to allocate resource for QTD.
356 @retval EFI_SUCCESS The QTDs are allocated for the URB.
375 EFI_PHYSICAL_ADDRESS PhyAddr
;
377 ASSERT ((Urb
!= NULL
) && (Urb
->Qh
!= NULL
));
380 // EHCI follows the alternet next QTD pointer if it meets
381 // a short read and the AlterNext pointer is valid. UEFI
382 // EHCI driver should terminate the transfer except the
389 AlterNext
= QTD_LINK (NULL
, TRUE
);
391 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, Ehc
->ShortReadStop
, sizeof (EHC_QTD
));
392 if (Ep
->Direction
== EfiUsbDataIn
) {
393 AlterNext
= QTD_LINK (PhyAddr
, FALSE
);
397 // Build the Setup and status packets for control transfer
399 if (Urb
->Ep
.Type
== EHC_CTRL_TRANSFER
) {
400 Len
= sizeof (EFI_USB_DEVICE_REQUEST
);
401 Qtd
= EhcCreateQtd (Ehc
, (UINT8
*)Urb
->Request
, (UINT8
*)Urb
->RequestPhy
, Len
, QTD_PID_SETUP
, 0, Ep
->MaxPacket
);
404 return EFI_OUT_OF_RESOURCES
;
407 InsertTailList (&Qh
->Qtds
, &Qtd
->QtdList
);
410 // Create the status packet now. Set the AlterNext to it. So, when
411 // EHCI meets a short control read, it can resume at the status stage.
412 // Use the opposite direction of the data stage, or IN if there is
415 if (Ep
->Direction
== EfiUsbDataIn
) {
416 Pid
= QTD_PID_OUTPUT
;
421 StatusQtd
= EhcCreateQtd (Ehc
, NULL
, NULL
, 0, Pid
, 1, Ep
->MaxPacket
);
423 if (StatusQtd
== NULL
) {
427 if (Ep
->Direction
== EfiUsbDataIn
) {
428 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, StatusQtd
, sizeof (EHC_QTD
));
429 AlterNext
= QTD_LINK (PhyAddr
, FALSE
);
436 // Build the data packets for all the transfers
438 if (Ep
->Direction
== EfiUsbDataIn
) {
441 Pid
= QTD_PID_OUTPUT
;
447 while (Len
< Urb
->DataLen
) {
450 (UINT8
*) Urb
->Data
+ Len
,
451 (UINT8
*) Urb
->DataPhy
+ Len
,
462 Qtd
->QtdHw
.AltNext
= AlterNext
;
463 InsertTailList (&Qh
->Qtds
, &Qtd
->QtdList
);
466 // Switch the Toggle bit if odd number of packets are included in the QTD.
468 if (((Qtd
->DataLen
+ Ep
->MaxPacket
- 1) / Ep
->MaxPacket
) % 2) {
469 Toggle
= (UINT8
) (1 - Toggle
);
476 // Insert the status packet for control transfer
478 if (Ep
->Type
== EHC_CTRL_TRANSFER
) {
479 InsertTailList (&Qh
->Qtds
, &StatusQtd
->QtdList
);
483 // OK, all the QTDs needed are created. Now, fix the NextQtd point
485 EFI_LIST_FOR_EACH (Entry
, &Qh
->Qtds
) {
486 Qtd
= EFI_LIST_CONTAINER (Entry
, EHC_QTD
, QtdList
);
489 // break if it is the last entry on the list
491 if (Entry
->ForwardLink
== &Qh
->Qtds
) {
495 NextQtd
= EFI_LIST_CONTAINER (Entry
->ForwardLink
, EHC_QTD
, QtdList
);
496 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, NextQtd
, sizeof (EHC_QTD
));
497 Qtd
->QtdHw
.NextQtd
= QTD_LINK (PhyAddr
, FALSE
);
501 // Link the QTDs to the queue head
503 NextQtd
= EFI_LIST_CONTAINER (Qh
->Qtds
.ForwardLink
, EHC_QTD
, QtdList
);
504 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, NextQtd
, sizeof (EHC_QTD
));
505 Qh
->QhHw
.NextQtd
= QTD_LINK (PhyAddr
, FALSE
);
509 EhcFreeQtds (Ehc
, &Qh
->Qtds
);
510 return EFI_OUT_OF_RESOURCES
;
515 Create a new URB and its associated QTD.
517 @param Ehc The EHCI device.
518 @param DevAddr The device address.
519 @param EpAddr Endpoint addrress & its direction.
520 @param DevSpeed The device speed.
521 @param Toggle Initial data toggle to use.
522 @param MaxPacket The max packet length of the endpoint.
523 @param Hub The transaction translator to use.
524 @param Type The transaction type.
525 @param Request The standard USB request for control transfer.
526 @param Data The user data to transfer.
527 @param DataLen The length of data buffer.
528 @param Callback The function to call when data is transferred.
529 @param Context The context to the callback.
530 @param Interval The interval for interrupt transfer.
532 @return Created URB or NULL.
543 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Hub
,
545 IN EFI_USB_DEVICE_REQUEST
*Request
,
548 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
554 EFI_PHYSICAL_ADDRESS PhyAddr
;
555 EFI_PCI_IO_PROTOCOL_OPERATION MapOp
;
556 EFI_PCI_IO_PROTOCOL
*PciIo
;
562 Urb
= AllocateZeroPool (sizeof (URB
));
568 Urb
->Signature
= EHC_URB_SIG
;
569 InitializeListHead (&Urb
->UrbList
);
572 Ep
->DevAddr
= DevAddr
;
573 Ep
->EpAddr
= (UINT8
) (EpAddr
& 0x0F);
574 Ep
->Direction
= (((EpAddr
& 0x80) != 0) ? EfiUsbDataIn
: EfiUsbDataOut
);
575 Ep
->DevSpeed
= DevSpeed
;
576 Ep
->MaxPacket
= MaxPacket
;
581 if (DevSpeed
!= EFI_USB_SPEED_HIGH
) {
582 ASSERT (Hub
!= NULL
);
584 Ep
->HubAddr
= Hub
->TranslatorHubAddress
;
585 Ep
->HubPort
= Hub
->TranslatorPortNumber
;
590 Ep
->PollRate
= EhcConvertPollRate (Interval
);
592 Urb
->Request
= Request
;
594 Urb
->DataLen
= DataLen
;
595 Urb
->Callback
= Callback
;
596 Urb
->Context
= Context
;
599 Urb
->Qh
= EhcCreateQh (Ehc
, &Urb
->Ep
);
601 if (Urb
->Qh
== NULL
) {
606 // Map the request and user data
608 if (Request
!= NULL
) {
609 Len
= sizeof (EFI_USB_DEVICE_REQUEST
);
610 MapOp
= EfiPciIoOperationBusMasterRead
;
611 Status
= PciIo
->Map (PciIo
, MapOp
, Request
, &Len
, &PhyAddr
, &Map
);
613 if (EFI_ERROR (Status
) || (Len
!= sizeof (EFI_USB_DEVICE_REQUEST
))) {
617 Urb
->RequestPhy
= (VOID
*) ((UINTN
) PhyAddr
);
618 Urb
->RequestMap
= Map
;
624 if (Ep
->Direction
== EfiUsbDataIn
) {
625 MapOp
= EfiPciIoOperationBusMasterWrite
;
627 MapOp
= EfiPciIoOperationBusMasterRead
;
630 Status
= PciIo
->Map (PciIo
, MapOp
, Data
, &Len
, &PhyAddr
, &Map
);
632 if (EFI_ERROR (Status
) || (Len
!= DataLen
)) {
636 Urb
->DataPhy
= (VOID
*) ((UINTN
) PhyAddr
);
640 Status
= EhcCreateQtds (Ehc
, Urb
);
642 if (EFI_ERROR (Status
)) {
649 EhcFreeUrb (Ehc
, Urb
);