MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c

   1 /** @file
   2   NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows
   3   NVM Express specification.
   4
   5   (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
   6   Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php.
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #include "NvmExpress.h"
  18
  19 /**
  20   Dump the execution status from a given completion queue entry.
  21
  22   @param[in]     Cq               A pointer to the NVME_CQ item.
  23
  24 **/
  25 VOID
  26 NvmeDumpStatus (
  27   IN NVME_CQ             *Cq
  28   )
  29 {
  30   DEBUG ((EFI_D_VERBOSE, "Dump NVMe Completion Entry Status from [0x%x]:\n", Cq));
  31
  32   DEBUG ((EFI_D_VERBOSE, "  SQ Identifier : [0x%x], Phase Tag : [%d], Cmd Identifier : [0x%x]\n", Cq->Sqid, Cq->Pt, Cq->Cid));
  33
  34   DEBUG ((EFI_D_VERBOSE, "  NVMe Cmd Execution Result - "));
  35
  36   switch (Cq->Sct) {
  37     case 0x0:
  38       switch (Cq->Sc) {
  39         case 0x0:
  40           DEBUG ((EFI_D_VERBOSE, "Successful Completion\n"));
  41           break;
  42         case 0x1:
  43           DEBUG ((EFI_D_VERBOSE, "Invalid Command Opcode\n"));
  44           break;
  45         case 0x2:
  46           DEBUG ((EFI_D_VERBOSE, "Invalid Field in Command\n"));
  47           break;
  48         case 0x3:
  49           DEBUG ((EFI_D_VERBOSE, "Command ID Conflict\n"));
  50           break;
  51         case 0x4:
  52           DEBUG ((EFI_D_VERBOSE, "Data Transfer Error\n"));
  53           break;
  54         case 0x5:
  55           DEBUG ((EFI_D_VERBOSE, "Commands Aborted due to Power Loss Notification\n"));
  56           break;
  57         case 0x6:
  58           DEBUG ((EFI_D_VERBOSE, "Internal Device Error\n"));
  59           break;
  60         case 0x7:
  61           DEBUG ((EFI_D_VERBOSE, "Command Abort Requested\n"));
  62           break;
  63         case 0x8:
  64           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to SQ Deletion\n"));
  65           break;
  66         case 0x9:
  67           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to Failed Fused Command\n"));
  68           break;
  69         case 0xA:
  70           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to Missing Fused Command\n"));
  71           break;
  72         case 0xB:
  73           DEBUG ((EFI_D_VERBOSE, "Invalid Namespace or Format\n"));
  74           break;
  75         case 0xC:
  76           DEBUG ((EFI_D_VERBOSE, "Command Sequence Error\n"));
  77           break;
  78         case 0xD:
  79           DEBUG ((EFI_D_VERBOSE, "Invalid SGL Last Segment Descriptor\n"));
  80           break;
  81         case 0xE:
  82           DEBUG ((EFI_D_VERBOSE, "Invalid Number of SGL Descriptors\n"));
  83           break;
  84         case 0xF:
  85           DEBUG ((EFI_D_VERBOSE, "Data SGL Length Invalid\n"));
  86           break;
  87         case 0x10:
  88           DEBUG ((EFI_D_VERBOSE, "Metadata SGL Length Invalid\n"));
  89           break;
  90         case 0x11:
  91           DEBUG ((EFI_D_VERBOSE, "SGL Descriptor Type Invalid\n"));
  92           break;
  93         case 0x80:
  94           DEBUG ((EFI_D_VERBOSE, "LBA Out of Range\n"));
  95           break;
  96         case 0x81:
  97           DEBUG ((EFI_D_VERBOSE, "Capacity Exceeded\n"));
  98           break;
  99         case 0x82:
 100           DEBUG ((EFI_D_VERBOSE, "Namespace Not Ready\n"));
 101           break;
 102         case 0x83:
 103           DEBUG ((EFI_D_VERBOSE, "Reservation Conflict\n"));
 104           break;
 105       }
 106       break;
 107
 108     case 0x1:
 109       switch (Cq->Sc) {
 110         case 0x0:
 111           DEBUG ((EFI_D_VERBOSE, "Completion Queue Invalid\n"));
 112           break;
 113         case 0x1:
 114           DEBUG ((EFI_D_VERBOSE, "Invalid Queue Identifier\n"));
 115           break;
 116         case 0x2:
 117           DEBUG ((EFI_D_VERBOSE, "Maximum Queue Size Exceeded\n"));
 118           break;
 119         case 0x3:
 120           DEBUG ((EFI_D_VERBOSE, "Abort Command Limit Exceeded\n"));
 121           break;
 122         case 0x5:
 123           DEBUG ((EFI_D_VERBOSE, "Asynchronous Event Request Limit Exceeded\n"));
 124           break;
 125         case 0x6:
 126           DEBUG ((EFI_D_VERBOSE, "Invalid Firmware Slot\n"));
 127           break;
 128         case 0x7:
 129           DEBUG ((EFI_D_VERBOSE, "Invalid Firmware Image\n"));
 130           break;
 131         case 0x8:
 132           DEBUG ((EFI_D_VERBOSE, "Invalid Interrupt Vector\n"));
 133           break;
 134         case 0x9:
 135           DEBUG ((EFI_D_VERBOSE, "Invalid Log Page\n"));
 136           break;
 137         case 0xA:
 138           DEBUG ((EFI_D_VERBOSE, "Invalid Format\n"));
 139           break;
 140         case 0xB:
 141           DEBUG ((EFI_D_VERBOSE, "Firmware Application Requires Conventional Reset\n"));
 142           break;
 143         case 0xC:
 144           DEBUG ((EFI_D_VERBOSE, "Invalid Queue Deletion\n"));
 145           break;
 146         case 0xD:
 147           DEBUG ((EFI_D_VERBOSE, "Feature Identifier Not Saveable\n"));
 148           break;
 149         case 0xE:
 150           DEBUG ((EFI_D_VERBOSE, "Feature Not Changeable\n"));
 151           break;
 152         case 0xF:
 153           DEBUG ((EFI_D_VERBOSE, "Feature Not Namespace Specific\n"));
 154           break;
 155         case 0x10:
 156           DEBUG ((EFI_D_VERBOSE, "Firmware Application Requires NVM Subsystem Reset\n"));
 157           break;
 158         case 0x80:
 159           DEBUG ((EFI_D_VERBOSE, "Conflicting Attributes\n"));
 160           break;
 161         case 0x81:
 162           DEBUG ((EFI_D_VERBOSE, "Invalid Protection Information\n"));
 163           break;
 164         case 0x82:
 165           DEBUG ((EFI_D_VERBOSE, "Attempted Write to Read Only Range\n"));
 166           break;
 167       }
 168       break;
 169
 170     case 0x2:
 171       switch (Cq->Sc) {
 172         case 0x80:
 173           DEBUG ((EFI_D_VERBOSE, "Write Fault\n"));
 174           break;
 175         case 0x81:
 176           DEBUG ((EFI_D_VERBOSE, "Unrecovered Read Error\n"));
 177           break;
 178         case 0x82:
 179           DEBUG ((EFI_D_VERBOSE, "End-to-end Guard Check Error\n"));
 180           break;
 181         case 0x83:
 182           DEBUG ((EFI_D_VERBOSE, "End-to-end Application Tag Check Error\n"));
 183           break;
 184         case 0x84:
 185           DEBUG ((EFI_D_VERBOSE, "End-to-end Reference Tag Check Error\n"));
 186           break;
 187         case 0x85:
 188           DEBUG ((EFI_D_VERBOSE, "Compare Failure\n"));
 189           break;
 190         case 0x86:
 191           DEBUG ((EFI_D_VERBOSE, "Access Denied\n"));
 192           break;
 193       }
 194       break;
 195
 196     default:
 197       break;
 198   }
 199 }
 200
 201 /**
 202   Create PRP lists for data transfer which is larger than 2 memory pages.
 203   Note here we calcuate the number of required PRP lists and allocate them at one time.
 204
 205   @param[in]     PciIo               A pointer to the EFI_PCI_IO_PROTOCOL instance.
 206   @param[in]     PhysicalAddr        The physical base address of data buffer.
 207   @param[in]     Pages               The number of pages to be transfered.
 208   @param[out]    PrpListHost         The host base address of PRP lists.
 209   @param[in,out] PrpListNo           The number of PRP List.
 210   @param[out]    Mapping             The mapping value returned from PciIo.Map().
 211
 212   @retval The pointer to the first PRP List of the PRP lists.
 213
 214 **/
 215 VOID*
 216 NvmeCreatePrpList (
 217   IN     EFI_PCI_IO_PROTOCOL          *PciIo,
 218   IN     EFI_PHYSICAL_ADDRESS         PhysicalAddr,
 219   IN     UINTN                        Pages,
 220      OUT VOID                         **PrpListHost,
 221   IN OUT UINTN                        *PrpListNo,
 222      OUT VOID                         **Mapping
 223   )
 224 {
 225   UINTN                       PrpEntryNo;
 226   UINT64                      PrpListBase;
 227   UINTN                       PrpListIndex;
 228   UINTN                       PrpEntryIndex;
 229   UINT64                      Remainder;
 230   EFI_PHYSICAL_ADDRESS        PrpListPhyAddr;
 231   UINTN                       Bytes;
 232   EFI_STATUS                  Status;
 233
 234   //
 235   // The number of Prp Entry in a memory page.
 236   //
 237   PrpEntryNo = EFI_PAGE_SIZE / sizeof (UINT64);
 238
 239   //
 240   // Calculate total PrpList number.
 241   //
 242   *PrpListNo = (UINTN)DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo - 1, &Remainder);
 243   if (*PrpListNo == 0) {
 244     *PrpListNo = 1;
 245   } else if ((Remainder != 0) && (Remainder != 1)) {
 246     *PrpListNo += 1;
 247   } else if (Remainder == 1) {
 248     Remainder = PrpEntryNo;
 249   } else if (Remainder == 0) {
 250     Remainder = PrpEntryNo - 1;
 251   }
 252
 253   Status = PciIo->AllocateBuffer (
 254                     PciIo,
 255                     AllocateAnyPages,
 256                     EfiBootServicesData,
 257                     *PrpListNo,
 258                     PrpListHost,
 259                     0
 260                     );
 261
 262   if (EFI_ERROR (Status)) {
 263     return NULL;
 264   }
 265
 266   Bytes = EFI_PAGES_TO_SIZE (*PrpListNo);
 267   Status = PciIo->Map (
 268                     PciIo,
 269                     EfiPciIoOperationBusMasterCommonBuffer,
 270                     *PrpListHost,
 271                     &Bytes,
 272                     &PrpListPhyAddr,
 273                     Mapping
 274                     );
 275
 276   if (EFI_ERROR (Status) || (Bytes != EFI_PAGES_TO_SIZE (*PrpListNo))) {
 277     DEBUG ((EFI_D_ERROR, "NvmeCreatePrpList: create PrpList failure!\n"));
 278     goto EXIT;
 279   }
 280   //
 281   // Fill all PRP lists except of last one.
 282   //
 283   ZeroMem (*PrpListHost, Bytes);
 284   for (PrpListIndex = 0; PrpListIndex < *PrpListNo - 1; ++PrpListIndex) {
 285     PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
 286
 287     for (PrpEntryIndex = 0; PrpEntryIndex < PrpEntryNo; ++PrpEntryIndex) {
 288       if (PrpEntryIndex != PrpEntryNo - 1) {
 289         //
 290         // Fill all PRP entries except of last one.
 291         //
 292         *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
 293         PhysicalAddr += EFI_PAGE_SIZE;
 294       } else {
 295         //
 296         // Fill last PRP entries with next PRP List pointer.
 297         //
 298         *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE;
 299       }
 300     }
 301   }
 302   //
 303   // Fill last PRP list.
 304   //
 305   PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
 306   for (PrpEntryIndex = 0; PrpEntryIndex < Remainder; ++PrpEntryIndex) {
 307     *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
 308     PhysicalAddr += EFI_PAGE_SIZE;
 309   }
 310
 311   return (VOID*)(UINTN)PrpListPhyAddr;
 312
 313 EXIT:
 314   PciIo->FreeBuffer (PciIo, *PrpListNo, *PrpListHost);
 315   return NULL;
 316 }
 317
 318
 319 /**
 320   Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
 321   both blocking I/O and non-blocking I/O. The blocking I/O functionality is required, and the non-blocking
 322   I/O functionality is optional.
 323
 324
 325   @param[in]     This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 326   @param[in]     NamespaceId         A 32 bit namespace ID as defined in the NVMe specification to which the NVM Express Command
 327                                      Packet will be sent.  A value of 0 denotes the NVM Express controller, a value of all 0xFF's
 328                                      (all bytes are 0xFF) in the namespace ID specifies that the command packet should be sent to
 329                                      all valid namespaces.
 330   @param[in,out] Packet              A pointer to the NVM Express Command Packet.
 331   @param[in]     Event               If non-blocking I/O is not supported then Event is ignored, and blocking I/O is performed.
 332                                      If Event is NULL, then blocking I/O is performed. If Event is not NULL and non-blocking I/O
 333                                      is supported, then non-blocking I/O is performed, and Event will be signaled when the NVM
 334                                      Express Command Packet completes.
 335
 336   @retval EFI_SUCCESS                The NVM Express Command Packet was sent by the host. TransferLength bytes were transferred
 337                                      to, or from DataBuffer.
 338   @retval EFI_BAD_BUFFER_SIZE        The NVM Express Command Packet was not executed. The number of bytes that could be transferred
 339                                      is returned in TransferLength.
 340   @retval EFI_NOT_READY              The NVM Express Command Packet could not be sent because the controller is not ready. The caller
 341                                      may retry again later.
 342   @retval EFI_DEVICE_ERROR           A device error occurred while attempting to send the NVM Express Command Packet.
 343   @retval EFI_INVALID_PARAMETER      NamespaceId or the contents of EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM
 344                                      Express Command Packet was not sent, so no additional status information is available.
 345   @retval EFI_UNSUPPORTED            The command described by the NVM Express Command Packet is not supported by the NVM Express
 346                                      controller. The NVM Express Command Packet was not sent so no additional status information
 347                                      is available.
 348   @retval EFI_TIMEOUT                A timeout occurred while waiting for the NVM Express Command Packet to execute.
 349
 350 **/
 351 EFI_STATUS
 352 EFIAPI
 353 NvmExpressPassThru (
 354   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 355   IN     UINT32                                      NamespaceId,
 356   IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET    *Packet,
 357   IN     EFI_EVENT                                   Event OPTIONAL
 358   )
 359 {
 360   NVME_CONTROLLER_PRIVATE_DATA   *Private;
 361   EFI_STATUS                     Status;
 362   EFI_PCI_IO_PROTOCOL            *PciIo;
 363   NVME_SQ                        *Sq;
 364   NVME_CQ                        *Cq;
 365   UINT16                         QueueId;
 366   UINT32                         Bytes;
 367   UINT16                         Offset;
 368   EFI_EVENT                      TimerEvent;
 369   EFI_PCI_IO_PROTOCOL_OPERATION  Flag;
 370   EFI_PHYSICAL_ADDRESS           PhyAddr;
 371   VOID                           *MapData;
 372   VOID                           *MapMeta;
 373   VOID                           *MapPrpList;
 374   UINTN                          MapLength;
 375   UINT64                         *Prp;
 376   VOID                           *PrpListHost;
 377   UINTN                          PrpListNo;
 378   UINT32                         Attributes;
 379   UINT32                         IoAlign;
 380   UINT32                         MaxTransLen;
 381   UINT32                         Data;
 382   NVME_PASS_THRU_ASYNC_REQ       *AsyncRequest;
 383   EFI_TPL                        OldTpl;
 384
 385   //
 386   // check the data fields in Packet parameter.
 387   //
 388   if ((This == NULL) || (Packet == NULL)) {
 389     return EFI_INVALID_PARAMETER;
 390   }
 391
 392   if ((Packet->NvmeCmd == NULL) || (Packet->NvmeCompletion == NULL)) {
 393     return EFI_INVALID_PARAMETER;
 394   }
 395
 396   if (Packet->QueueType != NVME_ADMIN_QUEUE && Packet->QueueType != NVME_IO_QUEUE) {
 397     return EFI_INVALID_PARAMETER;
 398   }
 399
 400   //
 401   // 'Attributes' with neither EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL nor
 402   // EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL set is an illegal
 403   // configuration.
 404   //
 405   Attributes  = This->Mode->Attributes;
 406   if ((Attributes & (EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
 407     EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL)) == 0) {
 408     return EFI_INVALID_PARAMETER;
 409   }
 410
 411   //
 412   // Buffer alignment check for TransferBuffer & MetadataBuffer.
 413   //
 414   IoAlign     = This->Mode->IoAlign;
 415   if (IoAlign > 0 && (((UINTN) Packet->TransferBuffer & (IoAlign - 1)) != 0)) {
 416     return EFI_INVALID_PARAMETER;
 417   }
 418
 419   if (IoAlign > 0 && (((UINTN) Packet->MetadataBuffer & (IoAlign - 1)) != 0)) {
 420     return EFI_INVALID_PARAMETER;
 421   }
 422
 423   Private     = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 424
 425   //
 426   // Check whether TransferLength exceeds the maximum data transfer size.
 427   //
 428   if (Private->ControllerData->Mdts != 0) {
 429     MaxTransLen = (1 << (Private->ControllerData->Mdts)) *
 430                   (1 << (Private->Cap.Mpsmin + 12));
 431     if (Packet->TransferLength > MaxTransLen) {
 432       Packet->TransferLength = MaxTransLen;
 433       return EFI_BAD_BUFFER_SIZE;
 434     }
 435   }
 436
 437   PciIo       = Private->PciIo;
 438   MapData     = NULL;
 439   MapMeta     = NULL;
 440   MapPrpList  = NULL;
 441   PrpListHost = NULL;
 442   PrpListNo   = 0;
 443   Prp         = NULL;
 444   TimerEvent  = NULL;
 445   Status      = EFI_SUCCESS;
 446
 447   if (Packet->QueueType == NVME_ADMIN_QUEUE) {
 448     QueueId = 0;
 449   } else {
 450     if (Event == NULL) {
 451       QueueId = 1;
 452     } else {
 453       QueueId = 2;
 454
 455       //
 456       // Submission queue full check.
 457       //
 458       if ((Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + 1) ==
 459           Private->AsyncSqHead) {
 460         return EFI_NOT_READY;
 461       }
 462     }
 463   }
 464   Sq  = Private->SqBuffer[QueueId] + Private->SqTdbl[QueueId].Sqt;
 465   Cq  = Private->CqBuffer[QueueId] + Private->CqHdbl[QueueId].Cqh;
 466
 467   if (Packet->NvmeCmd->Nsid != NamespaceId) {
 468     return EFI_INVALID_PARAMETER;
 469   }
 470
 471   ZeroMem (Sq, sizeof (NVME_SQ));
 472   Sq->Opc  = (UINT8)Packet->NvmeCmd->Cdw0.Opcode;
 473   Sq->Fuse = (UINT8)Packet->NvmeCmd->Cdw0.FusedOperation;
 474   Sq->Cid  = Private->Cid[QueueId]++;
 475   Sq->Nsid = Packet->NvmeCmd->Nsid;
 476
 477   //
 478   // Currently we only support PRP for data transfer, SGL is NOT supported.
 479   //
 480   ASSERT (Sq->Psdt == 0);
 481   if (Sq->Psdt != 0) {
 482     DEBUG ((EFI_D_ERROR, "NvmExpressPassThru: doesn't support SGL mechanism\n"));
 483     return EFI_UNSUPPORTED;
 484   }
 485
 486   Sq->Prp[0] = (UINT64)(UINTN)Packet->TransferBuffer;
 487   //
 488   // If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses.
 489   // Note here we don't handle data buffer for CreateIOSubmitionQueue and CreateIOCompletionQueue cmds because
 490   // these two cmds are special which requires their data buffer must support simultaneous access by both the
 491   // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
 492   //
 493   if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD)) {
 494     if ((Packet->TransferLength == 0) || (Packet->TransferBuffer == NULL)) {
 495       return EFI_INVALID_PARAMETER;
 496     }
 497
 498     if ((Sq->Opc & BIT0) != 0) {
 499       Flag = EfiPciIoOperationBusMasterRead;
 500     } else {
 501       Flag = EfiPciIoOperationBusMasterWrite;
 502     }
 503
 504     MapLength = Packet->TransferLength;
 505     Status = PciIo->Map (
 506                       PciIo,
 507                       Flag,
 508                       Packet->TransferBuffer,
 509                       &MapLength,
 510                       &PhyAddr,
 511                       &MapData
 512                       );
 513     if (EFI_ERROR (Status) || (Packet->TransferLength != MapLength)) {
 514       return EFI_OUT_OF_RESOURCES;
 515     }
 516
 517     Sq->Prp[0] = PhyAddr;
 518     Sq->Prp[1] = 0;
 519
 520     if((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
 521       MapLength = Packet->MetadataLength;
 522       Status = PciIo->Map (
 523                         PciIo,
 524                         Flag,
 525                         Packet->MetadataBuffer,
 526                         &MapLength,
 527                         &PhyAddr,
 528                         &MapMeta
 529                         );
 530       if (EFI_ERROR (Status) || (Packet->MetadataLength != MapLength)) {
 531         PciIo->Unmap (
 532                  PciIo,
 533                  MapData
 534                  );
 535
 536         return EFI_OUT_OF_RESOURCES;
 537       }
 538       Sq->Mptr = PhyAddr;
 539     }
 540   }
 541   //
 542   // If the buffer size spans more than two memory pages (page size as defined in CC.Mps),
 543   // then build a PRP list in the second PRP submission queue entry.
 544   //
 545   Offset = ((UINT16)Sq->Prp[0]) & (EFI_PAGE_SIZE - 1);
 546   Bytes  = Packet->TransferLength;
 547
 548   if ((Offset + Bytes) > (EFI_PAGE_SIZE * 2)) {
 549     //
 550     // Create PrpList for remaining data buffer.
 551     //
 552     PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
 553     Prp = NvmeCreatePrpList (PciIo, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList);
 554     if (Prp == NULL) {
 555       goto EXIT;
 556     }
 557
 558     Sq->Prp[1] = (UINT64)(UINTN)Prp;
 559   } else if ((Offset + Bytes) > EFI_PAGE_SIZE) {
 560     Sq->Prp[1] = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
 561   }
 562
 563   if(Packet->NvmeCmd->Flags & CDW2_VALID) {
 564     Sq->Rsvd2 = (UINT64)Packet->NvmeCmd->Cdw2;
 565   }
 566   if(Packet->NvmeCmd->Flags & CDW3_VALID) {
 567     Sq->Rsvd2 |= LShiftU64 ((UINT64)Packet->NvmeCmd->Cdw3, 32);
 568   }
 569   if(Packet->NvmeCmd->Flags & CDW10_VALID) {
 570     Sq->Payload.Raw.Cdw10 = Packet->NvmeCmd->Cdw10;
 571   }
 572   if(Packet->NvmeCmd->Flags & CDW11_VALID) {
 573     Sq->Payload.Raw.Cdw11 = Packet->NvmeCmd->Cdw11;
 574   }
 575   if(Packet->NvmeCmd->Flags & CDW12_VALID) {
 576     Sq->Payload.Raw.Cdw12 = Packet->NvmeCmd->Cdw12;
 577   }
 578   if(Packet->NvmeCmd->Flags & CDW13_VALID) {
 579     Sq->Payload.Raw.Cdw13 = Packet->NvmeCmd->Cdw13;
 580   }
 581   if(Packet->NvmeCmd->Flags & CDW14_VALID) {
 582     Sq->Payload.Raw.Cdw14 = Packet->NvmeCmd->Cdw14;
 583   }
 584   if(Packet->NvmeCmd->Flags & CDW15_VALID) {
 585     Sq->Payload.Raw.Cdw15 = Packet->NvmeCmd->Cdw15;
 586   }
 587
 588   //
 589   // Ring the submission queue doorbell.
 590   //
 591   if (Event != NULL) {
 592     Private->SqTdbl[QueueId].Sqt =
 593       (Private->SqTdbl[QueueId].Sqt + 1) % (NVME_ASYNC_CSQ_SIZE + 1);
 594   } else {
 595     Private->SqTdbl[QueueId].Sqt ^= 1;
 596   }
 597   Data = ReadUnaligned32 ((UINT32*)&Private->SqTdbl[QueueId]);
 598   PciIo->Mem.Write (
 599                PciIo,
 600                EfiPciIoWidthUint32,
 601                NVME_BAR,
 602                NVME_SQTDBL_OFFSET(QueueId, Private->Cap.Dstrd),
 603                1,
 604                &Data
 605                );
 606
 607   //
 608   // For non-blocking requests, return directly if the command is placed
 609   // in the submission queue.
 610   //
 611   if (Event != NULL) {
 612     AsyncRequest = AllocateZeroPool (sizeof (NVME_PASS_THRU_ASYNC_REQ));
 613     if (AsyncRequest == NULL) {
 614       Status = EFI_DEVICE_ERROR;
 615       goto EXIT;
 616     }
 617
 618     AsyncRequest->Signature     = NVME_PASS_THRU_ASYNC_REQ_SIG;
 619     AsyncRequest->Packet        = Packet;
 620     AsyncRequest->CommandId     = Sq->Cid;
 621     AsyncRequest->CallerEvent   = Event;
 622
 623     OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
 624     InsertTailList (&Private->AsyncPassThruQueue, &AsyncRequest->Link);
 625     gBS->RestoreTPL (OldTpl);
 626
 627     return EFI_SUCCESS;
 628   }
 629
 630   Status = gBS->CreateEvent (
 631                   EVT_TIMER,
 632                   TPL_CALLBACK,
 633                   NULL,
 634                   NULL,
 635                   &TimerEvent
 636                   );
 637   if (EFI_ERROR (Status)) {
 638     goto EXIT;
 639   }
 640
 641   Status = gBS->SetTimer(TimerEvent, TimerRelative, Packet->CommandTimeout);
 642
 643   if (EFI_ERROR(Status)) {
 644     goto EXIT;
 645   }
 646
 647   //
 648   // Wait for completion queue to get filled in.
 649   //
 650   Status = EFI_TIMEOUT;
 651   while (EFI_ERROR (gBS->CheckEvent (TimerEvent))) {
 652     if (Cq->Pt != Private->Pt[QueueId]) {
 653       Status = EFI_SUCCESS;
 654       break;
 655     }
 656   }
 657
 658   //
 659   // Check the NVMe cmd execution result
 660   //
 661   if (Status != EFI_TIMEOUT) {
 662     if ((Cq->Sct == 0) && (Cq->Sc == 0)) {
 663       Status = EFI_SUCCESS;
 664     } else {
 665       Status = EFI_DEVICE_ERROR;
 666       //
 667       // Copy the Respose Queue entry for this command to the callers response buffer
 668       //
 669       CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
 670
 671       //
 672       // Dump every completion entry status for debugging.
 673       //
 674       DEBUG_CODE_BEGIN();
 675         NvmeDumpStatus(Cq);
 676       DEBUG_CODE_END();
 677     }
 678   }
 679
 680   if ((Private->CqHdbl[QueueId].Cqh ^= 1) == 0) {
 681     Private->Pt[QueueId] ^= 1;
 682   }
 683
 684   Data = ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueId]);
 685   PciIo->Mem.Write (
 686                PciIo,
 687                EfiPciIoWidthUint32,
 688                NVME_BAR,
 689                NVME_CQHDBL_OFFSET(QueueId, Private->Cap.Dstrd),
 690                1,
 691                &Data
 692                );
 693
 694 EXIT:
 695   if (MapData != NULL) {
 696     PciIo->Unmap (
 697              PciIo,
 698              MapData
 699              );
 700   }
 701
 702   if (MapMeta != NULL) {
 703     PciIo->Unmap (
 704              PciIo,
 705              MapMeta
 706              );
 707   }
 708
 709   if (MapPrpList != NULL) {
 710     PciIo->Unmap (
 711              PciIo,
 712              MapPrpList
 713              );
 714   }
 715
 716   if (Prp != NULL) {
 717     PciIo->FreeBuffer (PciIo, PrpListNo, PrpListHost);
 718   }
 719
 720   if (TimerEvent != NULL) {
 721     gBS->CloseEvent (TimerEvent);
 722   }
 723   return Status;
 724 }
 725
 726 /**
 727   Used to retrieve the next namespace ID for this NVM Express controller.
 728
 729   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() function retrieves the next valid
 730   namespace ID on this NVM Express controller.
 731
 732   If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then the first valid namespace
 733   ID defined on the NVM Express controller is returned in the location pointed to by NamespaceId
 734   and a status of EFI_SUCCESS is returned.
 735
 736   If on input the value pointed to by NamespaceId is an invalid namespace ID other than 0xFFFFFFFF,
 737   then EFI_INVALID_PARAMETER is returned.
 738
 739   If on input the value pointed to by NamespaceId is a valid namespace ID, then the next valid
 740   namespace ID on the NVM Express controller is returned in the location pointed to by NamespaceId,
 741   and EFI_SUCCESS is returned.
 742
 743   If the value pointed to by NamespaceId is the namespace ID of the last namespace on the NVM
 744   Express controller, then EFI_NOT_FOUND is returned.
 745
 746   @param[in]     This           A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 747   @param[in,out] NamespaceId    On input, a pointer to a legal NamespaceId for an NVM Express
 748                                 namespace present on the NVM Express controller. On output, a
 749                                 pointer to the next NamespaceId of an NVM Express namespace on
 750                                 an NVM Express controller. An input value of 0xFFFFFFFF retrieves
 751                                 the first NamespaceId for an NVM Express namespace present on an
 752                                 NVM Express controller.
 753
 754   @retval EFI_SUCCESS           The Namespace ID of the next Namespace was returned.
 755   @retval EFI_NOT_FOUND         There are no more namespaces defined on this controller.
 756   @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value other than 0xFFFFFFFF.
 757
 758 **/
 759 EFI_STATUS
 760 EFIAPI
 761 NvmExpressGetNextNamespace (
 762   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 763   IN OUT UINT32                                      *NamespaceId
 764   )
 765 {
 766   NVME_CONTROLLER_PRIVATE_DATA     *Private;
 767   NVME_ADMIN_NAMESPACE_DATA        *NamespaceData;
 768   UINT32                           NextNamespaceId;
 769   EFI_STATUS                       Status;
 770
 771   if ((This == NULL) || (NamespaceId == NULL)) {
 772     return EFI_INVALID_PARAMETER;
 773   }
 774
 775   NamespaceData = NULL;
 776   Status        = EFI_NOT_FOUND;
 777
 778   Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 779   //
 780   // If the NamespaceId input value is 0xFFFFFFFF, then get the first valid namespace ID
 781   //
 782   if (*NamespaceId == 0xFFFFFFFF) {
 783     //
 784     // Start with the first namespace ID
 785     //
 786     NextNamespaceId = 1;
 787     //
 788     // Allocate buffer for Identify Namespace data.
 789     //
 790     NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
 791
 792     if (NamespaceData == NULL) {
 793       return EFI_NOT_FOUND;
 794     }
 795
 796     Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
 797     if (EFI_ERROR(Status)) {
 798       goto Done;
 799     }
 800
 801     *NamespaceId = NextNamespaceId;
 802   } else {
 803     if (*NamespaceId > Private->ControllerData->Nn) {
 804       return EFI_INVALID_PARAMETER;
 805     }
 806
 807     NextNamespaceId = *NamespaceId + 1;
 808     if (NextNamespaceId > Private->ControllerData->Nn) {
 809       return EFI_NOT_FOUND;
 810     }
 811
 812     //
 813     // Allocate buffer for Identify Namespace data.
 814     //
 815     NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
 816     if (NamespaceData == NULL) {
 817       return EFI_NOT_FOUND;
 818     }
 819
 820     Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
 821     if (EFI_ERROR(Status)) {
 822       goto Done;
 823     }
 824
 825     *NamespaceId = NextNamespaceId;
 826   }
 827
 828 Done:
 829   if (NamespaceData != NULL) {
 830     FreePool(NamespaceData);
 831   }
 832
 833   return Status;
 834 }
 835
 836 /**
 837   Used to translate a device path node to a namespace ID.
 838
 839   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamespace() function determines the namespace ID associated with the
 840   namespace described by DevicePath.
 841
 842   If DevicePath is a device path node type that the NVM Express Pass Thru driver supports, then the NVM Express
 843   Pass Thru driver will attempt to translate the contents DevicePath into a namespace ID.
 844
 845   If this translation is successful, then that namespace ID is returned in NamespaceId, and EFI_SUCCESS is returned
 846
 847   @param[in]  This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 848   @param[in]  DevicePath          A pointer to the device path node that describes an NVM Express namespace on
 849                                   the NVM Express controller.
 850   @param[out] NamespaceId         The NVM Express namespace ID contained in the device path node.
 851
 852   @retval EFI_SUCCESS             DevicePath was successfully translated to NamespaceId.
 853   @retval EFI_INVALID_PARAMETER   If DevicePath or NamespaceId are NULL, then EFI_INVALID_PARAMETER is returned.
 854   @retval EFI_UNSUPPORTED         If DevicePath is not a device path node type that the NVM Express Pass Thru driver
 855                                   supports, then EFI_UNSUPPORTED is returned.
 856   @retval EFI_NOT_FOUND           If DevicePath is a device path node type that the NVM Express Pass Thru driver
 857                                   supports, but there is not a valid translation from DevicePath to a namespace ID,
 858                                   then EFI_NOT_FOUND is returned.
 859 **/
 860 EFI_STATUS
 861 EFIAPI
 862 NvmExpressGetNamespace (
 863   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 864   IN     EFI_DEVICE_PATH_PROTOCOL                    *DevicePath,
 865      OUT UINT32                                      *NamespaceId
 866   )
 867 {
 868   NVME_NAMESPACE_DEVICE_PATH       *Node;
 869   NVME_CONTROLLER_PRIVATE_DATA     *Private;
 870
 871   if ((This == NULL) || (DevicePath == NULL) || (NamespaceId == NULL)) {
 872     return EFI_INVALID_PARAMETER;
 873   }
 874
 875   if (DevicePath->Type != MESSAGING_DEVICE_PATH) {
 876     return EFI_UNSUPPORTED;
 877   }
 878
 879   Node    = (NVME_NAMESPACE_DEVICE_PATH *)DevicePath;
 880   Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 881
 882   if (DevicePath->SubType == MSG_NVME_NAMESPACE_DP) {
 883     if (DevicePathNodeLength(DevicePath) != sizeof(NVME_NAMESPACE_DEVICE_PATH)) {
 884       return EFI_NOT_FOUND;
 885     }
 886
 887     //
 888     // Check NamespaceId in the device path node is valid or not.
 889     //
 890     if ((Node->NamespaceId == 0) ||
 891       (Node->NamespaceId > Private->ControllerData->Nn)) {
 892       return EFI_NOT_FOUND;
 893     }
 894
 895     *NamespaceId = Node->NamespaceId;
 896
 897     return EFI_SUCCESS;
 898   } else {
 899     return EFI_UNSUPPORTED;
 900   }
 901 }
 902
 903 /**
 904   Used to allocate and build a device path node for an NVM Express namespace on an NVM Express controller.
 905
 906   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() function allocates and builds a single device
 907   path node for the NVM Express namespace specified by NamespaceId.
 908
 909   If the NamespaceId is not valid, then EFI_NOT_FOUND is returned.
 910
 911   If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.
 912
 913   If there are not enough resources to allocate the device path node, then EFI_OUT_OF_RESOURCES is returned.
 914
 915   Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of DevicePath are
 916   initialized to describe the NVM Express namespace specified by NamespaceId, and EFI_SUCCESS is returned.
 917
 918   @param[in]     This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 919   @param[in]     NamespaceId         The NVM Express namespace ID  for which a device path node is to be
 920                                      allocated and built. Caller must set the NamespaceId to zero if the
 921                                      device path node will contain a valid UUID.
 922   @param[in,out] DevicePath          A pointer to a single device path node that describes the NVM Express
 923                                      namespace specified by NamespaceId. This function is responsible for
 924                                      allocating the buffer DevicePath with the boot service AllocatePool().
 925                                      It is the caller's responsibility to free DevicePath when the caller
 926                                      is finished with DevicePath.
 927   @retval EFI_SUCCESS                The device path node that describes the NVM Express namespace specified
 928                                      by NamespaceId was allocated and returned in DevicePath.
 929   @retval EFI_NOT_FOUND              The NamespaceId is not valid.
 930   @retval EFI_INVALID_PARAMETER      DevicePath is NULL.
 931   @retval EFI_OUT_OF_RESOURCES       There are not enough resources to allocate the DevicePath node.
 932
 933 **/
 934 EFI_STATUS
 935 EFIAPI
 936 NvmExpressBuildDevicePath (
 937   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 938   IN     UINT32                                      NamespaceId,
 939   IN OUT EFI_DEVICE_PATH_PROTOCOL                    **DevicePath
 940   )
 941 {
 942   NVME_NAMESPACE_DEVICE_PATH     *Node;
 943   NVME_CONTROLLER_PRIVATE_DATA   *Private;
 944   EFI_STATUS                     Status;
 945   NVME_ADMIN_NAMESPACE_DATA      *NamespaceData;
 946
 947   //
 948   // Validate parameters
 949   //
 950   if ((This == NULL) || (DevicePath == NULL)) {
 951     return EFI_INVALID_PARAMETER;
 952   }
 953
 954   Status  = EFI_SUCCESS;
 955   Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 956
 957   //
 958   // Check NamespaceId is valid or not.
 959   //
 960   if ((NamespaceId == 0) ||
 961     (NamespaceId > Private->ControllerData->Nn)) {
 962     return EFI_NOT_FOUND;
 963   }
 964
 965   Node = (NVME_NAMESPACE_DEVICE_PATH *)AllocateZeroPool (sizeof (NVME_NAMESPACE_DEVICE_PATH));
 966   if (Node == NULL) {
 967     return EFI_OUT_OF_RESOURCES;
 968   }
 969
 970   Node->Header.Type    = MESSAGING_DEVICE_PATH;
 971   Node->Header.SubType = MSG_NVME_NAMESPACE_DP;
 972   SetDevicePathNodeLength (&Node->Header, sizeof (NVME_NAMESPACE_DEVICE_PATH));
 973   Node->NamespaceId    = NamespaceId;
 974
 975   //
 976   // Allocate a buffer for Identify Namespace data.
 977   //
 978   NamespaceData = NULL;
 979   NamespaceData = AllocateZeroPool(sizeof (NVME_ADMIN_NAMESPACE_DATA));
 980   if(NamespaceData == NULL) {
 981     Status = EFI_OUT_OF_RESOURCES;
 982     goto Exit;
 983   }
 984
 985   //
 986   // Get UUID from specified Identify Namespace data.
 987   //
 988   Status = NvmeIdentifyNamespace (
 989              Private,
 990              NamespaceId,
 991              (VOID *)NamespaceData
 992              );
 993
 994   if (EFI_ERROR(Status)) {
 995     goto Exit;
 996   }
 997
 998   Node->NamespaceUuid = NamespaceData->Eui64;
 999
1000   *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)Node;
1001
1002 Exit:
1003   if(NamespaceData != NULL) {
1004     FreePool (NamespaceData);
1005   }
1006
1007   if (EFI_ERROR (Status)) {
1008     FreePool (Node);
1009   }
1010
1011   return Status;
1012 }
1013