2 PCI eunmeration implementation on entire PCI bus system for PCI Bus module.
4 Copyright (c) 2006 - 2009, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 This routine is used to enumerate entire pci bus system
21 @param Controller Parent controller handle.
23 @retval EFI_SUCCESS PCI enumeration finished successfully.
24 @retval other Some error occurred when enumerating the pci bus system.
29 IN EFI_HANDLE Controller
33 EFI_HANDLE HostBridgeHandle
;
35 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
;
36 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
39 // If PCI bus has already done the full enumeration, never do it again
41 if (!gFullEnumeration
) {
42 return PciEnumeratorLight (Controller
);
46 // Get the rootbridge Io protocol to find the host bridge handle
48 Status
= gBS
->OpenProtocol (
50 &gEfiPciRootBridgeIoProtocolGuid
,
51 (VOID
**) &PciRootBridgeIo
,
52 gPciBusDriverBinding
.DriverBindingHandle
,
54 EFI_OPEN_PROTOCOL_GET_PROTOCOL
57 if (EFI_ERROR (Status
)) {
62 // Get the host bridge handle
64 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
67 // Get the pci host bridge resource allocation protocol
69 Status
= gBS
->OpenProtocol (
71 &gEfiPciHostBridgeResourceAllocationProtocolGuid
,
72 (VOID
**) &PciResAlloc
,
73 gPciBusDriverBinding
.DriverBindingHandle
,
75 EFI_OPEN_PROTOCOL_GET_PROTOCOL
78 if (EFI_ERROR (Status
)) {
83 // Notify the pci bus enumeration is about to begin
85 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginEnumeration
);
88 // Start the bus allocation phase
90 Status
= PciHostBridgeEnumerator (PciResAlloc
);
92 if (EFI_ERROR (Status
)) {
97 // Submit the resource request
99 Status
= PciHostBridgeResourceAllocator (PciResAlloc
);
101 if (EFI_ERROR (Status
)) {
106 // Notify the pci bus enumeration is about to complete
108 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndEnumeration
);
113 Status
= PciHostBridgeP2CProcess (PciResAlloc
);
115 if (EFI_ERROR (Status
)) {
120 // Process attributes for devices on this host bridge
122 Status
= PciHostBridgeDeviceAttribute (PciResAlloc
);
123 if (EFI_ERROR (Status
)) {
127 gFullEnumeration
= FALSE
;
130 Status
= gBS
->InstallProtocolInterface (
132 &gEfiPciEnumerationCompleteProtocolGuid
,
133 EFI_NATIVE_INTERFACE
,
136 if (EFI_ERROR (Status
)) {
144 Enumerate PCI root bridge.
146 @param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
147 @param RootBridgeDev Instance of root bridge device.
149 @retval EFI_SUCCESS Successfully enumerated root bridge.
150 @retval other Failed to enumerate root bridge.
154 PciRootBridgeEnumerator (
155 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
156 IN PCI_IO_DEVICE
*RootBridgeDev
160 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
162 UINT8 StartBusNumber
;
163 UINT8 PaddedBusRange
;
164 EFI_HANDLE RootBridgeHandle
;
171 // Get the root bridge handle
173 RootBridgeHandle
= RootBridgeDev
->Handle
;
175 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
177 EFI_IO_BUS_PCI
| EFI_IOB_PCI_PC_BUS_ENUM
,
178 RootBridgeDev
->DevicePath
182 // Get the Bus information
184 Status
= PciResAlloc
->StartBusEnumeration (
187 (VOID
**) &Configuration
190 if (EFI_ERROR (Status
)) {
195 // Get the bus number to start with
197 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
198 PaddedBusRange
= (UINT8
) (Configuration
->AddrRangeMax
);
201 // Initialize the subordinate bus number
203 SubBusNumber
= StartBusNumber
;
206 // Reset all assigned PCI bus number
208 ResetAllPpbBusNumber (
216 Status
= PciScanBus (
218 (UINT8
) (Configuration
->AddrRangeMin
),
223 if (EFI_ERROR (Status
)) {
229 // Assign max bus number scanned
231 Configuration
->AddrLen
= SubBusNumber
- StartBusNumber
+ 1 + PaddedBusRange
;
236 Status
= PciResAlloc
->SetBusNumbers (
242 FreePool (Configuration
);
244 if (EFI_ERROR (Status
)) {
252 This routine is used to process all PCI devices' Option Rom
253 on a certain root bridge.
255 @param Bridge Given parent's root bridge.
256 @param RomBase Base address of ROM driver loaded from.
257 @param MaxLength Maximum rom size.
262 IN PCI_IO_DEVICE
*Bridge
,
267 LIST_ENTRY
*CurrentLink
;
271 // Go through bridges to reach all devices
273 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
274 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
275 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
276 if (!IsListEmpty (&Temp
->ChildList
)) {
279 // Go further to process the option rom under this bridge
281 ProcessOptionRom (Temp
, RomBase
, MaxLength
);
284 if (Temp
->RomSize
!= 0 && Temp
->RomSize
<= MaxLength
) {
287 // Load and process the option rom
289 LoadOpRomImage (Temp
, RomBase
);
292 CurrentLink
= CurrentLink
->ForwardLink
;
297 This routine is used to assign bus number to the given PCI bus system
299 @param Bridge Parent root bridge instance.
300 @param StartBusNumber Number of beginning.
301 @param SubBusNumber The number of sub bus.
303 @retval EFI_SUCCESS Successfully assigned bus number.
304 @retval EFI_DEVICE_ERROR Failed to assign bus number.
309 IN PCI_IO_DEVICE
*Bridge
,
310 IN UINT8 StartBusNumber
,
311 OUT UINT8
*SubBusNumber
322 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
324 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
329 *SubBusNumber
= StartBusNumber
;
332 // First check to see whether the parent is ppb
334 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
335 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
338 // Check to see whether a pci device is present
340 Status
= PciDevicePresent (
348 if (!EFI_ERROR (Status
) &&
349 (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
))) {
352 // Reserved one bus for cardbus bridge
354 SecondBus
= ++(*SubBusNumber
);
356 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
358 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x18);
360 Status
= PciRootBridgeIo
->Pci
.Write (
369 // Initialize SubBusNumber to SecondBus
371 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x1A);
372 Status
= PciRootBridgeIo
->Pci
.Write (
380 // If it is PPB, resursively search down this bridge
382 if (IS_PCI_BRIDGE (&Pci
)) {
385 Status
= PciRootBridgeIo
->Pci
.Write (
393 Status
= PciAssignBusNumber (
399 if (EFI_ERROR (Status
)) {
400 return EFI_DEVICE_ERROR
;
405 // Set the current maximum bus number under the PPB
407 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x1A);
409 Status
= PciRootBridgeIo
->Pci
.Write (
419 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
422 // Skip sub functions, this is not a multi function device
433 This routine is used to determine the root bridge attribute by interfacing
434 the host bridge resource allocation protocol.
436 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
437 @param RootBridgeDev Root bridge instance
439 @retval EFI_SUCCESS Successfully got root bridge's attribute.
440 @retval other Failed to get attribute.
444 DetermineRootBridgeAttributes (
445 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
446 IN PCI_IO_DEVICE
*RootBridgeDev
451 EFI_HANDLE RootBridgeHandle
;
454 RootBridgeHandle
= RootBridgeDev
->Handle
;
457 // Get root bridge attribute by calling into pci host bridge resource allocation protocol
459 Status
= PciResAlloc
->GetAllocAttributes (
465 if (EFI_ERROR (Status
)) {
470 // Here is the point where PCI bus driver calls HOST bridge allocation protocol
471 // Currently we hardcoded for ea815
473 if ((Attributes
& EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
) != 0) {
474 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED
;
477 if ((Attributes
& EFI_PCI_HOST_BRIDGE_MEM64_DECODE
) != 0) {
478 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM64_DECODE_SUPPORTED
;
481 RootBridgeDev
->Decodes
|= EFI_BRIDGE_MEM32_DECODE_SUPPORTED
;
482 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
;
483 RootBridgeDev
->Decodes
|= EFI_BRIDGE_IO16_DECODE_SUPPORTED
;
489 Get Max Option Rom size on specified bridge.
491 @param Bridge Given bridge device instance.
493 @return Max size of option rom needed.
497 GetMaxOptionRomSize (
498 IN PCI_IO_DEVICE
*Bridge
501 LIST_ENTRY
*CurrentLink
;
503 UINT64 MaxOptionRomSize
;
504 UINT64 TempOptionRomSize
;
506 MaxOptionRomSize
= 0;
509 // Go through bridges to reach all devices
511 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
512 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
513 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
514 if (!IsListEmpty (&Temp
->ChildList
)) {
517 // Get max option rom size under this bridge
519 TempOptionRomSize
= GetMaxOptionRomSize (Temp
);
522 // Compare with the option rom size of the bridge
523 // Get the larger one
525 if (Temp
->RomSize
> TempOptionRomSize
) {
526 TempOptionRomSize
= Temp
->RomSize
;
532 // For devices get the rom size directly
534 TempOptionRomSize
= Temp
->RomSize
;
538 // Get the largest rom size on this bridge
540 if (TempOptionRomSize
> MaxOptionRomSize
) {
541 MaxOptionRomSize
= TempOptionRomSize
;
544 CurrentLink
= CurrentLink
->ForwardLink
;
547 return MaxOptionRomSize
;
551 Process attributes of devices on this host bridge
553 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
555 @retval EFI_SUCCESS Successfully process attribute.
556 @retval EFI_NOT_FOUND Can not find the specific root bridge device.
557 @retval other Failed to determine the root bridge device's attribute.
561 PciHostBridgeDeviceAttribute (
562 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
565 EFI_HANDLE RootBridgeHandle
;
566 PCI_IO_DEVICE
*RootBridgeDev
;
569 RootBridgeHandle
= NULL
;
571 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
574 // Get RootBridg Device by handle
576 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
578 if (RootBridgeDev
== NULL
) {
579 return EFI_NOT_FOUND
;
583 // Set the attributes for devcies behind the Root Bridge
585 Status
= DetermineDeviceAttribute (RootBridgeDev
);
586 if (EFI_ERROR (Status
)) {
596 Get resource allocation status from the ACPI resource descriptor.
598 @param AcpiConfig Point to Acpi configuration table.
599 @param IoResStatus Return the status of I/O resource.
600 @param Mem32ResStatus Return the status of 32-bit Memory resource.
601 @param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.
602 @param Mem64ResStatus Return the status of 64-bit Memory resource.
603 @param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.
607 GetResourceAllocationStatus (
609 OUT UINT64
*IoResStatus
,
610 OUT UINT64
*Mem32ResStatus
,
611 OUT UINT64
*PMem32ResStatus
,
612 OUT UINT64
*Mem64ResStatus
,
613 OUT UINT64
*PMem64ResStatus
618 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*ACPIAddressDesc
;
620 Temp
= (UINT8
*) AcpiConfig
;
622 while (*Temp
== ACPI_ADDRESS_SPACE_DESCRIPTOR
) {
624 ACPIAddressDesc
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Temp
;
625 ResStatus
= ACPIAddressDesc
->AddrTranslationOffset
;
627 switch (ACPIAddressDesc
->ResType
) {
629 if (ACPIAddressDesc
->AddrSpaceGranularity
== 32) {
630 if (ACPIAddressDesc
->SpecificFlag
== 0x06) {
634 *PMem32ResStatus
= ResStatus
;
639 *Mem32ResStatus
= ResStatus
;
643 if (ACPIAddressDesc
->AddrSpaceGranularity
== 64) {
644 if (ACPIAddressDesc
->SpecificFlag
== 0x06) {
648 *PMem64ResStatus
= ResStatus
;
653 *Mem64ResStatus
= ResStatus
;
663 *IoResStatus
= ResStatus
;
670 Temp
+= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
);
675 Remove a PCI device from device pool and mark its bar.
677 @param PciDevice Instance of Pci device.
679 @retval EFI_SUCCESS Successfully remove the PCI device.
680 @retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
685 IN PCI_IO_DEVICE
*PciDevice
688 PCI_IO_DEVICE
*Bridge
;
690 LIST_ENTRY
*CurrentLink
;
693 // Remove the padding resource from a bridge
695 if ( IS_PCI_BRIDGE(&PciDevice
->Pci
) &&
696 PciDevice
->ResourcePaddingDescriptors
!= NULL
) {
697 FreePool (PciDevice
->ResourcePaddingDescriptors
);
698 PciDevice
->ResourcePaddingDescriptors
= NULL
;
705 if (IS_PCI_BRIDGE (&PciDevice
->Pci
) || (PciDevice
->Parent
== NULL
)) {
709 if (IS_CARDBUS_BRIDGE (&PciDevice
->Pci
)) {
711 // Get the root bridge device
714 while (Bridge
->Parent
!= NULL
) {
715 Bridge
= Bridge
->Parent
;
718 RemoveAllPciDeviceOnBridge (Bridge
->Handle
, PciDevice
);
723 InitializeP2C (PciDevice
);
729 Bridge
= PciDevice
->Parent
;
730 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
731 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
732 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
733 if (Temp
== PciDevice
) {
734 InitializePciDevice (Temp
);
735 RemoveEntryList (CurrentLink
);
736 FreePciDevice (Temp
);
740 CurrentLink
= CurrentLink
->ForwardLink
;
747 Determine whethter a PCI device can be rejected.
749 @param PciResNode Pointer to Pci resource node instance.
751 @retval TRUE The PCI device can be rejected.
752 @retval TRUE The PCI device cannot be rejected.
757 IN PCI_RESOURCE_NODE
*PciResNode
762 Temp
= PciResNode
->PciDev
;
765 // Ensure the device is present
772 // PPB and RB should go ahead
774 if (IS_PCI_BRIDGE (&Temp
->Pci
) || (Temp
->Parent
== NULL
)) {
779 // Skip device on Bus0
781 if ((Temp
->Parent
!= NULL
) && (Temp
->BusNumber
== 0)) {
788 if (IS_PCI_VGA (&Temp
->Pci
)) {
796 Compare two resource nodes and get the larger resource consumer.
798 @param PciResNode1 resource node 1 want to be compared
799 @param PciResNode2 resource node 2 want to be compared
801 @return Larger resource node.
805 GetLargerConsumerDevice (
806 IN PCI_RESOURCE_NODE
*PciResNode1
,
807 IN PCI_RESOURCE_NODE
*PciResNode2
810 if (PciResNode2
== NULL
) {
814 if ((IS_PCI_BRIDGE(&(PciResNode2
->PciDev
->Pci
)) || (PciResNode2
->PciDev
->Parent
== NULL
)) \
815 && (PciResNode2
->ResourceUsage
!= PciResUsagePadding
) )
820 if (PciResNode1
== NULL
) {
824 if ((PciResNode1
->Length
) > (PciResNode2
->Length
)) {
833 Get the max resource consumer in the host resource pool.
835 @param ResPool Pointer to resource pool node.
837 @return The max resource consumer in the host resource pool.
841 GetMaxResourceConsumerDevice (
842 IN PCI_RESOURCE_NODE
*ResPool
845 PCI_RESOURCE_NODE
*Temp
;
846 LIST_ENTRY
*CurrentLink
;
847 PCI_RESOURCE_NODE
*PciResNode
;
848 PCI_RESOURCE_NODE
*PPBResNode
;
852 CurrentLink
= ResPool
->ChildList
.ForwardLink
;
853 while (CurrentLink
!= NULL
&& CurrentLink
!= &ResPool
->ChildList
) {
855 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
857 if (!IsRejectiveDevice (Temp
)) {
858 CurrentLink
= CurrentLink
->ForwardLink
;
862 if ((IS_PCI_BRIDGE (&(Temp
->PciDev
->Pci
)) || (Temp
->PciDev
->Parent
== NULL
)) \
863 && (Temp
->ResourceUsage
!= PciResUsagePadding
))
865 PPBResNode
= GetMaxResourceConsumerDevice (Temp
);
866 PciResNode
= GetLargerConsumerDevice (PciResNode
, PPBResNode
);
868 PciResNode
= GetLargerConsumerDevice (PciResNode
, Temp
);
871 CurrentLink
= CurrentLink
->ForwardLink
;
878 Adjust host bridge allocation so as to reduce resource requirement
880 @param IoPool Pointer to instance of I/O resource Node.
881 @param Mem32Pool Pointer to instance of 32-bit memory resource Node.
882 @param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.
883 @param Mem64Pool Pointer to instance of 64-bit memory resource node.
884 @param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.
885 @param IoResStatus Status of I/O resource Node.
886 @param Mem32ResStatus Status of 32-bit memory resource Node.
887 @param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.
888 @param Mem64ResStatus Status of 64-bit memory resource node.
889 @param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.
891 @retval EFI_SUCCESS Successfully adjusted resoruce on host bridge.
892 @retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.
896 PciHostBridgeAdjustAllocation (
897 IN PCI_RESOURCE_NODE
*IoPool
,
898 IN PCI_RESOURCE_NODE
*Mem32Pool
,
899 IN PCI_RESOURCE_NODE
*PMem32Pool
,
900 IN PCI_RESOURCE_NODE
*Mem64Pool
,
901 IN PCI_RESOURCE_NODE
*PMem64Pool
,
902 IN UINT64 IoResStatus
,
903 IN UINT64 Mem32ResStatus
,
904 IN UINT64 PMem32ResStatus
,
905 IN UINT64 Mem64ResStatus
,
906 IN UINT64 PMem64ResStatus
909 BOOLEAN AllocationAjusted
;
910 PCI_RESOURCE_NODE
*PciResNode
;
911 PCI_RESOURCE_NODE
*ResPool
[5];
912 PCI_IO_DEVICE
*RemovedPciDev
[5];
914 UINTN RemovedPciDevNum
;
918 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
921 ZeroMem (RemovedPciDev
, 5 * sizeof (PCI_IO_DEVICE
*));
922 RemovedPciDevNum
= 0;
925 ResPool
[1] = Mem32Pool
;
926 ResPool
[2] = PMem32Pool
;
927 ResPool
[3] = Mem64Pool
;
928 ResPool
[4] = PMem64Pool
;
930 ResStatus
[0] = IoResStatus
;
931 ResStatus
[1] = Mem32ResStatus
;
932 ResStatus
[2] = PMem32ResStatus
;
933 ResStatus
[3] = Mem64ResStatus
;
934 ResStatus
[4] = PMem64ResStatus
;
936 AllocationAjusted
= FALSE
;
938 for (ResType
= 0; ResType
< 5; ResType
++) {
940 if (ResStatus
[ResType
] == EFI_RESOURCE_SATISFIED
) {
944 if (ResStatus
[ResType
] == EFI_RESOURCE_NOT_SATISFIED
) {
946 // Host bridge hasn't this resource type
952 // Hostbridge hasn't enough resource
954 PciResNode
= GetMaxResourceConsumerDevice (ResPool
[ResType
]);
955 if (PciResNode
== NULL
) {
960 // Check if the device has been removed before
962 for (DevIndex
= 0; DevIndex
< RemovedPciDevNum
; DevIndex
++) {
963 if (PciResNode
->PciDev
== RemovedPciDev
[DevIndex
]) {
968 if (DevIndex
!= RemovedPciDevNum
) {
973 // Remove the device if it isn't in the array
975 Status
= RejectPciDevice (PciResNode
->PciDev
);
976 if (Status
== EFI_SUCCESS
) {
979 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
982 // Have no way to get ReqRes, AllocRes & Bar here
984 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
985 AllocFailExtendedData
.DevicePathSize
= sizeof (EFI_DEVICE_PATH_PROTOCOL
);
986 AllocFailExtendedData
.DevicePath
= (UINT8
*) PciResNode
->PciDev
->DevicePath
;
987 AllocFailExtendedData
.Bar
= PciResNode
->Bar
;
989 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
991 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
992 (VOID
*) &AllocFailExtendedData
,
993 sizeof (AllocFailExtendedData
)
997 // Add it to the array and indicate at least a device has been rejected
999 RemovedPciDev
[RemovedPciDevNum
++] = PciResNode
->PciDev
;
1000 AllocationAjusted
= TRUE
;
1007 if (AllocationAjusted
) {
1015 Summary requests for all resource type, and contruct ACPI resource
1018 @param Bridge detecting bridge
1019 @param IoNode Pointer to instance of I/O resource Node
1020 @param Mem32Node Pointer to instance of 32-bit memory resource Node
1021 @param PMem32Node Pointer to instance of 32-bit Pmemory resource node
1022 @param Mem64Node Pointer to instance of 64-bit memory resource node
1023 @param PMem64Node Pointer to instance of 64-bit Pmemory resource node
1024 @param Config Output buffer holding new constructed APCI resource requestor
1026 @retval EFI_SUCCESS Successfully constructed ACPI resource.
1027 @retval EFI_OUT_OF_RESOURCES No memory availabe.
1031 ConstructAcpiResourceRequestor (
1032 IN PCI_IO_DEVICE
*Bridge
,
1033 IN PCI_RESOURCE_NODE
*IoNode
,
1034 IN PCI_RESOURCE_NODE
*Mem32Node
,
1035 IN PCI_RESOURCE_NODE
*PMem32Node
,
1036 IN PCI_RESOURCE_NODE
*Mem64Node
,
1037 IN PCI_RESOURCE_NODE
*PMem64Node
,
1043 UINT8
*Configuration
;
1044 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
1045 EFI_ACPI_END_TAG_DESCRIPTOR
*PtrEnd
;
1053 // if there is io request, add to the io aperture
1055 if (ResourceRequestExisted (IoNode
)) {
1061 // if there is mem32 request, add to the mem32 aperture
1063 if (ResourceRequestExisted (Mem32Node
)) {
1069 // if there is pmem32 request, add to the pmem32 aperture
1071 if (ResourceRequestExisted (PMem32Node
)) {
1077 // if there is mem64 request, add to the mem64 aperture
1079 if (ResourceRequestExisted (Mem64Node
)) {
1085 // if there is pmem64 request, add to the pmem64 aperture
1087 if (ResourceRequestExisted (PMem64Node
)) {
1092 if (NumConfig
!= 0) {
1095 // If there is at least one type of resource request,
1096 // allocate a acpi resource node
1098 Configuration
= AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) * NumConfig
+ sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1099 if (Configuration
== NULL
) {
1100 return EFI_OUT_OF_RESOURCES
;
1103 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Configuration
;
1106 // Deal with io aperture
1108 if ((Aperture
& 0x01) != 0) {
1109 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1110 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1114 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_IO
;
1118 Ptr
->SpecificFlag
= 1;
1119 Ptr
->AddrLen
= IoNode
->Length
;
1120 Ptr
->AddrRangeMax
= IoNode
->Alignment
;
1125 // Deal with mem32 aperture
1127 if ((Aperture
& 0x02) != 0) {
1128 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1129 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1133 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1137 Ptr
->SpecificFlag
= 0;
1141 Ptr
->AddrSpaceGranularity
= 32;
1142 Ptr
->AddrLen
= Mem32Node
->Length
;
1143 Ptr
->AddrRangeMax
= Mem32Node
->Alignment
;
1149 // Deal with Pmem32 aperture
1151 if ((Aperture
& 0x04) != 0) {
1152 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1153 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1157 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1161 Ptr
->SpecificFlag
= 0x6;
1165 Ptr
->AddrSpaceGranularity
= 32;
1166 Ptr
->AddrLen
= PMem32Node
->Length
;
1167 Ptr
->AddrRangeMax
= PMem32Node
->Alignment
;
1172 // Deal with mem64 aperture
1174 if ((Aperture
& 0x08) != 0) {
1175 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1176 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1180 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1184 Ptr
->SpecificFlag
= 0;
1188 Ptr
->AddrSpaceGranularity
= 64;
1189 Ptr
->AddrLen
= Mem64Node
->Length
;
1190 Ptr
->AddrRangeMax
= Mem64Node
->Alignment
;
1195 // Deal with Pmem64 aperture
1197 if ((Aperture
& 0x10) != 0) {
1198 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1199 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1203 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1207 Ptr
->SpecificFlag
= 0x06;
1211 Ptr
->AddrSpaceGranularity
= 64;
1212 Ptr
->AddrLen
= PMem64Node
->Length
;
1213 Ptr
->AddrRangeMax
= PMem64Node
->Alignment
;
1221 PtrEnd
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) Ptr
;
1223 PtrEnd
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1224 PtrEnd
->Checksum
= 0;
1229 // If there is no resource request
1231 Configuration
= AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1232 if (Configuration
== NULL
) {
1233 return EFI_OUT_OF_RESOURCES
;
1236 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) (Configuration
);
1237 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1239 PtrEnd
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) (Ptr
+ 1);
1240 PtrEnd
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1241 PtrEnd
->Checksum
= 0;
1244 *Config
= Configuration
;
1250 Get resource base from an acpi configuration descriptor.
1252 @param Config An acpi configuration descriptor.
1253 @param IoBase Output of I/O resource base address.
1254 @param Mem32Base Output of 32-bit memory base address.
1255 @param PMem32Base Output of 32-bit prefetchable memory base address.
1256 @param Mem64Base Output of 64-bit memory base address.
1257 @param PMem64Base Output of 64-bit prefetchable memory base address.
1264 OUT UINT64
*Mem32Base
,
1265 OUT UINT64
*PMem32Base
,
1266 OUT UINT64
*Mem64Base
,
1267 OUT UINT64
*PMem64Base
1271 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
1274 ASSERT (Config
!= NULL
);
1276 *IoBase
= 0xFFFFFFFFFFFFFFFFULL
;
1277 *Mem32Base
= 0xFFFFFFFFFFFFFFFFULL
;
1278 *PMem32Base
= 0xFFFFFFFFFFFFFFFFULL
;
1279 *Mem64Base
= 0xFFFFFFFFFFFFFFFFULL
;
1280 *PMem64Base
= 0xFFFFFFFFFFFFFFFFULL
;
1282 Temp
= (UINT8
*) Config
;
1284 while (*Temp
== ACPI_ADDRESS_SPACE_DESCRIPTOR
) {
1286 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Temp
;
1287 ResStatus
= Ptr
->AddrTranslationOffset
;
1289 if (ResStatus
== EFI_RESOURCE_SATISFIED
) {
1291 switch (Ptr
->ResType
) {
1294 // Memory type aperture
1299 // Check to see the granularity
1301 if (Ptr
->AddrSpaceGranularity
== 32) {
1302 if ((Ptr
->SpecificFlag
& 0x06) != 0) {
1303 *PMem32Base
= Ptr
->AddrRangeMin
;
1305 *Mem32Base
= Ptr
->AddrRangeMin
;
1309 if (Ptr
->AddrSpaceGranularity
== 64) {
1310 if ((Ptr
->SpecificFlag
& 0x06) != 0) {
1311 *PMem64Base
= Ptr
->AddrRangeMin
;
1313 *Mem64Base
= Ptr
->AddrRangeMin
;
1323 *IoBase
= Ptr
->AddrRangeMin
;
1337 Temp
+= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
);
1342 Enumerate pci bridge, allocate resource and determine attribute
1343 for devices on this bridge.
1345 @param BridgeDev Pointer to instance of bridge device.
1347 @retval EFI_SUCCESS Successfully enumerated PCI bridge.
1348 @retval other Failed to enumerate.
1352 PciBridgeEnumerator (
1353 IN PCI_IO_DEVICE
*BridgeDev
1357 UINT8 StartBusNumber
;
1358 EFI_PCI_IO_PROTOCOL
*PciIo
;
1363 PciIo
= &(BridgeDev
->PciIo
);
1364 Status
= PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint8
, 0x19, 1, &StartBusNumber
);
1366 if (EFI_ERROR (Status
)) {
1370 Status
= PciAssignBusNumber (
1376 if (EFI_ERROR (Status
)) {
1380 Status
= PciPciDeviceInfoCollector (BridgeDev
, StartBusNumber
);
1382 if (EFI_ERROR (Status
)) {
1386 Status
= PciBridgeResourceAllocator (BridgeDev
);
1388 if (EFI_ERROR (Status
)) {
1392 Status
= DetermineDeviceAttribute (BridgeDev
);
1394 if (EFI_ERROR (Status
)) {
1403 Allocate all kinds of resource for PCI bridge.
1405 @param Bridge Pointer to bridge instance.
1407 @retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
1408 @retval other Failed to allocate resource for bridge.
1412 PciBridgeResourceAllocator (
1413 IN PCI_IO_DEVICE
*Bridge
1416 PCI_RESOURCE_NODE
*IoBridge
;
1417 PCI_RESOURCE_NODE
*Mem32Bridge
;
1418 PCI_RESOURCE_NODE
*PMem32Bridge
;
1419 PCI_RESOURCE_NODE
*Mem64Bridge
;
1420 PCI_RESOURCE_NODE
*PMem64Bridge
;
1428 IoBridge
= CreateResourceNode (
1437 Mem32Bridge
= CreateResourceNode (
1446 PMem32Bridge
= CreateResourceNode (
1455 Mem64Bridge
= CreateResourceNode (
1464 PMem64Bridge
= CreateResourceNode (
1474 // Create resourcemap by going through all the devices subject to this root bridge
1485 Status
= GetResourceBaseFromBridge (
1494 if (EFI_ERROR (Status
)) {
1499 // Program IO resources
1507 // Program Mem32 resources
1515 // Program PMem32 resources
1523 // Program Mem64 resources
1531 // Program PMem64 resources
1538 DestroyResourceTree (IoBridge
);
1539 DestroyResourceTree (Mem32Bridge
);
1540 DestroyResourceTree (PMem32Bridge
);
1541 DestroyResourceTree (PMem64Bridge
);
1542 DestroyResourceTree (Mem64Bridge
);
1544 gBS
->FreePool (IoBridge
);
1545 gBS
->FreePool (Mem32Bridge
);
1546 gBS
->FreePool (PMem32Bridge
);
1547 gBS
->FreePool (PMem64Bridge
);
1548 gBS
->FreePool (Mem64Bridge
);
1554 Get resource base address for a pci bridge device.
1556 @param Bridge Given Pci driver instance.
1557 @param IoBase Output for base address of I/O type resource.
1558 @param Mem32Base Output for base address of 32-bit memory type resource.
1559 @param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
1560 @param Mem64Base Output for base address of 64-bit memory type resource.
1561 @param PMem64Base Output for base address of 64-bit Pmemory type resource.
1563 @retval EFI_SUCCESS Successfully got resource base address.
1564 @retval EFI_OUT_OF_RESOURCES PCI bridge is not available.
1568 GetResourceBaseFromBridge (
1569 IN PCI_IO_DEVICE
*Bridge
,
1571 OUT UINT64
*Mem32Base
,
1572 OUT UINT64
*PMem32Base
,
1573 OUT UINT64
*Mem64Base
,
1574 OUT UINT64
*PMem64Base
1577 if (!Bridge
->Allocated
) {
1578 return EFI_OUT_OF_RESOURCES
;
1582 *Mem32Base
= gAllOne
;
1583 *PMem32Base
= gAllOne
;
1584 *Mem64Base
= gAllOne
;
1585 *PMem64Base
= gAllOne
;
1587 if (IS_PCI_BRIDGE (&Bridge
->Pci
)) {
1589 if (Bridge
->PciBar
[PPB_IO_RANGE
].Length
> 0) {
1590 *IoBase
= Bridge
->PciBar
[PPB_IO_RANGE
].BaseAddress
;
1593 if (Bridge
->PciBar
[PPB_MEM32_RANGE
].Length
> 0) {
1594 *Mem32Base
= Bridge
->PciBar
[PPB_MEM32_RANGE
].BaseAddress
;
1597 if (Bridge
->PciBar
[PPB_PMEM32_RANGE
].Length
> 0) {
1598 *PMem32Base
= Bridge
->PciBar
[PPB_PMEM32_RANGE
].BaseAddress
;
1601 if (Bridge
->PciBar
[PPB_PMEM64_RANGE
].Length
> 0) {
1602 *PMem64Base
= Bridge
->PciBar
[PPB_PMEM64_RANGE
].BaseAddress
;
1604 *PMem64Base
= gAllOne
;
1609 if (IS_CARDBUS_BRIDGE (&Bridge
->Pci
)) {
1610 if (Bridge
->PciBar
[P2C_IO_1
].Length
> 0) {
1611 *IoBase
= Bridge
->PciBar
[P2C_IO_1
].BaseAddress
;
1613 if (Bridge
->PciBar
[P2C_IO_2
].Length
> 0) {
1614 *IoBase
= Bridge
->PciBar
[P2C_IO_2
].BaseAddress
;
1618 if (Bridge
->PciBar
[P2C_MEM_1
].Length
> 0) {
1619 if (Bridge
->PciBar
[P2C_MEM_1
].BarType
== PciBarTypePMem32
) {
1620 *PMem32Base
= Bridge
->PciBar
[P2C_MEM_1
].BaseAddress
;
1623 if (Bridge
->PciBar
[P2C_MEM_1
].BarType
== PciBarTypeMem32
) {
1624 *Mem32Base
= Bridge
->PciBar
[P2C_MEM_1
].BaseAddress
;
1628 if (Bridge
->PciBar
[P2C_MEM_2
].Length
> 0) {
1629 if (Bridge
->PciBar
[P2C_MEM_2
].BarType
== PciBarTypePMem32
) {
1630 *PMem32Base
= Bridge
->PciBar
[P2C_MEM_2
].BaseAddress
;
1633 if (Bridge
->PciBar
[P2C_MEM_2
].BarType
== PciBarTypeMem32
) {
1634 *Mem32Base
= Bridge
->PciBar
[P2C_MEM_2
].BaseAddress
;
1643 These are the notifications from the PCI bus driver that it is about to enter a certain
1644 phase of the PCI enumeration process.
1646 This member function can be used to notify the host bridge driver to perform specific actions,
1647 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
1648 Eight notification points are defined at this time. See belows:
1649 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
1650 structures. The PCI enumerator should issue this notification
1651 before starting a fresh enumeration process. Enumeration cannot
1652 be restarted after sending any other notification such as
1653 EfiPciHostBridgeBeginBusAllocation.
1654 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
1655 required here. This notification can be used to perform any
1656 chipset-specific programming.
1657 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
1658 specific action is required here. This notification can be used to
1659 perform any chipset-specific programming.
1660 EfiPciHostBridgeBeginResourceAllocation
1661 The resource allocation phase is about to begin. No specific
1662 action is required here. This notification can be used to perform
1663 any chipset-specific programming.
1664 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
1665 root bridges. These resource settings are returned on the next call to
1666 GetProposedResources(). Before calling NotifyPhase() with a Phase of
1667 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
1668 for gathering I/O and memory requests for
1669 all the PCI root bridges and submitting these requests using
1670 SubmitResources(). This function pads the resource amount
1671 to suit the root bridge hardware, takes care of dependencies between
1672 the PCI root bridges, and calls the Global Coherency Domain (GCD)
1673 with the allocation request. In the case of padding, the allocated range
1674 could be bigger than what was requested.
1675 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
1676 resources (proposed resources) for all the PCI root bridges. After the
1677 hardware is programmed, reassigning resources will not be supported.
1678 The bus settings are not affected.
1679 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
1680 root bridges and resets the I/O and memory apertures to their initial
1681 state. The bus settings are not affected. If the request to allocate
1682 resources fails, the PCI enumerator can use this notification to
1683 deallocate previous resources, adjust the requests, and retry
1685 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
1686 required here. This notification can be used to perform any chipsetspecific
1689 @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
1690 @param[in] Phase The phase during enumeration
1692 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
1693 is valid for a Phase of EfiPciHostBridgeAllocateResources if
1694 SubmitResources() has not been called for one or more
1695 PCI root bridges before this call
1696 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
1697 for a Phase of EfiPciHostBridgeSetResources.
1698 @retval EFI_INVALID_PARAMETER Invalid phase parameter
1699 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
1700 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
1701 previously submitted resource requests cannot be fulfilled or
1702 were only partially fulfilled.
1703 @retval EFI_SUCCESS The notification was accepted without any errors.
1708 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
1709 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
1712 EFI_HANDLE HostBridgeHandle
;
1713 EFI_HANDLE RootBridgeHandle
;
1714 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1717 HostBridgeHandle
= NULL
;
1718 RootBridgeHandle
= NULL
;
1719 if (gPciPlatformProtocol
!= NULL
) {
1721 // Get Host Bridge Handle.
1723 PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
);
1726 // Get the rootbridge Io protocol to find the host bridge handle
1728 Status
= gBS
->HandleProtocol (
1730 &gEfiPciRootBridgeIoProtocolGuid
,
1731 (VOID
**) &PciRootBridgeIo
1734 if (EFI_ERROR (Status
)) {
1735 return EFI_NOT_FOUND
;
1738 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
1741 // Call PlatformPci::PlatformNotify() if the protocol is present.
1743 gPciPlatformProtocol
->PlatformNotify (
1744 gPciPlatformProtocol
,
1749 } else if (gPciOverrideProtocol
!= NULL
){
1751 // Get Host Bridge Handle.
1753 PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
);
1756 // Get the rootbridge Io protocol to find the host bridge handle
1758 Status
= gBS
->HandleProtocol (
1760 &gEfiPciRootBridgeIoProtocolGuid
,
1761 (VOID
**) &PciRootBridgeIo
1764 if (EFI_ERROR (Status
)) {
1765 return EFI_NOT_FOUND
;
1768 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
1771 // Call PlatformPci::PhaseNotify() if the protocol is present.
1773 gPciOverrideProtocol
->PlatformNotify (
1774 gPciOverrideProtocol
,
1781 Status
= PciResAlloc
->NotifyPhase (
1786 if (gPciPlatformProtocol
!= NULL
) {
1788 // Call PlatformPci::PlatformNotify() if the protocol is present.
1790 gPciPlatformProtocol
->PlatformNotify (
1791 gPciPlatformProtocol
,
1797 } else if (gPciOverrideProtocol
!= NULL
) {
1799 // Call PlatformPci::PhaseNotify() if the protocol is present.
1801 gPciOverrideProtocol
->PlatformNotify (
1802 gPciOverrideProtocol
,
1813 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1814 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1815 PCI controllers before enumeration.
1817 This function is called during the PCI enumeration process. No specific action is expected from this
1818 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1821 @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1822 @param Bus The bus number of the pci device.
1823 @param Device The device number of the pci device.
1824 @param Func The function number of the pci device.
1825 @param Phase The phase of the PCI device enumeration.
1827 @retval EFI_SUCCESS The requested parameters were returned.
1828 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1829 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1830 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1831 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1832 not enumerate this device, including its child devices if it is a PCI-to-PCI
1837 PreprocessController (
1838 IN PCI_IO_DEVICE
*Bridge
,
1842 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1845 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS RootBridgePciAddress
;
1846 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
;
1847 EFI_HANDLE RootBridgeHandle
;
1848 EFI_HANDLE HostBridgeHandle
;
1852 // Get the host bridge handle
1854 HostBridgeHandle
= Bridge
->PciRootBridgeIo
->ParentHandle
;
1857 // Get the pci host bridge resource allocation protocol
1859 Status
= gBS
->OpenProtocol (
1861 &gEfiPciHostBridgeResourceAllocationProtocolGuid
,
1862 (VOID
**) &PciResAlloc
,
1865 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1868 if (EFI_ERROR (Status
)) {
1869 return EFI_UNSUPPORTED
;
1873 // Get Root Brige Handle
1875 while (Bridge
->Parent
!= NULL
) {
1876 Bridge
= Bridge
->Parent
;
1879 RootBridgeHandle
= Bridge
->Handle
;
1881 RootBridgePciAddress
.Register
= 0;
1882 RootBridgePciAddress
.Function
= Func
;
1883 RootBridgePciAddress
.Device
= Device
;
1884 RootBridgePciAddress
.Bus
= Bus
;
1885 RootBridgePciAddress
.ExtendedRegister
= 0;
1887 if (gPciPlatformProtocol
!= NULL
) {
1889 // Call PlatformPci::PrepController() if the protocol is present.
1891 gPciPlatformProtocol
->PlatformPrepController (
1892 gPciPlatformProtocol
,
1895 RootBridgePciAddress
,
1899 } else if (gPciOverrideProtocol
!= NULL
) {
1901 // Call PlatformPci::PrepController() if the protocol is present.
1903 gPciOverrideProtocol
->PlatformPrepController (
1904 gPciOverrideProtocol
,
1907 RootBridgePciAddress
,
1913 Status
= PciResAlloc
->PreprocessController (
1916 RootBridgePciAddress
,
1920 if (gPciPlatformProtocol
!= NULL
) {
1922 // Call PlatformPci::PrepController() if the protocol is present.
1924 gPciPlatformProtocol
->PlatformPrepController (
1925 gPciPlatformProtocol
,
1928 RootBridgePciAddress
,
1932 } else if (gPciOverrideProtocol
!= NULL
) {
1934 // Call PlatformPci::PrepController() if the protocol is present.
1936 gPciOverrideProtocol
->PlatformPrepController (
1937 gPciOverrideProtocol
,
1940 RootBridgePciAddress
,
1950 This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
1951 happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
1953 @param This A pointer to the hot plug request protocol.
1954 @param Operation The operation the PCI bus driver is requested to make.
1955 @param Controller The handle of the hot-plug controller.
1956 @param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.
1957 @param NumberOfChildren The number of child handles.
1958 For a add operation, it is an output parameter.
1959 For a remove operation, it's an input parameter.
1960 @param ChildHandleBuffer The buffer which contains the child handles.
1962 @retval EFI_INVALID_PARAMETER Operation is not a legal value.
1963 Controller is NULL or not a valid handle.
1964 NumberOfChildren is NULL.
1965 ChildHandleBuffer is NULL while Operation is add.
1966 @retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.
1967 @retval EFI_NOT_FOUND Can not find bridge according to controller handle.
1968 @retval EFI_SUCCESS The handles for the specified device have been created or destroyed
1969 as requested, and for an add operation, the new handles are
1970 returned in ChildHandleBuffer.
1974 PciHotPlugRequestNotify (
1975 IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL
* This
,
1976 IN EFI_PCI_HOTPLUG_OPERATION Operation
,
1977 IN EFI_HANDLE Controller
,
1978 IN EFI_DEVICE_PATH_PROTOCOL
* RemainingDevicePath OPTIONAL
,
1979 IN OUT UINT8
*NumberOfChildren
,
1980 IN OUT EFI_HANDLE
* ChildHandleBuffer
1983 PCI_IO_DEVICE
*Bridge
;
1984 PCI_IO_DEVICE
*Temp
;
1985 EFI_PCI_IO_PROTOCOL
*PciIo
;
1987 EFI_HANDLE RootBridgeHandle
;
1991 // Check input parameter validity
1993 if ((Controller
== NULL
) || (NumberOfChildren
== NULL
)){
1994 return EFI_INVALID_PARAMETER
;
1997 if ((Operation
!= EfiPciHotPlugRequestAdd
) && (Operation
!= EfiPciHotplugRequestRemove
)) {
1998 return EFI_INVALID_PARAMETER
;
2001 if (Operation
== EfiPciHotPlugRequestAdd
){
2002 if (ChildHandleBuffer
== NULL
) {
2003 return EFI_INVALID_PARAMETER
;
2005 } else if ((Operation
== EfiPciHotplugRequestRemove
) && (*NumberOfChildren
!= 0)) {
2006 if (ChildHandleBuffer
== NULL
) {
2007 return EFI_INVALID_PARAMETER
;
2011 Status
= gBS
->OpenProtocol (
2013 &gEfiPciIoProtocolGuid
,
2015 gPciBusDriverBinding
.DriverBindingHandle
,
2017 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2020 if (EFI_ERROR (Status
)) {
2021 return EFI_NOT_FOUND
;
2024 Bridge
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo
);
2027 // Get root bridge handle
2030 while (Temp
->Parent
!= NULL
) {
2031 Temp
= Temp
->Parent
;
2034 RootBridgeHandle
= Temp
->Handle
;
2036 if (Operation
== EfiPciHotPlugRequestAdd
) {
2038 if (NumberOfChildren
!= NULL
) {
2039 *NumberOfChildren
= 0;
2042 if (IsListEmpty (&Bridge
->ChildList
)) {
2044 Status
= PciBridgeEnumerator (Bridge
);
2046 if (EFI_ERROR (Status
)) {
2051 Status
= StartPciDevicesOnBridge (
2054 RemainingDevicePath
,
2062 if (Operation
== EfiPciHotplugRequestRemove
) {
2064 if (*NumberOfChildren
== 0) {
2066 // Remove all devices on the bridge
2068 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Bridge
);
2073 for (Index
= 0; Index
< *NumberOfChildren
; Index
++) {
2075 // De register all the pci device
2077 Status
= DeRegisterPciDevice (RootBridgeHandle
, ChildHandleBuffer
[Index
]);
2079 if (EFI_ERROR (Status
)) {
2094 Search hostbridge according to given handle
2096 @param RootBridgeHandle Host bridge handle.
2098 @retval TRUE Found host bridge handle.
2099 @retval FALSE Not found hot bridge handle.
2103 SearchHostBridgeHandle (
2104 IN EFI_HANDLE RootBridgeHandle
2107 EFI_HANDLE HostBridgeHandle
;
2108 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
2113 // Get the rootbridge Io protocol to find the host bridge handle
2115 Status
= gBS
->OpenProtocol (
2117 &gEfiPciRootBridgeIoProtocolGuid
,
2118 (VOID
**) &PciRootBridgeIo
,
2119 gPciBusDriverBinding
.DriverBindingHandle
,
2121 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2124 if (EFI_ERROR (Status
)) {
2128 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
2129 for (Index
= 0; Index
< gPciHostBridgeNumber
; Index
++) {
2130 if (HostBridgeHandle
== gPciHostBrigeHandles
[Index
]) {
2139 Add host bridge handle to global variable for enumerating.
2141 @param HostBridgeHandle Host bridge handle.
2143 @retval EFI_SUCCESS Successfully added host bridge.
2144 @retval EFI_ABORTED Host bridge is NULL, or given host bridge
2145 has been in host bridge list.
2149 AddHostBridgeEnumerator (
2150 IN EFI_HANDLE HostBridgeHandle
2155 if (HostBridgeHandle
== NULL
) {
2159 for (Index
= 0; Index
< gPciHostBridgeNumber
; Index
++) {
2160 if (HostBridgeHandle
== gPciHostBrigeHandles
[Index
]) {
2165 if (Index
< PCI_MAX_HOST_BRIDGE_NUM
) {
2166 gPciHostBrigeHandles
[Index
] = HostBridgeHandle
;
2167 gPciHostBridgeNumber
++;