2 PCI eunmeration implementation on entire PCI bus system for PCI Bus module.
4 Copyright (c) 2006 - 2009, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 This routine is used to enumerate entire pci bus system
21 @param Controller Parent controller handle.
23 @retval EFI_SUCCESS PCI enumeration finished successfully.
24 @retval other Some error occurred when enumerating the pci bus system.
29 IN EFI_HANDLE Controller
33 EFI_HANDLE HostBridgeHandle
;
35 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
;
36 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
39 // If PCI bus has already done the full enumeration, never do it again
41 if (!gFullEnumeration
) {
42 return PciEnumeratorLight (Controller
);
46 // Get the rootbridge Io protocol to find the host bridge handle
48 Status
= gBS
->OpenProtocol (
50 &gEfiPciRootBridgeIoProtocolGuid
,
51 (VOID
**) &PciRootBridgeIo
,
52 gPciBusDriverBinding
.DriverBindingHandle
,
54 EFI_OPEN_PROTOCOL_GET_PROTOCOL
57 if (EFI_ERROR (Status
)) {
62 // Get the host bridge handle
64 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
67 // Get the pci host bridge resource allocation protocol
69 Status
= gBS
->OpenProtocol (
71 &gEfiPciHostBridgeResourceAllocationProtocolGuid
,
72 (VOID
**) &PciResAlloc
,
73 gPciBusDriverBinding
.DriverBindingHandle
,
75 EFI_OPEN_PROTOCOL_GET_PROTOCOL
78 if (EFI_ERROR (Status
)) {
83 // Notify the pci bus enumeration is about to begin
85 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginEnumeration
);
88 // Start the bus allocation phase
90 Status
= PciHostBridgeEnumerator (PciResAlloc
);
92 if (EFI_ERROR (Status
)) {
97 // Submit the resource request
99 Status
= PciHostBridgeResourceAllocator (PciResAlloc
);
101 if (EFI_ERROR (Status
)) {
106 // Notify the pci bus enumeration is about to complete
108 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndEnumeration
);
113 Status
= PciHostBridgeP2CProcess (PciResAlloc
);
115 if (EFI_ERROR (Status
)) {
120 // Process attributes for devices on this host bridge
122 Status
= PciHostBridgeDeviceAttribute (PciResAlloc
);
123 if (EFI_ERROR (Status
)) {
127 gFullEnumeration
= FALSE
;
129 Status
= gBS
->InstallProtocolInterface (
131 &gEfiPciEnumerationCompleteProtocolGuid
,
132 EFI_NATIVE_INTERFACE
,
135 if (EFI_ERROR (Status
)) {
143 Enumerate PCI root bridge.
145 @param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
146 @param RootBridgeDev Instance of root bridge device.
148 @retval EFI_SUCCESS Successfully enumerated root bridge.
149 @retval other Failed to enumerate root bridge.
153 PciRootBridgeEnumerator (
154 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
155 IN PCI_IO_DEVICE
*RootBridgeDev
159 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
161 UINT8 StartBusNumber
;
162 UINT8 PaddedBusRange
;
163 EFI_HANDLE RootBridgeHandle
;
170 // Get the root bridge handle
172 RootBridgeHandle
= RootBridgeDev
->Handle
;
174 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
176 EFI_IO_BUS_PCI
| EFI_IOB_PCI_PC_BUS_ENUM
,
177 RootBridgeDev
->DevicePath
181 // Get the Bus information
183 Status
= PciResAlloc
->StartBusEnumeration (
186 (VOID
**) &Configuration
189 if (EFI_ERROR (Status
)) {
194 // Get the bus number to start with
196 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
197 PaddedBusRange
= (UINT8
) (Configuration
->AddrRangeMax
);
200 // Initialize the subordinate bus number
202 SubBusNumber
= StartBusNumber
;
205 // Reset all assigned PCI bus number
207 ResetAllPpbBusNumber (
215 Status
= PciScanBus (
217 (UINT8
) (Configuration
->AddrRangeMin
),
222 if (EFI_ERROR (Status
)) {
228 // Assign max bus number scanned
230 Configuration
->AddrLen
= SubBusNumber
- StartBusNumber
+ 1 + PaddedBusRange
;
235 Status
= PciResAlloc
->SetBusNumbers (
241 FreePool (Configuration
);
243 if (EFI_ERROR (Status
)) {
251 This routine is used to process all PCI devices' Option Rom
252 on a certain root bridge.
254 @param Bridge Given parent's root bridge.
255 @param RomBase Base address of ROM driver loaded from.
256 @param MaxLength Maximum rom size.
261 IN PCI_IO_DEVICE
*Bridge
,
266 LIST_ENTRY
*CurrentLink
;
270 // Go through bridges to reach all devices
272 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
273 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
274 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
275 if (!IsListEmpty (&Temp
->ChildList
)) {
278 // Go further to process the option rom under this bridge
280 ProcessOptionRom (Temp
, RomBase
, MaxLength
);
283 if (Temp
->RomSize
!= 0 && Temp
->RomSize
<= MaxLength
) {
286 // Load and process the option rom
288 LoadOpRomImage (Temp
, RomBase
);
291 CurrentLink
= CurrentLink
->ForwardLink
;
296 This routine is used to assign bus number to the given PCI bus system
298 @param Bridge Parent root bridge instance.
299 @param StartBusNumber Number of beginning.
300 @param SubBusNumber The number of sub bus.
302 @retval EFI_SUCCESS Successfully assigned bus number.
303 @retval EFI_DEVICE_ERROR Failed to assign bus number.
308 IN PCI_IO_DEVICE
*Bridge
,
309 IN UINT8 StartBusNumber
,
310 OUT UINT8
*SubBusNumber
321 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
323 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
328 *SubBusNumber
= StartBusNumber
;
331 // First check to see whether the parent is ppb
333 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
334 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
337 // Check to see whether a pci device is present
339 Status
= PciDevicePresent (
347 if (!EFI_ERROR (Status
) &&
348 (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
))) {
351 // Reserved one bus for cardbus bridge
353 SecondBus
= ++(*SubBusNumber
);
355 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
357 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x18);
359 Status
= PciRootBridgeIo
->Pci
.Write (
368 // Initialize SubBusNumber to SecondBus
370 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x1A);
371 Status
= PciRootBridgeIo
->Pci
.Write (
379 // If it is PPB, resursively search down this bridge
381 if (IS_PCI_BRIDGE (&Pci
)) {
384 Status
= PciRootBridgeIo
->Pci
.Write (
392 Status
= PciAssignBusNumber (
398 if (EFI_ERROR (Status
)) {
399 return EFI_DEVICE_ERROR
;
404 // Set the current maximum bus number under the PPB
406 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0x1A);
408 Status
= PciRootBridgeIo
->Pci
.Write (
418 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
421 // Skip sub functions, this is not a multi function device
432 This routine is used to determine the root bridge attribute by interfacing
433 the host bridge resource allocation protocol.
435 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
436 @param RootBridgeDev Root bridge instance
438 @retval EFI_SUCCESS Successfully got root bridge's attribute.
439 @retval other Failed to get attribute.
443 DetermineRootBridgeAttributes (
444 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
445 IN PCI_IO_DEVICE
*RootBridgeDev
450 EFI_HANDLE RootBridgeHandle
;
453 RootBridgeHandle
= RootBridgeDev
->Handle
;
456 // Get root bridge attribute by calling into pci host bridge resource allocation protocol
458 Status
= PciResAlloc
->GetAllocAttributes (
464 if (EFI_ERROR (Status
)) {
469 // Here is the point where PCI bus driver calls HOST bridge allocation protocol
470 // Currently we hardcoded for ea815
472 if ((Attributes
& EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
) != 0) {
473 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED
;
476 if ((Attributes
& EFI_PCI_HOST_BRIDGE_MEM64_DECODE
) != 0) {
477 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM64_DECODE_SUPPORTED
;
480 RootBridgeDev
->Decodes
|= EFI_BRIDGE_MEM32_DECODE_SUPPORTED
;
481 RootBridgeDev
->Decodes
|= EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
;
482 RootBridgeDev
->Decodes
|= EFI_BRIDGE_IO16_DECODE_SUPPORTED
;
488 Get Max Option Rom size on specified bridge.
490 @param Bridge Given bridge device instance.
492 @return Max size of option rom needed.
496 GetMaxOptionRomSize (
497 IN PCI_IO_DEVICE
*Bridge
500 LIST_ENTRY
*CurrentLink
;
502 UINT64 MaxOptionRomSize
;
503 UINT64 TempOptionRomSize
;
505 MaxOptionRomSize
= 0;
508 // Go through bridges to reach all devices
510 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
511 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
512 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
513 if (!IsListEmpty (&Temp
->ChildList
)) {
516 // Get max option rom size under this bridge
518 TempOptionRomSize
= GetMaxOptionRomSize (Temp
);
521 // Compare with the option rom size of the bridge
522 // Get the larger one
524 if (Temp
->RomSize
> TempOptionRomSize
) {
525 TempOptionRomSize
= Temp
->RomSize
;
531 // For devices get the rom size directly
533 TempOptionRomSize
= Temp
->RomSize
;
537 // Get the largest rom size on this bridge
539 if (TempOptionRomSize
> MaxOptionRomSize
) {
540 MaxOptionRomSize
= TempOptionRomSize
;
543 CurrentLink
= CurrentLink
->ForwardLink
;
546 return MaxOptionRomSize
;
550 Process attributes of devices on this host bridge
552 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
554 @retval EFI_SUCCESS Successfully process attribute.
555 @retval EFI_NOT_FOUND Can not find the specific root bridge device.
556 @retval other Failed to determine the root bridge device's attribute.
560 PciHostBridgeDeviceAttribute (
561 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
564 EFI_HANDLE RootBridgeHandle
;
565 PCI_IO_DEVICE
*RootBridgeDev
;
568 RootBridgeHandle
= NULL
;
570 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
573 // Get RootBridg Device by handle
575 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
577 if (RootBridgeDev
== NULL
) {
578 return EFI_NOT_FOUND
;
582 // Set the attributes for devcies behind the Root Bridge
584 Status
= DetermineDeviceAttribute (RootBridgeDev
);
585 if (EFI_ERROR (Status
)) {
595 Get resource allocation status from the ACPI resource descriptor.
597 @param AcpiConfig Point to Acpi configuration table.
598 @param IoResStatus Return the status of I/O resource.
599 @param Mem32ResStatus Return the status of 32-bit Memory resource.
600 @param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.
601 @param Mem64ResStatus Return the status of 64-bit Memory resource.
602 @param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.
606 GetResourceAllocationStatus (
608 OUT UINT64
*IoResStatus
,
609 OUT UINT64
*Mem32ResStatus
,
610 OUT UINT64
*PMem32ResStatus
,
611 OUT UINT64
*Mem64ResStatus
,
612 OUT UINT64
*PMem64ResStatus
617 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*ACPIAddressDesc
;
619 Temp
= (UINT8
*) AcpiConfig
;
621 while (*Temp
== ACPI_ADDRESS_SPACE_DESCRIPTOR
) {
623 ACPIAddressDesc
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Temp
;
624 ResStatus
= ACPIAddressDesc
->AddrTranslationOffset
;
626 switch (ACPIAddressDesc
->ResType
) {
628 if (ACPIAddressDesc
->AddrSpaceGranularity
== 32) {
629 if (ACPIAddressDesc
->SpecificFlag
== 0x06) {
633 *PMem32ResStatus
= ResStatus
;
638 *Mem32ResStatus
= ResStatus
;
642 if (ACPIAddressDesc
->AddrSpaceGranularity
== 64) {
643 if (ACPIAddressDesc
->SpecificFlag
== 0x06) {
647 *PMem64ResStatus
= ResStatus
;
652 *Mem64ResStatus
= ResStatus
;
662 *IoResStatus
= ResStatus
;
669 Temp
+= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
);
674 Remove a PCI device from device pool and mark its bar.
676 @param PciDevice Instance of Pci device.
678 @retval EFI_SUCCESS Successfully remove the PCI device.
679 @retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
684 IN PCI_IO_DEVICE
*PciDevice
687 PCI_IO_DEVICE
*Bridge
;
689 LIST_ENTRY
*CurrentLink
;
692 // Remove the padding resource from a bridge
694 if ( IS_PCI_BRIDGE(&PciDevice
->Pci
) &&
695 PciDevice
->ResourcePaddingDescriptors
!= NULL
) {
696 FreePool (PciDevice
->ResourcePaddingDescriptors
);
697 PciDevice
->ResourcePaddingDescriptors
= NULL
;
704 if (IS_PCI_BRIDGE (&PciDevice
->Pci
) || (PciDevice
->Parent
== NULL
)) {
708 if (IS_CARDBUS_BRIDGE (&PciDevice
->Pci
)) {
710 // Get the root bridge device
713 while (Bridge
->Parent
!= NULL
) {
714 Bridge
= Bridge
->Parent
;
717 RemoveAllPciDeviceOnBridge (Bridge
->Handle
, PciDevice
);
722 InitializeP2C (PciDevice
);
728 Bridge
= PciDevice
->Parent
;
729 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
730 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
731 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
732 if (Temp
== PciDevice
) {
733 InitializePciDevice (Temp
);
734 RemoveEntryList (CurrentLink
);
735 FreePciDevice (Temp
);
739 CurrentLink
= CurrentLink
->ForwardLink
;
746 Determine whethter a PCI device can be rejected.
748 @param PciResNode Pointer to Pci resource node instance.
750 @retval TRUE The PCI device can be rejected.
751 @retval TRUE The PCI device cannot be rejected.
756 IN PCI_RESOURCE_NODE
*PciResNode
761 Temp
= PciResNode
->PciDev
;
764 // Ensure the device is present
771 // PPB and RB should go ahead
773 if (IS_PCI_BRIDGE (&Temp
->Pci
) || (Temp
->Parent
== NULL
)) {
778 // Skip device on Bus0
780 if ((Temp
->Parent
!= NULL
) && (Temp
->BusNumber
== 0)) {
787 if (IS_PCI_VGA (&Temp
->Pci
)) {
795 Compare two resource nodes and get the larger resource consumer.
797 @param PciResNode1 resource node 1 want to be compared
798 @param PciResNode2 resource node 2 want to be compared
800 @return Larger resource node.
804 GetLargerConsumerDevice (
805 IN PCI_RESOURCE_NODE
*PciResNode1
,
806 IN PCI_RESOURCE_NODE
*PciResNode2
809 if (PciResNode2
== NULL
) {
813 if ((IS_PCI_BRIDGE(&(PciResNode2
->PciDev
->Pci
)) || (PciResNode2
->PciDev
->Parent
== NULL
)) \
814 && (PciResNode2
->ResourceUsage
!= PciResUsagePadding
) )
819 if (PciResNode1
== NULL
) {
823 if ((PciResNode1
->Length
) > (PciResNode2
->Length
)) {
832 Get the max resource consumer in the host resource pool.
834 @param ResPool Pointer to resource pool node.
836 @return The max resource consumer in the host resource pool.
840 GetMaxResourceConsumerDevice (
841 IN PCI_RESOURCE_NODE
*ResPool
844 PCI_RESOURCE_NODE
*Temp
;
845 LIST_ENTRY
*CurrentLink
;
846 PCI_RESOURCE_NODE
*PciResNode
;
847 PCI_RESOURCE_NODE
*PPBResNode
;
851 CurrentLink
= ResPool
->ChildList
.ForwardLink
;
852 while (CurrentLink
!= NULL
&& CurrentLink
!= &ResPool
->ChildList
) {
854 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
856 if (!IsRejectiveDevice (Temp
)) {
857 CurrentLink
= CurrentLink
->ForwardLink
;
861 if ((IS_PCI_BRIDGE (&(Temp
->PciDev
->Pci
)) || (Temp
->PciDev
->Parent
== NULL
)) \
862 && (Temp
->ResourceUsage
!= PciResUsagePadding
))
864 PPBResNode
= GetMaxResourceConsumerDevice (Temp
);
865 PciResNode
= GetLargerConsumerDevice (PciResNode
, PPBResNode
);
867 PciResNode
= GetLargerConsumerDevice (PciResNode
, Temp
);
870 CurrentLink
= CurrentLink
->ForwardLink
;
877 Adjust host bridge allocation so as to reduce resource requirement
879 @param IoPool Pointer to instance of I/O resource Node.
880 @param Mem32Pool Pointer to instance of 32-bit memory resource Node.
881 @param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.
882 @param Mem64Pool Pointer to instance of 64-bit memory resource node.
883 @param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.
884 @param IoResStatus Status of I/O resource Node.
885 @param Mem32ResStatus Status of 32-bit memory resource Node.
886 @param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.
887 @param Mem64ResStatus Status of 64-bit memory resource node.
888 @param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.
890 @retval EFI_SUCCESS Successfully adjusted resoruce on host bridge.
891 @retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.
895 PciHostBridgeAdjustAllocation (
896 IN PCI_RESOURCE_NODE
*IoPool
,
897 IN PCI_RESOURCE_NODE
*Mem32Pool
,
898 IN PCI_RESOURCE_NODE
*PMem32Pool
,
899 IN PCI_RESOURCE_NODE
*Mem64Pool
,
900 IN PCI_RESOURCE_NODE
*PMem64Pool
,
901 IN UINT64 IoResStatus
,
902 IN UINT64 Mem32ResStatus
,
903 IN UINT64 PMem32ResStatus
,
904 IN UINT64 Mem64ResStatus
,
905 IN UINT64 PMem64ResStatus
908 BOOLEAN AllocationAjusted
;
909 PCI_RESOURCE_NODE
*PciResNode
;
910 PCI_RESOURCE_NODE
*ResPool
[5];
911 PCI_IO_DEVICE
*RemovedPciDev
[5];
913 UINTN RemovedPciDevNum
;
917 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
920 ZeroMem (RemovedPciDev
, 5 * sizeof (PCI_IO_DEVICE
*));
921 RemovedPciDevNum
= 0;
924 ResPool
[1] = Mem32Pool
;
925 ResPool
[2] = PMem32Pool
;
926 ResPool
[3] = Mem64Pool
;
927 ResPool
[4] = PMem64Pool
;
929 ResStatus
[0] = IoResStatus
;
930 ResStatus
[1] = Mem32ResStatus
;
931 ResStatus
[2] = PMem32ResStatus
;
932 ResStatus
[3] = Mem64ResStatus
;
933 ResStatus
[4] = PMem64ResStatus
;
935 AllocationAjusted
= FALSE
;
937 for (ResType
= 0; ResType
< 5; ResType
++) {
939 if (ResStatus
[ResType
] == EFI_RESOURCE_SATISFIED
) {
943 if (ResStatus
[ResType
] == EFI_RESOURCE_NOT_SATISFIED
) {
945 // Host bridge hasn't this resource type
951 // Hostbridge hasn't enough resource
953 PciResNode
= GetMaxResourceConsumerDevice (ResPool
[ResType
]);
954 if (PciResNode
== NULL
) {
959 // Check if the device has been removed before
961 for (DevIndex
= 0; DevIndex
< RemovedPciDevNum
; DevIndex
++) {
962 if (PciResNode
->PciDev
== RemovedPciDev
[DevIndex
]) {
967 if (DevIndex
!= RemovedPciDevNum
) {
972 // Remove the device if it isn't in the array
974 Status
= RejectPciDevice (PciResNode
->PciDev
);
975 if (Status
== EFI_SUCCESS
) {
978 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
981 // Have no way to get ReqRes, AllocRes & Bar here
983 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
984 AllocFailExtendedData
.DevicePathSize
= sizeof (EFI_DEVICE_PATH_PROTOCOL
);
985 AllocFailExtendedData
.DevicePath
= (UINT8
*) PciResNode
->PciDev
->DevicePath
;
986 AllocFailExtendedData
.Bar
= PciResNode
->Bar
;
988 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
990 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
991 (VOID
*) &AllocFailExtendedData
,
992 sizeof (AllocFailExtendedData
)
996 // Add it to the array and indicate at least a device has been rejected
998 RemovedPciDev
[RemovedPciDevNum
++] = PciResNode
->PciDev
;
999 AllocationAjusted
= TRUE
;
1006 if (AllocationAjusted
) {
1014 Summary requests for all resource type, and contruct ACPI resource
1017 @param Bridge detecting bridge
1018 @param IoNode Pointer to instance of I/O resource Node
1019 @param Mem32Node Pointer to instance of 32-bit memory resource Node
1020 @param PMem32Node Pointer to instance of 32-bit Pmemory resource node
1021 @param Mem64Node Pointer to instance of 64-bit memory resource node
1022 @param PMem64Node Pointer to instance of 64-bit Pmemory resource node
1023 @param Config Output buffer holding new constructed APCI resource requestor
1025 @retval EFI_SUCCESS Successfully constructed ACPI resource.
1026 @retval EFI_OUT_OF_RESOURCES No memory availabe.
1030 ConstructAcpiResourceRequestor (
1031 IN PCI_IO_DEVICE
*Bridge
,
1032 IN PCI_RESOURCE_NODE
*IoNode
,
1033 IN PCI_RESOURCE_NODE
*Mem32Node
,
1034 IN PCI_RESOURCE_NODE
*PMem32Node
,
1035 IN PCI_RESOURCE_NODE
*Mem64Node
,
1036 IN PCI_RESOURCE_NODE
*PMem64Node
,
1042 UINT8
*Configuration
;
1043 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
1044 EFI_ACPI_END_TAG_DESCRIPTOR
*PtrEnd
;
1052 // if there is io request, add to the io aperture
1054 if (ResourceRequestExisted (IoNode
)) {
1060 // if there is mem32 request, add to the mem32 aperture
1062 if (ResourceRequestExisted (Mem32Node
)) {
1068 // if there is pmem32 request, add to the pmem32 aperture
1070 if (ResourceRequestExisted (PMem32Node
)) {
1076 // if there is mem64 request, add to the mem64 aperture
1078 if (ResourceRequestExisted (Mem64Node
)) {
1084 // if there is pmem64 request, add to the pmem64 aperture
1086 if (ResourceRequestExisted (PMem64Node
)) {
1091 if (NumConfig
!= 0) {
1094 // If there is at least one type of resource request,
1095 // allocate a acpi resource node
1097 Configuration
= AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) * NumConfig
+ sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1098 if (Configuration
== NULL
) {
1099 return EFI_OUT_OF_RESOURCES
;
1102 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Configuration
;
1105 // Deal with io aperture
1107 if ((Aperture
& 0x01) != 0) {
1108 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1109 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1113 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_IO
;
1117 Ptr
->SpecificFlag
= 1;
1118 Ptr
->AddrLen
= IoNode
->Length
;
1119 Ptr
->AddrRangeMax
= IoNode
->Alignment
;
1124 // Deal with mem32 aperture
1126 if ((Aperture
& 0x02) != 0) {
1127 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1128 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1132 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1136 Ptr
->SpecificFlag
= 0;
1140 Ptr
->AddrSpaceGranularity
= 32;
1141 Ptr
->AddrLen
= Mem32Node
->Length
;
1142 Ptr
->AddrRangeMax
= Mem32Node
->Alignment
;
1148 // Deal with Pmem32 aperture
1150 if ((Aperture
& 0x04) != 0) {
1151 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1152 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1156 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1160 Ptr
->SpecificFlag
= 0x6;
1164 Ptr
->AddrSpaceGranularity
= 32;
1165 Ptr
->AddrLen
= PMem32Node
->Length
;
1166 Ptr
->AddrRangeMax
= PMem32Node
->Alignment
;
1171 // Deal with mem64 aperture
1173 if ((Aperture
& 0x08) != 0) {
1174 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1175 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1179 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1183 Ptr
->SpecificFlag
= 0;
1187 Ptr
->AddrSpaceGranularity
= 64;
1188 Ptr
->AddrLen
= Mem64Node
->Length
;
1189 Ptr
->AddrRangeMax
= Mem64Node
->Alignment
;
1194 // Deal with Pmem64 aperture
1196 if ((Aperture
& 0x10) != 0) {
1197 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1198 Ptr
->Len
= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) - 3;
1202 Ptr
->ResType
= ACPI_ADDRESS_SPACE_TYPE_MEM
;
1206 Ptr
->SpecificFlag
= 0x06;
1210 Ptr
->AddrSpaceGranularity
= 64;
1211 Ptr
->AddrLen
= PMem64Node
->Length
;
1212 Ptr
->AddrRangeMax
= PMem64Node
->Alignment
;
1220 PtrEnd
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) Ptr
;
1222 PtrEnd
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1223 PtrEnd
->Checksum
= 0;
1228 // If there is no resource request
1230 Configuration
= AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1231 if (Configuration
== NULL
) {
1232 return EFI_OUT_OF_RESOURCES
;
1235 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) (Configuration
);
1236 Ptr
->Desc
= ACPI_ADDRESS_SPACE_DESCRIPTOR
;
1238 PtrEnd
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) (Ptr
+ 1);
1239 PtrEnd
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1240 PtrEnd
->Checksum
= 0;
1243 *Config
= Configuration
;
1249 Get resource base from an acpi configuration descriptor.
1251 @param Config An acpi configuration descriptor.
1252 @param IoBase Output of I/O resource base address.
1253 @param Mem32Base Output of 32-bit memory base address.
1254 @param PMem32Base Output of 32-bit prefetchable memory base address.
1255 @param Mem64Base Output of 64-bit memory base address.
1256 @param PMem64Base Output of 64-bit prefetchable memory base address.
1263 OUT UINT64
*Mem32Base
,
1264 OUT UINT64
*PMem32Base
,
1265 OUT UINT64
*Mem64Base
,
1266 OUT UINT64
*PMem64Base
1270 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
1273 ASSERT (Config
!= NULL
);
1275 *IoBase
= 0xFFFFFFFFFFFFFFFFULL
;
1276 *Mem32Base
= 0xFFFFFFFFFFFFFFFFULL
;
1277 *PMem32Base
= 0xFFFFFFFFFFFFFFFFULL
;
1278 *Mem64Base
= 0xFFFFFFFFFFFFFFFFULL
;
1279 *PMem64Base
= 0xFFFFFFFFFFFFFFFFULL
;
1281 Temp
= (UINT8
*) Config
;
1283 while (*Temp
== ACPI_ADDRESS_SPACE_DESCRIPTOR
) {
1285 Ptr
= (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*) Temp
;
1286 ResStatus
= Ptr
->AddrTranslationOffset
;
1288 if (ResStatus
== EFI_RESOURCE_SATISFIED
) {
1290 switch (Ptr
->ResType
) {
1293 // Memory type aperture
1298 // Check to see the granularity
1300 if (Ptr
->AddrSpaceGranularity
== 32) {
1301 if ((Ptr
->SpecificFlag
& 0x06) != 0) {
1302 *PMem32Base
= Ptr
->AddrRangeMin
;
1304 *Mem32Base
= Ptr
->AddrRangeMin
;
1308 if (Ptr
->AddrSpaceGranularity
== 64) {
1309 if ((Ptr
->SpecificFlag
& 0x06) != 0) {
1310 *PMem64Base
= Ptr
->AddrRangeMin
;
1312 *Mem64Base
= Ptr
->AddrRangeMin
;
1322 *IoBase
= Ptr
->AddrRangeMin
;
1336 Temp
+= sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
);
1341 Enumerate pci bridge, allocate resource and determine attribute
1342 for devices on this bridge.
1344 @param BridgeDev Pointer to instance of bridge device.
1346 @retval EFI_SUCCESS Successfully enumerated PCI bridge.
1347 @retval other Failed to enumerate.
1351 PciBridgeEnumerator (
1352 IN PCI_IO_DEVICE
*BridgeDev
1356 UINT8 StartBusNumber
;
1357 EFI_PCI_IO_PROTOCOL
*PciIo
;
1362 PciIo
= &(BridgeDev
->PciIo
);
1363 Status
= PciIo
->Pci
.Read (PciIo
, EfiPciIoWidthUint8
, 0x19, 1, &StartBusNumber
);
1365 if (EFI_ERROR (Status
)) {
1369 Status
= PciAssignBusNumber (
1375 if (EFI_ERROR (Status
)) {
1379 Status
= PciPciDeviceInfoCollector (BridgeDev
, StartBusNumber
);
1381 if (EFI_ERROR (Status
)) {
1385 Status
= PciBridgeResourceAllocator (BridgeDev
);
1387 if (EFI_ERROR (Status
)) {
1391 Status
= DetermineDeviceAttribute (BridgeDev
);
1393 if (EFI_ERROR (Status
)) {
1402 Allocate all kinds of resource for PCI bridge.
1404 @param Bridge Pointer to bridge instance.
1406 @retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
1407 @retval other Failed to allocate resource for bridge.
1411 PciBridgeResourceAllocator (
1412 IN PCI_IO_DEVICE
*Bridge
1415 PCI_RESOURCE_NODE
*IoBridge
;
1416 PCI_RESOURCE_NODE
*Mem32Bridge
;
1417 PCI_RESOURCE_NODE
*PMem32Bridge
;
1418 PCI_RESOURCE_NODE
*Mem64Bridge
;
1419 PCI_RESOURCE_NODE
*PMem64Bridge
;
1427 IoBridge
= CreateResourceNode (
1436 Mem32Bridge
= CreateResourceNode (
1445 PMem32Bridge
= CreateResourceNode (
1454 Mem64Bridge
= CreateResourceNode (
1463 PMem64Bridge
= CreateResourceNode (
1473 // Create resourcemap by going through all the devices subject to this root bridge
1484 Status
= GetResourceBaseFromBridge (
1493 if (EFI_ERROR (Status
)) {
1498 // Program IO resources
1506 // Program Mem32 resources
1514 // Program PMem32 resources
1522 // Program Mem64 resources
1530 // Program PMem64 resources
1537 DestroyResourceTree (IoBridge
);
1538 DestroyResourceTree (Mem32Bridge
);
1539 DestroyResourceTree (PMem32Bridge
);
1540 DestroyResourceTree (PMem64Bridge
);
1541 DestroyResourceTree (Mem64Bridge
);
1543 gBS
->FreePool (IoBridge
);
1544 gBS
->FreePool (Mem32Bridge
);
1545 gBS
->FreePool (PMem32Bridge
);
1546 gBS
->FreePool (PMem64Bridge
);
1547 gBS
->FreePool (Mem64Bridge
);
1553 Get resource base address for a pci bridge device.
1555 @param Bridge Given Pci driver instance.
1556 @param IoBase Output for base address of I/O type resource.
1557 @param Mem32Base Output for base address of 32-bit memory type resource.
1558 @param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
1559 @param Mem64Base Output for base address of 64-bit memory type resource.
1560 @param PMem64Base Output for base address of 64-bit Pmemory type resource.
1562 @retval EFI_SUCCESS Successfully got resource base address.
1563 @retval EFI_OUT_OF_RESOURCES PCI bridge is not available.
1567 GetResourceBaseFromBridge (
1568 IN PCI_IO_DEVICE
*Bridge
,
1570 OUT UINT64
*Mem32Base
,
1571 OUT UINT64
*PMem32Base
,
1572 OUT UINT64
*Mem64Base
,
1573 OUT UINT64
*PMem64Base
1576 if (!Bridge
->Allocated
) {
1577 return EFI_OUT_OF_RESOURCES
;
1581 *Mem32Base
= gAllOne
;
1582 *PMem32Base
= gAllOne
;
1583 *Mem64Base
= gAllOne
;
1584 *PMem64Base
= gAllOne
;
1586 if (IS_PCI_BRIDGE (&Bridge
->Pci
)) {
1588 if (Bridge
->PciBar
[PPB_IO_RANGE
].Length
> 0) {
1589 *IoBase
= Bridge
->PciBar
[PPB_IO_RANGE
].BaseAddress
;
1592 if (Bridge
->PciBar
[PPB_MEM32_RANGE
].Length
> 0) {
1593 *Mem32Base
= Bridge
->PciBar
[PPB_MEM32_RANGE
].BaseAddress
;
1596 if (Bridge
->PciBar
[PPB_PMEM32_RANGE
].Length
> 0) {
1597 *PMem32Base
= Bridge
->PciBar
[PPB_PMEM32_RANGE
].BaseAddress
;
1600 if (Bridge
->PciBar
[PPB_PMEM64_RANGE
].Length
> 0) {
1601 *PMem64Base
= Bridge
->PciBar
[PPB_PMEM64_RANGE
].BaseAddress
;
1603 *PMem64Base
= gAllOne
;
1608 if (IS_CARDBUS_BRIDGE (&Bridge
->Pci
)) {
1609 if (Bridge
->PciBar
[P2C_IO_1
].Length
> 0) {
1610 *IoBase
= Bridge
->PciBar
[P2C_IO_1
].BaseAddress
;
1612 if (Bridge
->PciBar
[P2C_IO_2
].Length
> 0) {
1613 *IoBase
= Bridge
->PciBar
[P2C_IO_2
].BaseAddress
;
1617 if (Bridge
->PciBar
[P2C_MEM_1
].Length
> 0) {
1618 if (Bridge
->PciBar
[P2C_MEM_1
].BarType
== PciBarTypePMem32
) {
1619 *PMem32Base
= Bridge
->PciBar
[P2C_MEM_1
].BaseAddress
;
1622 if (Bridge
->PciBar
[P2C_MEM_1
].BarType
== PciBarTypeMem32
) {
1623 *Mem32Base
= Bridge
->PciBar
[P2C_MEM_1
].BaseAddress
;
1627 if (Bridge
->PciBar
[P2C_MEM_2
].Length
> 0) {
1628 if (Bridge
->PciBar
[P2C_MEM_2
].BarType
== PciBarTypePMem32
) {
1629 *PMem32Base
= Bridge
->PciBar
[P2C_MEM_2
].BaseAddress
;
1632 if (Bridge
->PciBar
[P2C_MEM_2
].BarType
== PciBarTypeMem32
) {
1633 *Mem32Base
= Bridge
->PciBar
[P2C_MEM_2
].BaseAddress
;
1642 These are the notifications from the PCI bus driver that it is about to enter a certain
1643 phase of the PCI enumeration process.
1645 This member function can be used to notify the host bridge driver to perform specific actions,
1646 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
1647 Eight notification points are defined at this time. See belows:
1648 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
1649 structures. The PCI enumerator should issue this notification
1650 before starting a fresh enumeration process. Enumeration cannot
1651 be restarted after sending any other notification such as
1652 EfiPciHostBridgeBeginBusAllocation.
1653 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
1654 required here. This notification can be used to perform any
1655 chipset-specific programming.
1656 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
1657 specific action is required here. This notification can be used to
1658 perform any chipset-specific programming.
1659 EfiPciHostBridgeBeginResourceAllocation
1660 The resource allocation phase is about to begin. No specific
1661 action is required here. This notification can be used to perform
1662 any chipset-specific programming.
1663 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
1664 root bridges. These resource settings are returned on the next call to
1665 GetProposedResources(). Before calling NotifyPhase() with a Phase of
1666 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
1667 for gathering I/O and memory requests for
1668 all the PCI root bridges and submitting these requests using
1669 SubmitResources(). This function pads the resource amount
1670 to suit the root bridge hardware, takes care of dependencies between
1671 the PCI root bridges, and calls the Global Coherency Domain (GCD)
1672 with the allocation request. In the case of padding, the allocated range
1673 could be bigger than what was requested.
1674 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
1675 resources (proposed resources) for all the PCI root bridges. After the
1676 hardware is programmed, reassigning resources will not be supported.
1677 The bus settings are not affected.
1678 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
1679 root bridges and resets the I/O and memory apertures to their initial
1680 state. The bus settings are not affected. If the request to allocate
1681 resources fails, the PCI enumerator can use this notification to
1682 deallocate previous resources, adjust the requests, and retry
1684 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
1685 required here. This notification can be used to perform any chipsetspecific
1688 @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
1689 @param[in] Phase The phase during enumeration
1691 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
1692 is valid for a Phase of EfiPciHostBridgeAllocateResources if
1693 SubmitResources() has not been called for one or more
1694 PCI root bridges before this call
1695 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
1696 for a Phase of EfiPciHostBridgeSetResources.
1697 @retval EFI_INVALID_PARAMETER Invalid phase parameter
1698 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
1699 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
1700 previously submitted resource requests cannot be fulfilled or
1701 were only partially fulfilled.
1702 @retval EFI_SUCCESS The notification was accepted without any errors.
1707 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
,
1708 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
1711 EFI_HANDLE HostBridgeHandle
;
1712 EFI_HANDLE RootBridgeHandle
;
1713 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1716 HostBridgeHandle
= NULL
;
1717 RootBridgeHandle
= NULL
;
1718 if (gPciPlatformProtocol
!= NULL
) {
1720 // Get Host Bridge Handle.
1722 PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
);
1725 // Get the rootbridge Io protocol to find the host bridge handle
1727 Status
= gBS
->HandleProtocol (
1729 &gEfiPciRootBridgeIoProtocolGuid
,
1730 (VOID
**) &PciRootBridgeIo
1733 if (EFI_ERROR (Status
)) {
1734 return EFI_NOT_FOUND
;
1737 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
1740 // Call PlatformPci::PlatformNotify() if the protocol is present.
1742 gPciPlatformProtocol
->PlatformNotify (
1743 gPciPlatformProtocol
,
1748 } else if (gPciOverrideProtocol
!= NULL
){
1750 // Get Host Bridge Handle.
1752 PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
);
1755 // Get the rootbridge Io protocol to find the host bridge handle
1757 Status
= gBS
->HandleProtocol (
1759 &gEfiPciRootBridgeIoProtocolGuid
,
1760 (VOID
**) &PciRootBridgeIo
1763 if (EFI_ERROR (Status
)) {
1764 return EFI_NOT_FOUND
;
1767 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
1770 // Call PlatformPci::PhaseNotify() if the protocol is present.
1772 gPciOverrideProtocol
->PlatformNotify (
1773 gPciOverrideProtocol
,
1780 Status
= PciResAlloc
->NotifyPhase (
1785 if (gPciPlatformProtocol
!= NULL
) {
1787 // Call PlatformPci::PlatformNotify() if the protocol is present.
1789 gPciPlatformProtocol
->PlatformNotify (
1790 gPciPlatformProtocol
,
1796 } else if (gPciOverrideProtocol
!= NULL
) {
1798 // Call PlatformPci::PhaseNotify() if the protocol is present.
1800 gPciOverrideProtocol
->PlatformNotify (
1801 gPciOverrideProtocol
,
1812 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1813 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1814 PCI controllers before enumeration.
1816 This function is called during the PCI enumeration process. No specific action is expected from this
1817 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1820 @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1821 @param Bus The bus number of the pci device.
1822 @param Device The device number of the pci device.
1823 @param Func The function number of the pci device.
1824 @param Phase The phase of the PCI device enumeration.
1826 @retval EFI_SUCCESS The requested parameters were returned.
1827 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1828 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1829 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1830 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1831 not enumerate this device, including its child devices if it is a PCI-to-PCI
1836 PreprocessController (
1837 IN PCI_IO_DEVICE
*Bridge
,
1841 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1844 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS RootBridgePciAddress
;
1845 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
;
1846 EFI_HANDLE RootBridgeHandle
;
1847 EFI_HANDLE HostBridgeHandle
;
1851 // Get the host bridge handle
1853 HostBridgeHandle
= Bridge
->PciRootBridgeIo
->ParentHandle
;
1856 // Get the pci host bridge resource allocation protocol
1858 Status
= gBS
->OpenProtocol (
1860 &gEfiPciHostBridgeResourceAllocationProtocolGuid
,
1861 (VOID
**) &PciResAlloc
,
1864 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1867 if (EFI_ERROR (Status
)) {
1868 return EFI_UNSUPPORTED
;
1872 // Get Root Brige Handle
1874 while (Bridge
->Parent
!= NULL
) {
1875 Bridge
= Bridge
->Parent
;
1878 RootBridgeHandle
= Bridge
->Handle
;
1880 RootBridgePciAddress
.Register
= 0;
1881 RootBridgePciAddress
.Function
= Func
;
1882 RootBridgePciAddress
.Device
= Device
;
1883 RootBridgePciAddress
.Bus
= Bus
;
1884 RootBridgePciAddress
.ExtendedRegister
= 0;
1886 if (gPciPlatformProtocol
!= NULL
) {
1888 // Call PlatformPci::PrepController() if the protocol is present.
1890 gPciPlatformProtocol
->PlatformPrepController (
1891 gPciPlatformProtocol
,
1894 RootBridgePciAddress
,
1898 } else if (gPciOverrideProtocol
!= NULL
) {
1900 // Call PlatformPci::PrepController() if the protocol is present.
1902 gPciOverrideProtocol
->PlatformPrepController (
1903 gPciOverrideProtocol
,
1906 RootBridgePciAddress
,
1912 Status
= PciResAlloc
->PreprocessController (
1915 RootBridgePciAddress
,
1919 if (gPciPlatformProtocol
!= NULL
) {
1921 // Call PlatformPci::PrepController() if the protocol is present.
1923 gPciPlatformProtocol
->PlatformPrepController (
1924 gPciPlatformProtocol
,
1927 RootBridgePciAddress
,
1931 } else if (gPciOverrideProtocol
!= NULL
) {
1933 // Call PlatformPci::PrepController() if the protocol is present.
1935 gPciOverrideProtocol
->PlatformPrepController (
1936 gPciOverrideProtocol
,
1939 RootBridgePciAddress
,
1949 This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
1950 happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
1952 @param This A pointer to the hot plug request protocol.
1953 @param Operation The operation the PCI bus driver is requested to make.
1954 @param Controller The handle of the hot-plug controller.
1955 @param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.
1956 @param NumberOfChildren The number of child handles.
1957 For a add operation, it is an output parameter.
1958 For a remove operation, it's an input parameter.
1959 @param ChildHandleBuffer The buffer which contains the child handles.
1961 @retval EFI_INVALID_PARAMETER Operation is not a legal value.
1962 Controller is NULL or not a valid handle.
1963 NumberOfChildren is NULL.
1964 ChildHandleBuffer is NULL while Operation is add.
1965 @retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.
1966 @retval EFI_NOT_FOUND Can not find bridge according to controller handle.
1967 @retval EFI_SUCCESS The handles for the specified device have been created or destroyed
1968 as requested, and for an add operation, the new handles are
1969 returned in ChildHandleBuffer.
1973 PciHotPlugRequestNotify (
1974 IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL
* This
,
1975 IN EFI_PCI_HOTPLUG_OPERATION Operation
,
1976 IN EFI_HANDLE Controller
,
1977 IN EFI_DEVICE_PATH_PROTOCOL
* RemainingDevicePath OPTIONAL
,
1978 IN OUT UINT8
*NumberOfChildren
,
1979 IN OUT EFI_HANDLE
* ChildHandleBuffer
1982 PCI_IO_DEVICE
*Bridge
;
1983 PCI_IO_DEVICE
*Temp
;
1984 EFI_PCI_IO_PROTOCOL
*PciIo
;
1986 EFI_HANDLE RootBridgeHandle
;
1990 // Check input parameter validity
1992 if ((Controller
== NULL
) || (NumberOfChildren
== NULL
)){
1993 return EFI_INVALID_PARAMETER
;
1996 if ((Operation
!= EfiPciHotPlugRequestAdd
) && (Operation
!= EfiPciHotplugRequestRemove
)) {
1997 return EFI_INVALID_PARAMETER
;
2000 if (Operation
== EfiPciHotPlugRequestAdd
){
2001 if (ChildHandleBuffer
== NULL
) {
2002 return EFI_INVALID_PARAMETER
;
2004 } else if ((Operation
== EfiPciHotplugRequestRemove
) && (*NumberOfChildren
!= 0)) {
2005 if (ChildHandleBuffer
== NULL
) {
2006 return EFI_INVALID_PARAMETER
;
2010 Status
= gBS
->OpenProtocol (
2012 &gEfiPciIoProtocolGuid
,
2014 gPciBusDriverBinding
.DriverBindingHandle
,
2016 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2019 if (EFI_ERROR (Status
)) {
2020 return EFI_NOT_FOUND
;
2023 Bridge
= PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo
);
2026 // Get root bridge handle
2029 while (Temp
->Parent
!= NULL
) {
2030 Temp
= Temp
->Parent
;
2033 RootBridgeHandle
= Temp
->Handle
;
2035 if (Operation
== EfiPciHotPlugRequestAdd
) {
2037 if (NumberOfChildren
!= NULL
) {
2038 *NumberOfChildren
= 0;
2041 if (IsListEmpty (&Bridge
->ChildList
)) {
2043 Status
= PciBridgeEnumerator (Bridge
);
2045 if (EFI_ERROR (Status
)) {
2050 Status
= StartPciDevicesOnBridge (
2053 RemainingDevicePath
,
2061 if (Operation
== EfiPciHotplugRequestRemove
) {
2063 if (*NumberOfChildren
== 0) {
2065 // Remove all devices on the bridge
2067 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Bridge
);
2072 for (Index
= 0; Index
< *NumberOfChildren
; Index
++) {
2074 // De register all the pci device
2076 Status
= DeRegisterPciDevice (RootBridgeHandle
, ChildHandleBuffer
[Index
]);
2078 if (EFI_ERROR (Status
)) {
2093 Search hostbridge according to given handle
2095 @param RootBridgeHandle Host bridge handle.
2097 @retval TRUE Found host bridge handle.
2098 @retval FALSE Not found hot bridge handle.
2102 SearchHostBridgeHandle (
2103 IN EFI_HANDLE RootBridgeHandle
2106 EFI_HANDLE HostBridgeHandle
;
2107 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
2112 // Get the rootbridge Io protocol to find the host bridge handle
2114 Status
= gBS
->OpenProtocol (
2116 &gEfiPciRootBridgeIoProtocolGuid
,
2117 (VOID
**) &PciRootBridgeIo
,
2118 gPciBusDriverBinding
.DriverBindingHandle
,
2120 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2123 if (EFI_ERROR (Status
)) {
2127 HostBridgeHandle
= PciRootBridgeIo
->ParentHandle
;
2128 for (Index
= 0; Index
< gPciHostBridgeNumber
; Index
++) {
2129 if (HostBridgeHandle
== gPciHostBrigeHandles
[Index
]) {
2138 Add host bridge handle to global variable for enumerating.
2140 @param HostBridgeHandle Host bridge handle.
2142 @retval EFI_SUCCESS Successfully added host bridge.
2143 @retval EFI_ABORTED Host bridge is NULL, or given host bridge
2144 has been in host bridge list.
2148 AddHostBridgeEnumerator (
2149 IN EFI_HANDLE HostBridgeHandle
2154 if (HostBridgeHandle
== NULL
) {
2158 for (Index
= 0; Index
< gPciHostBridgeNumber
; Index
++) {
2159 if (HostBridgeHandle
== gPciHostBrigeHandles
[Index
]) {
2164 if (Index
< PCI_MAX_HOST_BRIDGE_NUM
) {
2165 gPciHostBrigeHandles
[Index
] = HostBridgeHandle
;
2166 gPciHostBridgeNumber
++;