2 PCI resouces support functions implemntation for PCI Bus module.
4 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 // The default policy for the PCI bus driver is NOT to reserve I/O ranges for both ISA aliases and VGA aliases.
20 BOOLEAN mReserveIsaAliases
= FALSE
;
21 BOOLEAN mReserveVgaAliases
= FALSE
;
22 BOOLEAN mPolicyDetermined
= FALSE
;
25 The function is used to skip VGA range.
27 @param Start Returned start address including VGA range.
28 @param Length The length of VGA range.
42 ASSERT (Start
!= NULL
);
44 // For legacy VGA, bit 10 to bit 15 is not decoded
49 StartOffset
= Original
& Mask
;
50 LimitOffset
= ((*Start
) + Length
- 1) & Mask
;
51 if (LimitOffset
>= VGABASE1
) {
52 *Start
= *Start
- StartOffset
+ VGALIMIT2
+ 1;
57 This function is used to skip ISA aliasing aperture.
59 @param Start Returned start address including ISA aliasing aperture.
60 @param Length The length of ISA aliasing aperture.
64 SkipIsaAliasAperture (
75 ASSERT (Start
!= NULL
);
78 // For legacy ISA, bit 10 to bit 15 is not decoded
83 StartOffset
= Original
& Mask
;
84 LimitOffset
= ((*Start
) + Length
- 1) & Mask
;
86 if (LimitOffset
>= ISABASE
) {
87 *Start
= *Start
- StartOffset
+ ISALIMIT
+ 1;
92 This function inserts a resource node into the resource list.
93 The resource list is sorted in descend order.
95 @param Bridge PCI resource node for bridge.
96 @param ResNode Resource node want to be inserted.
101 IN OUT PCI_RESOURCE_NODE
*Bridge
,
102 IN PCI_RESOURCE_NODE
*ResNode
105 LIST_ENTRY
*CurrentLink
;
106 PCI_RESOURCE_NODE
*Temp
;
107 UINT64 ResNodeAlignRest
;
108 UINT64 TempAlignRest
;
110 ASSERT (Bridge
!= NULL
);
111 ASSERT (ResNode
!= NULL
);
113 InsertHeadList (&Bridge
->ChildList
, &ResNode
->Link
);
115 CurrentLink
= Bridge
->ChildList
.ForwardLink
->ForwardLink
;
116 while (CurrentLink
!= &Bridge
->ChildList
) {
117 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
119 if (ResNode
->Alignment
> Temp
->Alignment
) {
121 } else if (ResNode
->Alignment
== Temp
->Alignment
) {
122 ResNodeAlignRest
= ResNode
->Length
& ResNode
->Alignment
;
123 TempAlignRest
= Temp
->Length
& Temp
->Alignment
;
124 if ((ResNodeAlignRest
== 0) || (ResNodeAlignRest
>= TempAlignRest
)) {
129 SwapListEntries (&ResNode
->Link
, CurrentLink
);
131 CurrentLink
= ResNode
->Link
.ForwardLink
;
136 This routine is used to merge two different resource trees in need of
139 For example, if an upstream PPB doesn't support,
140 prefetchable memory decoding, the PCI bus driver will choose to call this function
141 to merge prefectchable memory resource list into normal memory list.
143 If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
145 If Dst is NULL or Res is NULL, ASSERT ().
147 @param Dst Point to destination resource tree.
148 @param Res Point to source resource tree.
149 @param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of
150 destination resource type.
155 IN PCI_RESOURCE_NODE
*Dst
,
156 IN PCI_RESOURCE_NODE
*Res
,
161 LIST_ENTRY
*CurrentLink
;
162 PCI_RESOURCE_NODE
*Temp
;
164 ASSERT (Dst
!= NULL
);
165 ASSERT (Res
!= NULL
);
167 while (!IsListEmpty (&Res
->ChildList
)) {
168 CurrentLink
= Res
->ChildList
.ForwardLink
;
170 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
173 Temp
->ResType
= Dst
->ResType
;
176 RemoveEntryList (CurrentLink
);
177 InsertResourceNode (Dst
, Temp
);
182 This function is used to calculate the IO16 aperture
185 @param Bridge PCI resource node for bridge.
189 CalculateApertureIo16 (
190 IN PCI_RESOURCE_NODE
*Bridge
195 LIST_ENTRY
*CurrentLink
;
196 PCI_RESOURCE_NODE
*Node
;
198 EFI_PCI_PLATFORM_POLICY PciPolicy
;
200 if (!mPolicyDetermined
) {
202 // Check PciPlatform policy
204 Status
= EFI_NOT_FOUND
;
206 if (gPciPlatformProtocol
!= NULL
) {
207 Status
= gPciPlatformProtocol
->GetPlatformPolicy (
208 gPciPlatformProtocol
,
213 if (EFI_ERROR (Status
) && gPciOverrideProtocol
!= NULL
) {
214 Status
= gPciOverrideProtocol
->GetPlatformPolicy (
215 gPciOverrideProtocol
,
220 if (!EFI_ERROR (Status
)) {
221 if ((PciPolicy
& EFI_RESERVE_ISA_IO_ALIAS
) != 0) {
222 mReserveIsaAliases
= TRUE
;
224 if ((PciPolicy
& EFI_RESERVE_VGA_IO_ALIAS
) != 0) {
225 mReserveVgaAliases
= TRUE
;
228 mPolicyDetermined
= TRUE
;
233 if (Bridge
== NULL
) {
237 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
240 // Assume the bridge is aligned
242 while (CurrentLink
!= &Bridge
->ChildList
) {
244 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
247 // Consider the aperture alignment
249 Offset
= Aperture
& (Node
->Alignment
);
253 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
258 // IsaEnable and VGAEnable can not be implemented now.
259 // If both of them are enabled, then the IO resource would
260 // become too limited to meet the requirement of most of devices.
262 if (mReserveIsaAliases
|| mReserveVgaAliases
) {
263 if (!IS_PCI_BRIDGE (&(Node
->PciDev
->Pci
)) && !IS_CARDBUS_BRIDGE (&(Node
->PciDev
->Pci
))) {
265 // Check if there is need to support ISA/VGA decoding
266 // If so, we need to avoid isa/vga aliasing range
268 if (mReserveIsaAliases
) {
269 SkipIsaAliasAperture (
273 Offset
= Aperture
& (Node
->Alignment
);
275 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
277 } else if (mReserveVgaAliases
) {
282 Offset
= Aperture
& (Node
->Alignment
);
284 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
290 Node
->Offset
= Aperture
;
293 // Increment aperture by the length of node
295 Aperture
+= Node
->Length
;
297 CurrentLink
= CurrentLink
->ForwardLink
;
301 // At last, adjust the aperture with the bridge's
304 Offset
= Aperture
& (Bridge
->Alignment
);
307 Aperture
= Aperture
+ (Bridge
->Alignment
+ 1) - Offset
;
310 Bridge
->Length
= Aperture
;
312 // At last, adjust the bridge's alignment to the first child's alignment
313 // if the bridge has at least one child
315 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
316 if (CurrentLink
!= &Bridge
->ChildList
) {
317 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
318 if (Node
->Alignment
> Bridge
->Alignment
) {
319 Bridge
->Alignment
= Node
->Alignment
;
325 This function is used to calculate the resource aperture
326 for a given bridge device.
328 @param Bridge PCI resouce node for given bridge device.
332 CalculateResourceAperture (
333 IN PCI_RESOURCE_NODE
*Bridge
337 LIST_ENTRY
*CurrentLink
;
338 PCI_RESOURCE_NODE
*Node
;
344 if (Bridge
== NULL
) {
348 if (Bridge
->ResType
== PciBarTypeIo16
) {
350 CalculateApertureIo16 (Bridge
);
354 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
357 // Assume the bridge is aligned
359 while (CurrentLink
!= &Bridge
->ChildList
) {
361 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
364 // Apply padding resource if available
366 Offset
= Aperture
& (Node
->Alignment
);
370 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
375 // Recode current aperture as a offset
376 // this offset will be used in future real allocation
378 Node
->Offset
= Aperture
;
381 // Increment aperture by the length of node
383 Aperture
+= Node
->Length
;
386 // Consider the aperture alignment
388 CurrentLink
= CurrentLink
->ForwardLink
;
392 // At last, adjust the aperture with the bridge's
395 Offset
= Aperture
& (Bridge
->Alignment
);
397 Aperture
= Aperture
+ (Bridge
->Alignment
+ 1) - Offset
;
401 // If the bridge has already padded the resource and the
402 // amount of padded resource is larger, then keep the
405 if (Bridge
->Length
< Aperture
) {
406 Bridge
->Length
= Aperture
;
410 // At last, adjust the bridge's alignment to the first child's alignment
411 // if the bridge has at least one child
413 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
414 if (CurrentLink
!= &Bridge
->ChildList
) {
415 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
416 if (Node
->Alignment
> Bridge
->Alignment
) {
417 Bridge
->Alignment
= Node
->Alignment
;
423 Get IO/Memory resource infor for given PCI device.
425 @param PciDev Pci device instance.
426 @param IoNode Resource info node for IO .
427 @param Mem32Node Resource info node for 32-bit memory.
428 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
429 @param Mem64Node Resource info node for 64-bit memory.
430 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
434 GetResourceFromDevice (
435 IN PCI_IO_DEVICE
*PciDev
,
436 IN OUT PCI_RESOURCE_NODE
*IoNode
,
437 IN OUT PCI_RESOURCE_NODE
*Mem32Node
,
438 IN OUT PCI_RESOURCE_NODE
*PMem32Node
,
439 IN OUT PCI_RESOURCE_NODE
*Mem64Node
,
440 IN OUT PCI_RESOURCE_NODE
*PMem64Node
445 PCI_RESOURCE_NODE
*Node
;
446 BOOLEAN ResourceRequested
;
449 ResourceRequested
= FALSE
;
451 for (Index
= 0; Index
< PCI_MAX_BAR
; Index
++) {
453 switch ((PciDev
->PciBar
)[Index
].BarType
) {
455 case PciBarTypeMem32
:
457 Node
= CreateResourceNode (
459 (PciDev
->PciBar
)[Index
].Length
,
460 (PciDev
->PciBar
)[Index
].Alignment
,
471 ResourceRequested
= TRUE
;
474 case PciBarTypeMem64
:
476 Node
= CreateResourceNode (
478 (PciDev
->PciBar
)[Index
].Length
,
479 (PciDev
->PciBar
)[Index
].Alignment
,
490 ResourceRequested
= TRUE
;
493 case PciBarTypePMem64
:
495 Node
= CreateResourceNode (
497 (PciDev
->PciBar
)[Index
].Length
,
498 (PciDev
->PciBar
)[Index
].Alignment
,
509 ResourceRequested
= TRUE
;
512 case PciBarTypePMem32
:
514 Node
= CreateResourceNode (
516 (PciDev
->PciBar
)[Index
].Length
,
517 (PciDev
->PciBar
)[Index
].Alignment
,
527 ResourceRequested
= TRUE
;
533 Node
= CreateResourceNode (
535 (PciDev
->PciBar
)[Index
].Length
,
536 (PciDev
->PciBar
)[Index
].Alignment
,
546 ResourceRequested
= TRUE
;
549 case PciBarTypeUnknown
:
560 for (Index
= 0; Index
< PCI_MAX_BAR
; Index
++) {
562 switch ((PciDev
->VfPciBar
)[Index
].BarType
) {
564 case PciBarTypeMem32
:
566 Node
= CreateVfResourceNode (
568 (PciDev
->VfPciBar
)[Index
].Length
,
569 (PciDev
->VfPciBar
)[Index
].Alignment
,
582 case PciBarTypeMem64
:
584 Node
= CreateVfResourceNode (
586 (PciDev
->VfPciBar
)[Index
].Length
,
587 (PciDev
->VfPciBar
)[Index
].Alignment
,
600 case PciBarTypePMem64
:
602 Node
= CreateVfResourceNode (
604 (PciDev
->VfPciBar
)[Index
].Length
,
605 (PciDev
->VfPciBar
)[Index
].Alignment
,
618 case PciBarTypePMem32
:
620 Node
= CreateVfResourceNode (
622 (PciDev
->VfPciBar
)[Index
].Length
,
623 (PciDev
->VfPciBar
)[Index
].Alignment
,
639 case PciBarTypeUnknown
:
646 // If there is no resource requested from this device,
647 // then we indicate this device has been allocated naturally.
649 if (!ResourceRequested
) {
650 PciDev
->Allocated
= TRUE
;
655 This function is used to create a resource node.
657 @param PciDev Pci device instance.
658 @param Length Length of Io/Memory resource.
659 @param Alignment Alignment of resource.
660 @param Bar Bar index.
661 @param ResType Type of resource: IO/Memory.
662 @param ResUsage Resource usage.
664 @return PCI resource node created for given PCI device.
665 NULL means PCI resource node is not created.
670 IN PCI_IO_DEVICE
*PciDev
,
674 IN PCI_BAR_TYPE ResType
,
675 IN PCI_RESOURCE_USAGE ResUsage
678 PCI_RESOURCE_NODE
*Node
;
682 Node
= AllocateZeroPool (sizeof (PCI_RESOURCE_NODE
));
683 ASSERT (Node
!= NULL
);
688 Node
->Signature
= PCI_RESOURCE_SIGNATURE
;
689 Node
->PciDev
= PciDev
;
690 Node
->Length
= Length
;
691 Node
->Alignment
= Alignment
;
693 Node
->ResType
= ResType
;
694 Node
->Reserved
= FALSE
;
695 Node
->ResourceUsage
= ResUsage
;
696 InitializeListHead (&Node
->ChildList
);
702 This function is used to create a IOV VF resource node.
704 @param PciDev Pci device instance.
705 @param Length Length of Io/Memory resource.
706 @param Alignment Alignment of resource.
707 @param Bar Bar index.
708 @param ResType Type of resource: IO/Memory.
709 @param ResUsage Resource usage.
711 @return PCI resource node created for given VF PCI device.
712 NULL means PCI resource node is not created.
716 CreateVfResourceNode (
717 IN PCI_IO_DEVICE
*PciDev
,
721 IN PCI_BAR_TYPE ResType
,
722 IN PCI_RESOURCE_USAGE ResUsage
725 PCI_RESOURCE_NODE
*Node
;
729 "PCI-IOV B%x.D%x.F%x - VfResource (Bar - 0x%x) (Type - 0x%x) (Length - 0x%x)\n",
730 (UINTN
)PciDev
->BusNumber
,
731 (UINTN
)PciDev
->DeviceNumber
,
732 (UINTN
)PciDev
->FunctionNumber
,
738 Node
= CreateResourceNode (PciDev
, Length
, Alignment
, Bar
, ResType
, ResUsage
);
743 Node
->Virtual
= TRUE
;
749 This function is used to extract resource request from
752 @param Bridge Pci device instance.
753 @param IoNode Resource info node for IO.
754 @param Mem32Node Resource info node for 32-bit memory.
755 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
756 @param Mem64Node Resource info node for 64-bit memory.
757 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
762 IN PCI_IO_DEVICE
*Bridge
,
763 IN OUT PCI_RESOURCE_NODE
*IoNode
,
764 IN OUT PCI_RESOURCE_NODE
*Mem32Node
,
765 IN OUT PCI_RESOURCE_NODE
*PMem32Node
,
766 IN OUT PCI_RESOURCE_NODE
*Mem64Node
,
767 IN OUT PCI_RESOURCE_NODE
*PMem64Node
771 PCI_RESOURCE_NODE
*IoBridge
;
772 PCI_RESOURCE_NODE
*Mem32Bridge
;
773 PCI_RESOURCE_NODE
*PMem32Bridge
;
774 PCI_RESOURCE_NODE
*Mem64Bridge
;
775 PCI_RESOURCE_NODE
*PMem64Bridge
;
776 LIST_ENTRY
*CurrentLink
;
778 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
780 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
782 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
785 // Create resource nodes for this device by scanning the
786 // Bar array in the device private data
787 // If the upstream bridge doesn't support this device,
788 // no any resource node will be created for this device
790 GetResourceFromDevice (
799 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
802 // If the device has children, create a bridge resource node for this PPB
803 // Note: For PPB, memory aperture is aligned with 1MB and IO aperture
804 // is aligned with 4KB (smaller alignments may be supported).
806 IoBridge
= CreateResourceNode (
809 Temp
->BridgeIoAlignment
,
815 Mem32Bridge
= CreateResourceNode (
824 PMem32Bridge
= CreateResourceNode (
833 Mem64Bridge
= CreateResourceNode (
842 PMem64Bridge
= CreateResourceNode (
852 // Recursively create resouce map on this bridge
863 if (ResourceRequestExisted (IoBridge
)) {
874 // If there is node under this resource bridge,
875 // then calculate bridge's aperture of this type
876 // and insert it into the respective resource tree.
877 // If no, delete this resource bridge
879 if (ResourceRequestExisted (Mem32Bridge
)) {
885 FreePool (Mem32Bridge
);
890 // If there is node under this resource bridge,
891 // then calculate bridge's aperture of this type
892 // and insert it into the respective resource tree.
893 // If no, delete this resource bridge
895 if (ResourceRequestExisted (PMem32Bridge
)) {
901 FreePool (PMem32Bridge
);
906 // If there is node under this resource bridge,
907 // then calculate bridge's aperture of this type
908 // and insert it into the respective resource tree.
909 // If no, delete this resource bridge
911 if (ResourceRequestExisted (Mem64Bridge
)) {
917 FreePool (Mem64Bridge
);
922 // If there is node under this resource bridge,
923 // then calculate bridge's aperture of this type
924 // and insert it into the respective resource tree.
925 // If no, delete this resource bridge
927 if (ResourceRequestExisted (PMem64Bridge
)) {
933 FreePool (PMem64Bridge
);
940 // If it is P2C, apply hard coded resource padding
942 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
943 ResourcePaddingForCardBusBridge (
953 CurrentLink
= CurrentLink
->ForwardLink
;
957 // To do some platform specific resource padding ...
959 ResourcePaddingPolicy (
969 // Degrade resource if necessary
980 // Calculate resource aperture for this bridge device
982 CalculateResourceAperture (Mem32Node
);
983 CalculateResourceAperture (PMem32Node
);
984 CalculateResourceAperture (Mem64Node
);
985 CalculateResourceAperture (PMem64Node
);
986 CalculateResourceAperture (IoNode
);
990 This function is used to do the resource padding for a specific platform.
992 @param PciDev Pci device instance.
993 @param IoNode Resource info node for IO.
994 @param Mem32Node Resource info node for 32-bit memory.
995 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
996 @param Mem64Node Resource info node for 64-bit memory.
997 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1001 ResourcePaddingPolicy (
1002 IN PCI_IO_DEVICE
*PciDev
,
1003 IN PCI_RESOURCE_NODE
*IoNode
,
1004 IN PCI_RESOURCE_NODE
*Mem32Node
,
1005 IN PCI_RESOURCE_NODE
*PMem32Node
,
1006 IN PCI_RESOURCE_NODE
*Mem64Node
,
1007 IN PCI_RESOURCE_NODE
*PMem64Node
1011 // Create padding resource node
1013 if (PciDev
->ResourcePaddingDescriptors
!= NULL
) {
1014 ApplyResourcePadding (
1026 This function is used to degrade resource if the upstream bridge
1027 doesn't support certain resource. Degradation path is
1028 PMEM64 -> MEM64 -> MEM32
1029 PMEM64 -> PMEM32 -> MEM32
1032 @param Bridge Pci device instance.
1033 @param Mem32Node Resource info node for 32-bit memory.
1034 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
1035 @param Mem64Node Resource info node for 64-bit memory.
1036 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1041 IN PCI_IO_DEVICE
*Bridge
,
1042 IN PCI_RESOURCE_NODE
*Mem32Node
,
1043 IN PCI_RESOURCE_NODE
*PMem32Node
,
1044 IN PCI_RESOURCE_NODE
*Mem64Node
,
1045 IN PCI_RESOURCE_NODE
*PMem64Node
1048 PCI_IO_DEVICE
*Temp
;
1049 LIST_ENTRY
*ChildDeviceLink
;
1050 LIST_ENTRY
*ChildNodeLink
;
1051 LIST_ENTRY
*NextChildNodeLink
;
1052 PCI_RESOURCE_NODE
*TempNode
;
1055 // If any child device has both option ROM and 64-bit BAR, degrade its PMEM64/MEM64
1056 // requests in case that if a legacy option ROM image can not access 64-bit resources.
1058 ChildDeviceLink
= Bridge
->ChildList
.ForwardLink
;
1059 while (ChildDeviceLink
!= NULL
&& ChildDeviceLink
!= &Bridge
->ChildList
) {
1060 Temp
= PCI_IO_DEVICE_FROM_LINK (ChildDeviceLink
);
1061 if (Temp
->RomSize
!= 0) {
1062 if (!IsListEmpty (&Mem64Node
->ChildList
)) {
1063 ChildNodeLink
= Mem64Node
->ChildList
.ForwardLink
;
1064 while (ChildNodeLink
!= &Mem64Node
->ChildList
) {
1065 TempNode
= RESOURCE_NODE_FROM_LINK (ChildNodeLink
);
1066 NextChildNodeLink
= ChildNodeLink
->ForwardLink
;
1068 if (TempNode
->PciDev
== Temp
) {
1069 RemoveEntryList (ChildNodeLink
);
1070 InsertResourceNode (Mem32Node
, TempNode
);
1072 ChildNodeLink
= NextChildNodeLink
;
1076 if (!IsListEmpty (&PMem64Node
->ChildList
)) {
1077 ChildNodeLink
= PMem64Node
->ChildList
.ForwardLink
;
1078 while (ChildNodeLink
!= &PMem64Node
->ChildList
) {
1079 TempNode
= RESOURCE_NODE_FROM_LINK (ChildNodeLink
);
1080 NextChildNodeLink
= ChildNodeLink
->ForwardLink
;
1082 if (TempNode
->PciDev
== Temp
) {
1083 RemoveEntryList (ChildNodeLink
);
1084 InsertResourceNode (PMem32Node
, TempNode
);
1086 ChildNodeLink
= NextChildNodeLink
;
1091 ChildDeviceLink
= ChildDeviceLink
->ForwardLink
;
1095 // If firmware is in 32-bit mode,
1096 // then degrade PMEM64/MEM64 requests
1098 if (sizeof (UINTN
) <= 4) {
1112 // if the bridge does not support MEM64, degrade MEM64 to MEM32
1114 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_MEM64_DECODE_SUPPORTED
)) {
1123 // if the bridge does not support PMEM64, degrade PMEM64 to PMEM32
1125 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM64_DECODE_SUPPORTED
)) {
1134 // if both PMEM64 and PMEM32 requests from child devices, which can not be satisfied
1135 // by a P2P bridge simultaneously, keep PMEM64 and degrade PMEM32 to MEM32.
1137 if (!IsListEmpty (&PMem64Node
->ChildList
) && Bridge
->Parent
!= NULL
) {
1147 // If bridge doesn't support Pmem32
1148 // degrade it to mem32
1150 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
)) {
1159 // if root bridge supports combined Pmem Mem decoding
1160 // merge these two type of resource
1162 if (BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED
)) {
1170 // No need to check if to degrade MEM64 after merge, because
1171 // if there are PMEM64 still here, 64-bit decode should be supported
1172 // by the root bride.
1183 Test whether bridge device support decode resource.
1185 @param Bridge Bridge device instance.
1186 @param Decode Decode type according to resource type.
1188 @return TRUE The bridge device support decode resource.
1189 @return FALSE The bridge device don't support decode resource.
1193 BridgeSupportResourceDecode (
1194 IN PCI_IO_DEVICE
*Bridge
,
1198 if (((Bridge
->Decodes
) & Decode
) != 0) {
1206 This function is used to program the resource allocated
1207 for each resource node under specified bridge.
1209 @param Base Base address of resource to be progammed.
1210 @param Bridge PCI resource node for the bridge device.
1212 @retval EFI_SUCCESS Successfully to program all resouces
1213 on given PCI bridge device.
1214 @retval EFI_OUT_OF_RESOURCES Base is all one.
1220 IN PCI_RESOURCE_NODE
*Bridge
1223 LIST_ENTRY
*CurrentLink
;
1224 PCI_RESOURCE_NODE
*Node
;
1227 if (Base
== gAllOne
) {
1228 return EFI_OUT_OF_RESOURCES
;
1231 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1233 while (CurrentLink
!= &Bridge
->ChildList
) {
1235 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1237 if (!IS_PCI_BRIDGE (&(Node
->PciDev
->Pci
))) {
1239 if (IS_CARDBUS_BRIDGE (&(Node
->PciDev
->Pci
))) {
1241 // Program the PCI Card Bus device
1243 ProgramP2C (Base
, Node
);
1246 // Program the PCI device BAR
1248 ProgramBar (Base
, Node
);
1252 // Program the PCI devices under this bridge
1254 Status
= ProgramResource (Base
+ Node
->Offset
, Node
);
1255 if (EFI_ERROR (Status
)) {
1259 ProgramPpbApperture (Base
, Node
);
1262 CurrentLink
= CurrentLink
->ForwardLink
;
1269 Program Bar register for PCI device.
1271 @param Base Base address for PCI device resource to be progammed.
1272 @param Node Point to resoure node structure.
1278 IN PCI_RESOURCE_NODE
*Node
1281 EFI_PCI_IO_PROTOCOL
*PciIo
;
1285 ASSERT (Node
->Bar
< PCI_MAX_BAR
);
1290 if (Node
->Virtual
) {
1291 ProgramVfBar (Base
, Node
);
1296 PciIo
= &(Node
->PciDev
->PciIo
);
1298 Address
= Base
+ Node
->Offset
;
1301 // Indicate pci bus driver has allocated
1302 // resource for this device
1303 // It might be a temporary solution here since
1304 // pci device could have multiple bar
1306 Node
->PciDev
->Allocated
= TRUE
;
1308 switch ((Node
->PciDev
->PciBar
[Node
->Bar
]).BarType
) {
1310 case PciBarTypeIo16
:
1311 case PciBarTypeIo32
:
1312 case PciBarTypeMem32
:
1313 case PciBarTypePMem32
:
1317 EfiPciIoWidthUint32
,
1318 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1323 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1327 case PciBarTypeMem64
:
1328 case PciBarTypePMem64
:
1330 Address32
= (UINT32
) (Address
& 0x00000000FFFFFFFF);
1334 EfiPciIoWidthUint32
,
1335 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1340 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1344 EfiPciIoWidthUint32
,
1345 (UINT8
) ((Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
+ 4),
1350 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1360 Program IOV VF Bar register for PCI device.
1362 @param Base Base address for PCI device resource to be progammed.
1363 @param Node Point to resoure node structure.
1369 IN PCI_RESOURCE_NODE
*Node
1372 EFI_PCI_IO_PROTOCOL
*PciIo
;
1376 ASSERT (Node
->Bar
< PCI_MAX_BAR
);
1377 ASSERT (Node
->Virtual
);
1380 PciIo
= &(Node
->PciDev
->PciIo
);
1382 Address
= Base
+ Node
->Offset
;
1385 // Indicate pci bus driver has allocated
1386 // resource for this device
1387 // It might be a temporary solution here since
1388 // pci device could have multiple bar
1390 Node
->PciDev
->Allocated
= TRUE
;
1392 switch ((Node
->PciDev
->VfPciBar
[Node
->Bar
]).BarType
) {
1394 case PciBarTypeMem32
:
1395 case PciBarTypePMem32
:
1399 EfiPciIoWidthUint32
,
1400 (Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1405 Node
->PciDev
->VfPciBar
[Node
->Bar
].BaseAddress
= Address
;
1409 "PCI-IOV B%x.D%x.F%x - VF Bar (Offset - 0x%x) 32Mem (Address - 0x%x)\n",
1410 (UINTN
)Node
->PciDev
->BusNumber
,
1411 (UINTN
)Node
->PciDev
->DeviceNumber
,
1412 (UINTN
)Node
->PciDev
->FunctionNumber
,
1413 (UINTN
)(Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1419 case PciBarTypeMem64
:
1420 case PciBarTypePMem64
:
1422 Address32
= (UINT32
) (Address
& 0x00000000FFFFFFFF);
1426 EfiPciIoWidthUint32
,
1427 (Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1432 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1436 EfiPciIoWidthUint32
,
1437 ((Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
+ 4),
1442 Node
->PciDev
->VfPciBar
[Node
->Bar
].BaseAddress
= Address
;
1446 "PCI-IOV B%x.D%x.F%x - VF Bar (Offset - 0x%x) 64Mem (Address - 0x%lx)\n",
1447 (UINTN
)Node
->PciDev
->BusNumber
,
1448 (UINTN
)Node
->PciDev
->DeviceNumber
,
1449 (UINTN
)Node
->PciDev
->FunctionNumber
,
1450 (UINTN
)(Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1456 case PciBarTypeIo16
:
1457 case PciBarTypeIo32
:
1468 Program PCI-PCI bridge apperture.
1470 @param Base Base address for resource.
1471 @param Node Point to resoure node structure.
1475 ProgramPpbApperture (
1477 IN PCI_RESOURCE_NODE
*Node
1480 EFI_PCI_IO_PROTOCOL
*PciIo
;
1486 // If no device resource of this PPB, return anyway
1487 // Apperture is set default in the initialization code
1489 if (Node
->Length
== 0 || Node
->ResourceUsage
== PciResUsagePadding
) {
1491 // For padding resource node, just ignore when programming
1496 PciIo
= &(Node
->PciDev
->PciIo
);
1497 Address
= Base
+ Node
->Offset
;
1500 // Indicate the PPB resource has been allocated
1502 Node
->PciDev
->Allocated
= TRUE
;
1504 switch (Node
->Bar
) {
1510 EfiPciIoWidthUint32
,
1511 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1516 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1517 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1523 Address32
= ((UINT32
) (Address
)) >> 8;
1535 EfiPciIoWidthUint16
,
1541 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1542 Address32
= ((UINT32
) (Address32
)) >> 8;
1554 EfiPciIoWidthUint16
,
1560 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1561 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1564 case PPB_MEM32_RANGE
:
1566 Address32
= ((UINT32
) (Address
)) >> 16;
1569 EfiPciIoWidthUint16
,
1575 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1576 Address32
= ((UINT32
) (Address32
)) >> 16;
1579 EfiPciIoWidthUint16
,
1585 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1586 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1589 case PPB_PMEM32_RANGE
:
1590 case PPB_PMEM64_RANGE
:
1592 Address32
= ((UINT32
) (Address
)) >> 16;
1595 EfiPciIoWidthUint16
,
1601 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1602 Address32
= ((UINT32
) (Address32
)) >> 16;
1605 EfiPciIoWidthUint16
,
1611 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1614 EfiPciIoWidthUint32
,
1620 Address32
= (UINT32
) RShiftU64 ((Address
+ Node
->Length
- 1), 32);
1623 EfiPciIoWidthUint32
,
1629 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1630 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1639 Program parent bridge for Option Rom.
1641 @param PciDevice Pci deivce instance.
1642 @param OptionRomBase Base address for Optiona Rom.
1643 @param Enable Enable or disable PCI memory.
1647 ProgrameUpstreamBridgeForRom (
1648 IN PCI_IO_DEVICE
*PciDevice
,
1649 IN UINT32 OptionRomBase
,
1653 PCI_IO_DEVICE
*Parent
;
1654 PCI_RESOURCE_NODE Node
;
1656 // For root bridge, just return.
1658 Parent
= PciDevice
->Parent
;
1659 ZeroMem (&Node
, sizeof (Node
));
1660 while (Parent
!= NULL
) {
1661 if (!IS_PCI_BRIDGE (&Parent
->Pci
)) {
1665 Node
.PciDev
= Parent
;
1666 Node
.Length
= PciDevice
->RomSize
;
1668 Node
.Bar
= PPB_MEM32_RANGE
;
1669 Node
.ResType
= PciBarTypeMem32
;
1673 // Program PPB to only open a single <= 16MB apperture
1676 ProgramPpbApperture (OptionRomBase
, &Node
);
1677 PCI_ENABLE_COMMAND_REGISTER (Parent
, EFI_PCI_COMMAND_MEMORY_SPACE
);
1679 InitializePpb (Parent
);
1680 PCI_DISABLE_COMMAND_REGISTER (Parent
, EFI_PCI_COMMAND_MEMORY_SPACE
);
1683 Parent
= Parent
->Parent
;
1688 Test whether resource exists for a bridge.
1690 @param Bridge Point to resource node for a bridge.
1692 @retval TRUE There is resource on the given bridge.
1693 @retval FALSE There isn't resource on the given bridge.
1697 ResourceRequestExisted (
1698 IN PCI_RESOURCE_NODE
*Bridge
1701 if (Bridge
!= NULL
) {
1702 if (!IsListEmpty (&Bridge
->ChildList
) || Bridge
->Length
!= 0) {
1711 Initialize resource pool structure.
1713 @param ResourcePool Point to resource pool structure. This pool
1714 is reset to all zero when returned.
1715 @param ResourceType Type of resource.
1719 InitializeResourcePool (
1720 IN OUT PCI_RESOURCE_NODE
*ResourcePool
,
1721 IN PCI_BAR_TYPE ResourceType
1724 ZeroMem (ResourcePool
, sizeof (PCI_RESOURCE_NODE
));
1725 ResourcePool
->ResType
= ResourceType
;
1726 ResourcePool
->Signature
= PCI_RESOURCE_SIGNATURE
;
1727 InitializeListHead (&ResourcePool
->ChildList
);
1732 Get all resource information for given Pci device.
1734 @param PciDev Pci device instance.
1735 @param IoBridge Io resource node.
1736 @param Mem32Bridge 32-bit memory node.
1737 @param PMem32Bridge 32-bit Pmemory node.
1738 @param Mem64Bridge 64-bit memory node.
1739 @param PMem64Bridge 64-bit PMemory node.
1740 @param IoPool Link list header for Io resource.
1741 @param Mem32Pool Link list header for 32-bit memory.
1742 @param PMem32Pool Link list header for 32-bit Prefetchable memory.
1743 @param Mem64Pool Link list header for 64-bit memory.
1744 @param PMem64Pool Link list header for 64-bit Prefetchable memory.
1749 IN PCI_IO_DEVICE
*PciDev
,
1750 IN PCI_RESOURCE_NODE
**IoBridge
,
1751 IN PCI_RESOURCE_NODE
**Mem32Bridge
,
1752 IN PCI_RESOURCE_NODE
**PMem32Bridge
,
1753 IN PCI_RESOURCE_NODE
**Mem64Bridge
,
1754 IN PCI_RESOURCE_NODE
**PMem64Bridge
,
1755 IN PCI_RESOURCE_NODE
*IoPool
,
1756 IN PCI_RESOURCE_NODE
*Mem32Pool
,
1757 IN PCI_RESOURCE_NODE
*PMem32Pool
,
1758 IN PCI_RESOURCE_NODE
*Mem64Pool
,
1759 IN PCI_RESOURCE_NODE
*PMem64Pool
1763 PCI_RESOURCE_NODE
*Temp
;
1764 LIST_ENTRY
*CurrentLink
;
1766 CurrentLink
= IoPool
->ChildList
.ForwardLink
;
1769 // Get Io resource map
1771 while (CurrentLink
!= &IoPool
->ChildList
) {
1773 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1775 if (Temp
->PciDev
== PciDev
) {
1779 CurrentLink
= CurrentLink
->ForwardLink
;
1783 // Get Mem32 resource map
1785 CurrentLink
= Mem32Pool
->ChildList
.ForwardLink
;
1787 while (CurrentLink
!= &Mem32Pool
->ChildList
) {
1789 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1791 if (Temp
->PciDev
== PciDev
) {
1792 *Mem32Bridge
= Temp
;
1795 CurrentLink
= CurrentLink
->ForwardLink
;
1799 // Get Pmem32 resource map
1801 CurrentLink
= PMem32Pool
->ChildList
.ForwardLink
;
1803 while (CurrentLink
!= &PMem32Pool
->ChildList
) {
1805 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1807 if (Temp
->PciDev
== PciDev
) {
1808 *PMem32Bridge
= Temp
;
1811 CurrentLink
= CurrentLink
->ForwardLink
;
1815 // Get Mem64 resource map
1817 CurrentLink
= Mem64Pool
->ChildList
.ForwardLink
;
1819 while (CurrentLink
!= &Mem64Pool
->ChildList
) {
1821 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1823 if (Temp
->PciDev
== PciDev
) {
1824 *Mem64Bridge
= Temp
;
1827 CurrentLink
= CurrentLink
->ForwardLink
;
1831 // Get Pmem64 resource map
1833 CurrentLink
= PMem64Pool
->ChildList
.ForwardLink
;
1835 while (CurrentLink
!= &PMem64Pool
->ChildList
) {
1837 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1839 if (Temp
->PciDev
== PciDev
) {
1840 *PMem64Bridge
= Temp
;
1843 CurrentLink
= CurrentLink
->ForwardLink
;
1848 Destory given resource tree.
1850 @param Bridge PCI resource root node of resource tree.
1854 DestroyResourceTree (
1855 IN PCI_RESOURCE_NODE
*Bridge
1858 PCI_RESOURCE_NODE
*Temp
;
1859 LIST_ENTRY
*CurrentLink
;
1861 while (!IsListEmpty (&Bridge
->ChildList
)) {
1863 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1865 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1868 RemoveEntryList (CurrentLink
);
1870 if (IS_PCI_BRIDGE (&(Temp
->PciDev
->Pci
))) {
1871 DestroyResourceTree (Temp
);
1879 Insert resource padding for P2C.
1881 @param PciDev Pci device instance.
1882 @param IoNode Resource info node for IO.
1883 @param Mem32Node Resource info node for 32-bit memory.
1884 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
1885 @param Mem64Node Resource info node for 64-bit memory.
1886 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1890 ResourcePaddingForCardBusBridge (
1891 IN PCI_IO_DEVICE
*PciDev
,
1892 IN PCI_RESOURCE_NODE
*IoNode
,
1893 IN PCI_RESOURCE_NODE
*Mem32Node
,
1894 IN PCI_RESOURCE_NODE
*PMem32Node
,
1895 IN PCI_RESOURCE_NODE
*Mem64Node
,
1896 IN PCI_RESOURCE_NODE
*PMem64Node
1899 PCI_RESOURCE_NODE
*Node
;
1904 // Memory Base/Limit Register 0
1905 // Bar 1 denodes memory range 0
1907 Node
= CreateResourceNode (
1916 InsertResourceNode (
1922 // Memory Base/Limit Register 1
1923 // Bar 2 denodes memory range1
1925 Node
= CreateResourceNode (
1934 InsertResourceNode (
1941 // Bar 3 denodes io range 0
1943 Node
= CreateResourceNode (
1952 InsertResourceNode (
1959 // Bar 4 denodes io range 0
1961 Node
= CreateResourceNode (
1970 InsertResourceNode (
1977 Program PCI Card device register for given resource node.
1979 @param Base Base address of PCI Card device to be programmed.
1980 @param Node Given resource node.
1986 IN PCI_RESOURCE_NODE
*Node
1989 EFI_PCI_IO_PROTOCOL
*PciIo
;
1992 UINT16 BridgeControl
;
1995 PciIo
= &(Node
->PciDev
->PciIo
);
1997 Address
= Base
+ Node
->Offset
;
2000 // Indicate pci bus driver has allocated
2001 // resource for this device
2002 // It might be a temporary solution here since
2003 // pci device could have multiple bar
2005 Node
->PciDev
->Allocated
= TRUE
;
2007 switch (Node
->Bar
) {
2012 EfiPciIoWidthUint32
,
2013 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
2018 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2019 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2025 EfiPciIoWidthUint32
,
2026 PCI_CARD_MEMORY_BASE_0
,
2031 TempAddress
= Address
+ Node
->Length
- 1;
2034 EfiPciIoWidthUint32
,
2035 PCI_CARD_MEMORY_LIMIT_0
,
2040 if (Node
->ResType
== PciBarTypeMem32
) {
2042 // Set non-prefetchable bit
2046 EfiPciIoWidthUint16
,
2047 PCI_CARD_BRIDGE_CONTROL
,
2052 BridgeControl
&= (UINT16
) ~PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE
;
2055 EfiPciIoWidthUint16
,
2056 PCI_CARD_BRIDGE_CONTROL
,
2063 // Set pre-fetchable bit
2067 EfiPciIoWidthUint16
,
2068 PCI_CARD_BRIDGE_CONTROL
,
2073 BridgeControl
|= PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE
;
2076 EfiPciIoWidthUint16
,
2077 PCI_CARD_BRIDGE_CONTROL
,
2083 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2084 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2085 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2092 EfiPciIoWidthUint32
,
2093 PCI_CARD_MEMORY_BASE_1
,
2098 TempAddress
= Address
+ Node
->Length
- 1;
2102 EfiPciIoWidthUint32
,
2103 PCI_CARD_MEMORY_LIMIT_1
,
2108 if (Node
->ResType
== PciBarTypeMem32
) {
2111 // Set non-prefetchable bit
2115 EfiPciIoWidthUint16
,
2116 PCI_CARD_BRIDGE_CONTROL
,
2121 BridgeControl
&= (UINT16
) ~(PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE
);
2124 EfiPciIoWidthUint16
,
2125 PCI_CARD_BRIDGE_CONTROL
,
2133 // Set pre-fetchable bit
2137 EfiPciIoWidthUint16
,
2138 PCI_CARD_BRIDGE_CONTROL
,
2143 BridgeControl
|= PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE
;
2146 EfiPciIoWidthUint16
,
2147 PCI_CARD_BRIDGE_CONTROL
,
2153 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2154 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2155 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2161 EfiPciIoWidthUint32
,
2162 PCI_CARD_IO_BASE_0_LOWER
,
2167 TempAddress
= Address
+ Node
->Length
- 1;
2170 EfiPciIoWidthUint32
,
2171 PCI_CARD_IO_LIMIT_0_LOWER
,
2176 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2177 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2178 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2185 EfiPciIoWidthUint32
,
2186 PCI_CARD_IO_BASE_1_LOWER
,
2191 TempAddress
= Address
+ Node
->Length
- 1;
2194 EfiPciIoWidthUint32
,
2195 PCI_CARD_IO_LIMIT_1_LOWER
,
2200 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2201 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2202 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2211 Create padding resource node.
2213 @param PciDev Pci device instance.
2214 @param IoNode Resource info node for IO.
2215 @param Mem32Node Resource info node for 32-bit memory.
2216 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
2217 @param Mem64Node Resource info node for 64-bit memory.
2218 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
2222 ApplyResourcePadding (
2223 IN PCI_IO_DEVICE
*PciDev
,
2224 IN PCI_RESOURCE_NODE
*IoNode
,
2225 IN PCI_RESOURCE_NODE
*Mem32Node
,
2226 IN PCI_RESOURCE_NODE
*PMem32Node
,
2227 IN PCI_RESOURCE_NODE
*Mem64Node
,
2228 IN PCI_RESOURCE_NODE
*PMem64Node
2231 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
2232 PCI_RESOURCE_NODE
*Node
;
2233 UINT8 DummyBarIndex
;
2236 Ptr
= PciDev
->ResourcePaddingDescriptors
;
2238 while (((EFI_ACPI_END_TAG_DESCRIPTOR
*) Ptr
)->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
2240 if (Ptr
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
&& Ptr
->ResType
== ACPI_ADDRESS_SPACE_TYPE_IO
) {
2241 if (Ptr
->AddrLen
!= 0) {
2243 Node
= CreateResourceNode (
2251 InsertResourceNode (
2261 if (Ptr
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
&& Ptr
->ResType
== ACPI_ADDRESS_SPACE_TYPE_MEM
) {
2263 if (Ptr
->AddrSpaceGranularity
== 32) {
2268 if (Ptr
->SpecificFlag
== 0x6) {
2269 if (Ptr
->AddrLen
!= 0) {
2270 Node
= CreateResourceNode (
2278 InsertResourceNode (
2291 if (Ptr
->SpecificFlag
== 0) {
2292 if (Ptr
->AddrLen
!= 0) {
2293 Node
= CreateResourceNode (
2301 InsertResourceNode (
2312 if (Ptr
->AddrSpaceGranularity
== 64) {
2317 if (Ptr
->SpecificFlag
== 0x6) {
2318 if (Ptr
->AddrLen
!= 0) {
2319 Node
= CreateResourceNode (
2327 InsertResourceNode (
2340 if (Ptr
->SpecificFlag
== 0) {
2341 if (Ptr
->AddrLen
!= 0) {
2342 Node
= CreateResourceNode (
2350 InsertResourceNode (
2367 Get padding resource for PCI-PCI bridge.
2369 @param PciIoDevice PCI-PCI bridge device instance.
2371 @note Feature flag PcdPciBusHotplugDeviceSupport determines
2372 whether need to pad resource for them.
2375 GetResourcePaddingPpb (
2376 IN PCI_IO_DEVICE
*PciIoDevice
2379 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
2380 if (PciIoDevice
->ResourcePaddingDescriptors
== NULL
) {
2381 GetResourcePaddingForHpb (PciIoDevice
);