MdeModulePkg/Bus/Pci/SdMmcPciHcPei/SdMmcPciHcPei.h

   1 /** @file
   2
   3   Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
   4   SPDX-License-Identifier: BSD-2-Clause-Patent
   5
   6 **/
   7
   8 #ifndef _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_
   9 #define _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_
  10
  11 #include <PiPei.h>
  12
  13 #include <Ppi/MasterBootMode.h>
  14 #include <Ppi/SdMmcHostController.h>
  15
  16 #include <IndustryStandard/Pci.h>
  17
  18 #include <Library/DebugLib.h>
  19 #include <Library/BaseLib.h>
  20 #include <Library/BaseMemoryLib.h>
  21 #include <Library/PciLib.h>
  22 #include <Library/PeiServicesLib.h>
  23 #include <Library/MemoryAllocationLib.h>
  24
  25 #define SD_MMC_HC_PEI_SIGNATURE  SIGNATURE_32 ('S', 'D', 'M', 'C')
  26
  27 #define MAX_SD_MMC_HCS    8
  28 #define MAX_SD_MMC_SLOTS  6
  29
  30 //
  31 // SD Host Controller SlotInfo Register Offset
  32 //
  33 #define SD_MMC_HC_PEI_SLOT_OFFSET  0x40
  34
  35 typedef struct {
  36   UINT8    FirstBar  : 3;     // bit 0:2
  37   UINT8    Reserved  : 1;     // bit 3
  38   UINT8    SlotNum   : 3;     // bit 4:6
  39   UINT8    Reserved1 : 1;     // bit 7
  40 } SD_MMC_HC_PEI_SLOT_INFO;
  41
  42 typedef struct {
  43   UINTN    SlotNum;
  44   UINTN    MmioBarAddr[MAX_SD_MMC_SLOTS];
  45 } SD_MMC_HC_PEI_BAR;
  46
  47 typedef struct {
  48   UINTN                               Signature;
  49   EDKII_SD_MMC_HOST_CONTROLLER_PPI    SdMmcHostControllerPpi;
  50   EFI_PEI_PPI_DESCRIPTOR              PpiList;
  51   UINTN                               TotalSdMmcHcs;
  52   SD_MMC_HC_PEI_BAR                   MmioBar[MAX_SD_MMC_HCS];
  53 } SD_MMC_HC_PEI_PRIVATE_DATA;
  54
  55 #define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a)  CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)
  56
  57 /**
  58   Get the MMIO base address of SD/MMC host controller.
  59
  60   @param[in]     This            The protocol instance pointer.
  61   @param[in]     ControllerId    The ID of the SD/MMC host controller.
  62   @param[in,out] MmioBar         The pointer to store the array of available
  63                                  SD/MMC host controller slot MMIO base addresses.
  64                                  The entry number of the array is specified by BarNum.
  65   @param[out]    BarNum          The pointer to store the supported bar number.
  66
  67   @retval EFI_SUCCESS            The operation succeeds.
  68   @retval EFI_INVALID_PARAMETER  The parameters are invalid.
  69
  70 **/
  71 EFI_STATUS
  72 EFIAPI
  73 GetSdMmcHcMmioBar (
  74   IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI  *This,
  75   IN     UINT8                             ControllerId,
  76   IN OUT UINTN                             **MmioBar,
  77   OUT UINT8                                *BarNum
  78   );
  79
  80 #endif