MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h

   1 /** @file
   2
   3   The definition for UHCI driver model and HC protocol routines.
   4
   5 Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
   6 This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef _EFI_UHCI_H_
  17 #define _EFI_UHCI_H_
  18
  19
  20 #include <Uefi.h>
  21
  22 #include <Protocol/Usb2HostController.h>
  23 #include <Protocol/UsbHostController.h>
  24 #include <Protocol/PciIo.h>
  25
  26 #include <Guid/EventGroup.h>
  27
  28 #include <Library/DebugLib.h>
  29 #include <Library/BaseMemoryLib.h>
  30 #include <Library/UefiDriverEntryPoint.h>
  31 #include <Library/UefiBootServicesTableLib.h>
  32 #include <Library/UefiLib.h>
  33 #include <Library/BaseLib.h>
  34 #include <Library/MemoryAllocationLib.h>
  35 #include <Library/PcdLib.h>
  36
  37 #include <IndustryStandard/Pci.h>
  38
  39 typedef struct _USB_HC_DEV  USB_HC_DEV;
  40
  41 #include "UsbHcMem.h"
  42 #include "UhciQueue.h"
  43 #include "UhciReg.h"
  44 #include "UhciSched.h"
  45 #include "UhciDebug.h"
  46 #include "ComponentName.h"
  47
  48 //
  49 // UHC timeout experience values
  50 //
  51
  52 #define UHC_1_MICROSECOND             1
  53 #define UHC_1_MILLISECOND             (1000 * UHC_1_MICROSECOND)
  54 #define UHC_1_SECOND                  (1000 * UHC_1_MILLISECOND)
  55
  56 //
  57 // UHCI register operation timeout, set by experience
  58 //
  59 #define UHC_GENERIC_TIMEOUT           UHC_1_SECOND
  60
  61 //
  62 // Wait for force global resume(FGR) complete, refers to
  63 // specification[UHCI11-2.1.1]
  64 //
  65 #define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)
  66
  67 //
  68 // Wait for roothub port reset and recovery, reset stall
  69 // is set by experience, and recovery stall refers to
  70 // specification[UHCI11-2.1.1]
  71 //
  72 #define UHC_ROOT_PORT_RESET_STALL     (50 * UHC_1_MILLISECOND)
  73 #define UHC_ROOT_PORT_RECOVERY_STALL  (10 * UHC_1_MILLISECOND)
  74
  75 //
  76 // Sync and Async transfer polling interval, set by experience,
  77 // and the unit of Async is 100us.
  78 //
  79 #define UHC_SYNC_POLL_INTERVAL        (1 * UHC_1_MILLISECOND)
  80 #define UHC_ASYNC_POLL_INTERVAL       (50 * 10000UL)
  81
  82 //
  83 // UHC raises TPL to TPL_NOTIFY to serialize all its operations
  84 // to protect shared data structures.
  85 //
  86 #define  UHCI_TPL                     TPL_NOTIFY
  87
  88 #define  USB_HC_DEV_SIGNATURE         SIGNATURE_32 ('u', 'h', 'c', 'i')
  89
  90 #pragma pack(1)
  91 typedef struct {
  92   UINT8               ProgInterface;
  93   UINT8               SubClassCode;
  94   UINT8               BaseCode;
  95 } USB_CLASSC;
  96 #pragma pack()
  97
  98 #define UHC_FROM_USB2_HC_PROTO(This)  CR(This, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)
  99
 100 //
 101 // USB_HC_DEV support the UHCI hardware controller. It schedules
 102 // the asynchronous interrupt transfer with the same method as
 103 // EHCI: a reversed tree structure. For synchronous interrupt,
 104 // control and bulk transfer, it uses three static queue head to
 105 // schedule them. SyncIntQh is for interrupt transfer. LsCtrlQh is
 106 // for LOW speed control transfer, and FsCtrlBulkQh is for FULL
 107 // speed control or bulk transfer. This is because FULL speed contrl
 108 // or bulk transfer can reclaim the unused bandwidth. Some USB
 109 // device requires this bandwidth reclamation capability.
 110 //
 111 struct _USB_HC_DEV {
 112   UINT32                    Signature;
 113   EFI_USB2_HC_PROTOCOL      Usb2Hc;
 114   EFI_PCI_IO_PROTOCOL       *PciIo;
 115   UINT64                    OriginalPciAttributes;
 116
 117   //
 118   // Schedule data structures
 119   //
 120   UINT32                    *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
 121   UINT32                    *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
 122   UHCI_QH_SW                *SyncIntQh;
 123   UHCI_QH_SW                *CtrlQh;
 124   UHCI_QH_SW                *BulkQh;
 125
 126   //
 127   // Structures to maintain asynchronus interrupt transfers.
 128   // When asynchronous interrutp transfer is unlinked from
 129   // the frame list, the hardware may still hold a pointer
 130   // to it. To synchronize with hardware, its resoureces are
 131   // released in two steps using Recycle and RecycleWait.
 132   // Check the asynchronous interrupt management routines.
 133   //
 134   LIST_ENTRY                AsyncIntList;
 135   EFI_EVENT                 AsyncIntMonitor;
 136   UHCI_ASYNC_REQUEST        *Recycle;
 137   UHCI_ASYNC_REQUEST        *RecycleWait;
 138
 139
 140   UINTN                     RootPorts;
 141   USBHC_MEM_POOL            *MemPool;
 142   EFI_UNICODE_STRING_TABLE  *CtrlNameTable;
 143   VOID                      *FrameMapping;
 144
 145   //
 146   // ExitBootServicesEvent is used to stop the EHC DMA operation
 147   // after exit boot service.
 148   //
 149   EFI_EVENT                 ExitBootServiceEvent;
 150 };
 151
 152 extern EFI_DRIVER_BINDING_PROTOCOL   gUhciDriverBinding;
 153 extern EFI_COMPONENT_NAME_PROTOCOL   gUhciComponentName;
 154 extern EFI_COMPONENT_NAME2_PROTOCOL  gUhciComponentName2;
 155
 156 /**
 157   Test to see if this driver supports ControllerHandle. Any
 158   ControllerHandle that has UsbHcProtocol installed will be supported.
 159
 160   @param  This                 Protocol instance pointer.
 161   @param  Controller           Handle of device to test.
 162   @param  RemainingDevicePath  Not used.
 163
 164   @return EFI_SUCCESS          This driver supports this device.
 165   @return EFI_UNSUPPORTED      This driver does not support this device.
 166
 167 **/
 168 EFI_STATUS
 169 EFIAPI
 170 UhciDriverBindingSupported (
 171   IN EFI_DRIVER_BINDING_PROTOCOL     *This,
 172   IN EFI_HANDLE                      Controller,
 173   IN EFI_DEVICE_PATH_PROTOCOL        *RemainingDevicePath
 174   );
 175
 176 /**
 177   Starting the Usb UHCI Driver.
 178
 179   @param  This                 Protocol instance pointer.
 180   @param  Controller           Handle of device to test.
 181   @param  RemainingDevicePath  Not used.
 182
 183   @retval EFI_SUCCESS          This driver supports this device.
 184   @retval EFI_UNSUPPORTED      This driver does not support this device.
 185   @retval EFI_DEVICE_ERROR     This driver cannot be started due to device Error.
 186                                EFI_OUT_OF_RESOURCES- Failed due to resource shortage.
 187
 188 **/
 189 EFI_STATUS
 190 EFIAPI
 191 UhciDriverBindingStart (
 192   IN EFI_DRIVER_BINDING_PROTOCOL     *This,
 193   IN EFI_HANDLE                      Controller,
 194   IN EFI_DEVICE_PATH_PROTOCOL        *RemainingDevicePath
 195   );
 196
 197 /**
 198   Stop this driver on ControllerHandle. Support stoping any child handles
 199   created by this driver.
 200
 201   @param  This                 Protocol instance pointer.
 202   @param  Controller           Handle of device to stop driver on.
 203   @param  NumberOfChildren     Number of Children in the ChildHandleBuffer.
 204   @param  ChildHandleBuffer    List of handles for the children we need to stop.
 205
 206   @return EFI_SUCCESS
 207   @return others
 208
 209 **/
 210 EFI_STATUS
 211 EFIAPI
 212 UhciDriverBindingStop (
 213   IN EFI_DRIVER_BINDING_PROTOCOL     *This,
 214   IN EFI_HANDLE                      Controller,
 215   IN UINTN                           NumberOfChildren,
 216   IN EFI_HANDLE                      *ChildHandleBuffer
 217   );
 218
 219 #endif