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1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "Xhci.h"
10
11 //
12 // Two arrays used to translate the XHCI port state (change)
13 // to the UEFI protocol's port state (change).
14 //
15 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
16 { XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
17 { XHC_PORTSC_PED, USB_PORT_STAT_ENABLE },
18 { XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
19 { XHC_PORTSC_RESET, USB_PORT_STAT_RESET }
20 };
21
22 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
23 { XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
24 { XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
25 { XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
26 { XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET }
27 };
28
29 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
30 { XHC_PORTSC_CSC, EfiUsbPortConnectChange },
31 { XHC_PORTSC_PEC, EfiUsbPortEnableChange },
32 { XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange },
33 { XHC_PORTSC_PRC, EfiUsbPortResetChange }
34 };
35
36 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
37 { XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
38 { XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE },
39 { XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
40 { XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET }
41 };
42
43 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
44 { XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
45 { XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
46 { XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
47 { XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET }
48 };
49
50 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
51 { XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange },
52 { XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange },
53 { XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange },
54 { XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange },
55 { XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange }
56 };
57
58 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
59 XhcDriverBindingSupported,
60 XhcDriverBindingStart,
61 XhcDriverBindingStop,
62 0x30,
63 NULL,
64 NULL
65 };
66
67 //
68 // Template for Xhci's Usb2 Host Controller Protocol Instance.
69 //
70 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
71 XhcGetCapability,
72 XhcReset,
73 XhcGetState,
74 XhcSetState,
75 XhcControlTransfer,
76 XhcBulkTransfer,
77 XhcAsyncInterruptTransfer,
78 XhcSyncInterruptTransfer,
79 XhcIsochronousTransfer,
80 XhcAsyncIsochronousTransfer,
81 XhcGetRootHubPortStatus,
82 XhcSetRootHubPortFeature,
83 XhcClearRootHubPortFeature,
84 0x3,
85 0x0
86 };
87
88 /**
89 Retrieves the capability of root hub ports.
90
91 @param This The EFI_USB2_HC_PROTOCOL instance.
92 @param MaxSpeed Max speed supported by the controller.
93 @param PortNumber Number of the root hub ports.
94 @param Is64BitCapable Whether the controller supports 64-bit memory
95 addressing.
96
97 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
98 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
99
100 **/
101 EFI_STATUS
102 EFIAPI
103 XhcGetCapability (
104 IN EFI_USB2_HC_PROTOCOL *This,
105 OUT UINT8 *MaxSpeed,
106 OUT UINT8 *PortNumber,
107 OUT UINT8 *Is64BitCapable
108 )
109 {
110 USB_XHCI_INSTANCE *Xhc;
111 EFI_TPL OldTpl;
112
113 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
114 return EFI_INVALID_PARAMETER;
115 }
116
117 OldTpl = gBS->RaiseTPL (XHC_TPL);
118
119 Xhc = XHC_FROM_THIS (This);
120 *MaxSpeed = EFI_USB_SPEED_SUPER;
121 *PortNumber = (UINT8)(Xhc->HcSParams1.Data.MaxPorts);
122 *Is64BitCapable = (UINT8)Xhc->Support64BitDma;
123 DEBUG ((DEBUG_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
124
125 gBS->RestoreTPL (OldTpl);
126
127 return EFI_SUCCESS;
128 }
129
130 /**
131 Provides software reset for the USB host controller.
132
133 @param This This EFI_USB2_HC_PROTOCOL instance.
134 @param Attributes A bit mask of the reset operation to perform.
135
136 @retval EFI_SUCCESS The reset operation succeeded.
137 @retval EFI_INVALID_PARAMETER Attributes is not valid.
138 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
139 not currently supported by the host controller.
140 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
141
142 **/
143 EFI_STATUS
144 EFIAPI
145 XhcReset (
146 IN EFI_USB2_HC_PROTOCOL *This,
147 IN UINT16 Attributes
148 )
149 {
150 USB_XHCI_INSTANCE *Xhc;
151 EFI_STATUS Status;
152 EFI_TPL OldTpl;
153
154 Xhc = XHC_FROM_THIS (This);
155
156 if (Xhc->DevicePath != NULL) {
157 //
158 // Report Status Code to indicate reset happens
159 //
160 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
161 EFI_PROGRESS_CODE,
162 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
163 Xhc->DevicePath
164 );
165 }
166
167 OldTpl = gBS->RaiseTPL (XHC_TPL);
168
169 switch (Attributes) {
170 case EFI_USB_HC_RESET_GLOBAL:
171 //
172 // Flow through, same behavior as Host Controller Reset
173 //
174 case EFI_USB_HC_RESET_HOST_CONTROLLER:
175 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
176 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0))
177 {
178 Status = EFI_SUCCESS;
179 goto ON_EXIT;
180 }
181
182 //
183 // Host Controller must be Halt when Reset it
184 //
185 if (!XhcIsHalt (Xhc)) {
186 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
187
188 if (EFI_ERROR (Status)) {
189 Status = EFI_DEVICE_ERROR;
190 goto ON_EXIT;
191 }
192 }
193
194 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
195 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
196
197 if (EFI_ERROR (Status)) {
198 goto ON_EXIT;
199 }
200
201 //
202 // Clean up the asynchronous transfers, currently only
203 // interrupt supports asynchronous operation.
204 //
205 XhciDelAllAsyncIntTransfers (Xhc);
206 XhcFreeSched (Xhc);
207
208 XhcInitSched (Xhc);
209 break;
210
211 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
212 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
213 Status = EFI_UNSUPPORTED;
214 break;
215
216 default:
217 Status = EFI_INVALID_PARAMETER;
218 }
219
220 ON_EXIT:
221 DEBUG ((DEBUG_INFO, "XhcReset: status %r\n", Status));
222 gBS->RestoreTPL (OldTpl);
223
224 return Status;
225 }
226
227 /**
228 Retrieve the current state of the USB host controller.
229
230 @param This This EFI_USB2_HC_PROTOCOL instance.
231 @param State Variable to return the current host controller
232 state.
233
234 @retval EFI_SUCCESS Host controller state was returned in State.
235 @retval EFI_INVALID_PARAMETER State is NULL.
236 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
237 retrieve the host controller's current state.
238
239 **/
240 EFI_STATUS
241 EFIAPI
242 XhcGetState (
243 IN EFI_USB2_HC_PROTOCOL *This,
244 OUT EFI_USB_HC_STATE *State
245 )
246 {
247 USB_XHCI_INSTANCE *Xhc;
248 EFI_TPL OldTpl;
249
250 if (State == NULL) {
251 return EFI_INVALID_PARAMETER;
252 }
253
254 OldTpl = gBS->RaiseTPL (XHC_TPL);
255
256 Xhc = XHC_FROM_THIS (This);
257
258 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
259 *State = EfiUsbHcStateHalt;
260 } else {
261 *State = EfiUsbHcStateOperational;
262 }
263
264 DEBUG ((DEBUG_INFO, "XhcGetState: current state %d\n", *State));
265 gBS->RestoreTPL (OldTpl);
266
267 return EFI_SUCCESS;
268 }
269
270 /**
271 Sets the USB host controller to a specific state.
272
273 @param This This EFI_USB2_HC_PROTOCOL instance.
274 @param State The state of the host controller that will be set.
275
276 @retval EFI_SUCCESS The USB host controller was successfully placed
277 in the state specified by State.
278 @retval EFI_INVALID_PARAMETER State is invalid.
279 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
280
281 **/
282 EFI_STATUS
283 EFIAPI
284 XhcSetState (
285 IN EFI_USB2_HC_PROTOCOL *This,
286 IN EFI_USB_HC_STATE State
287 )
288 {
289 USB_XHCI_INSTANCE *Xhc;
290 EFI_STATUS Status;
291 EFI_USB_HC_STATE CurState;
292 EFI_TPL OldTpl;
293
294 Status = XhcGetState (This, &CurState);
295
296 if (EFI_ERROR (Status)) {
297 return EFI_DEVICE_ERROR;
298 }
299
300 if (CurState == State) {
301 return EFI_SUCCESS;
302 }
303
304 OldTpl = gBS->RaiseTPL (XHC_TPL);
305
306 Xhc = XHC_FROM_THIS (This);
307
308 switch (State) {
309 case EfiUsbHcStateHalt:
310 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
311 break;
312
313 case EfiUsbHcStateOperational:
314 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
315 Status = EFI_DEVICE_ERROR;
316 break;
317 }
318
319 //
320 // Software must not write a one to this field unless the host controller
321 // is in the Halted state. Doing so will yield undefined results.
322 // refers to Spec[XHCI1.0-2.3.1]
323 //
324 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
325 Status = EFI_DEVICE_ERROR;
326 break;
327 }
328
329 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
330 break;
331
332 case EfiUsbHcStateSuspend:
333 Status = EFI_UNSUPPORTED;
334 break;
335
336 default:
337 Status = EFI_INVALID_PARAMETER;
338 }
339
340 DEBUG ((DEBUG_INFO, "XhcSetState: status %r\n", Status));
341 gBS->RestoreTPL (OldTpl);
342
343 return Status;
344 }
345
346 /**
347 Retrieves the current status of a USB root hub port.
348
349 @param This This EFI_USB2_HC_PROTOCOL instance.
350 @param PortNumber The root hub port to retrieve the state from.
351 This value is zero-based.
352 @param PortStatus Variable to receive the port state.
353
354 @retval EFI_SUCCESS The status of the USB root hub port specified.
355 by PortNumber was returned in PortStatus.
356 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
357 @retval EFI_DEVICE_ERROR Can't read register.
358
359 **/
360 EFI_STATUS
361 EFIAPI
362 XhcGetRootHubPortStatus (
363 IN EFI_USB2_HC_PROTOCOL *This,
364 IN UINT8 PortNumber,
365 OUT EFI_USB_PORT_STATUS *PortStatus
366 )
367 {
368 USB_XHCI_INSTANCE *Xhc;
369 UINT32 Offset;
370 UINT32 State;
371 UINT32 TotalPort;
372 UINTN Index;
373 UINTN MapSize;
374 EFI_STATUS Status;
375 USB_DEV_ROUTE ParentRouteChart;
376 EFI_TPL OldTpl;
377
378 if (PortStatus == NULL) {
379 return EFI_INVALID_PARAMETER;
380 }
381
382 OldTpl = gBS->RaiseTPL (XHC_TPL);
383
384 Xhc = XHC_FROM_THIS (This);
385 Status = EFI_SUCCESS;
386
387 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
388
389 if (PortNumber >= TotalPort) {
390 Status = EFI_INVALID_PARAMETER;
391 goto ON_EXIT;
392 }
393
394 Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
395 PortStatus->PortStatus = 0;
396 PortStatus->PortChangeStatus = 0;
397
398 State = XhcReadOpReg (Xhc, Offset);
399
400 //
401 // According to XHCI 1.1 spec November 2017,
402 // Section 7.2 xHCI Support Protocol Capability
403 //
404 PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10));
405 if (PortStatus->PortStatus == 0) {
406 //
407 // According to XHCI 1.1 spec November 2017,
408 // bit 10~13 of the root port status register identifies the speed of the attached device.
409 //
410 switch ((State & XHC_PORTSC_PS) >> 10) {
411 case 2:
412 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
413 break;
414
415 case 3:
416 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
417 break;
418
419 case 4:
420 case 5:
421 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
422 break;
423
424 default:
425 break;
426 }
427 }
428
429 //
430 // Convert the XHCI port/port change state to UEFI status
431 //
432 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
433
434 for (Index = 0; Index < MapSize; Index++) {
435 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
436 PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
437 }
438 }
439
440 //
441 // Bit5~8 reflects its current link state.
442 //
443 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
444 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
445 }
446
447 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
448
449 for (Index = 0; Index < MapSize; Index++) {
450 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
451 PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
452 }
453 }
454
455 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
456
457 for (Index = 0; Index < MapSize; Index++) {
458 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
459 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
460 }
461 }
462
463 //
464 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
465 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
466 //
467 ParentRouteChart.Dword = 0;
468 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
469
470 ON_EXIT:
471 gBS->RestoreTPL (OldTpl);
472 return Status;
473 }
474
475 /**
476 Sets a feature for the specified root hub port.
477
478 @param This This EFI_USB2_HC_PROTOCOL instance.
479 @param PortNumber Root hub port to set.
480 @param PortFeature Feature to set.
481
482 @retval EFI_SUCCESS The feature specified by PortFeature was set.
483 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
484 @retval EFI_DEVICE_ERROR Can't read register.
485
486 **/
487 EFI_STATUS
488 EFIAPI
489 XhcSetRootHubPortFeature (
490 IN EFI_USB2_HC_PROTOCOL *This,
491 IN UINT8 PortNumber,
492 IN EFI_USB_PORT_FEATURE PortFeature
493 )
494 {
495 USB_XHCI_INSTANCE *Xhc;
496 UINT32 Offset;
497 UINT32 State;
498 UINT32 TotalPort;
499 EFI_STATUS Status;
500 EFI_TPL OldTpl;
501
502 OldTpl = gBS->RaiseTPL (XHC_TPL);
503
504 Xhc = XHC_FROM_THIS (This);
505 Status = EFI_SUCCESS;
506
507 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
508
509 if (PortNumber >= TotalPort) {
510 Status = EFI_INVALID_PARAMETER;
511 goto ON_EXIT;
512 }
513
514 Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
515 State = XhcReadOpReg (Xhc, Offset);
516
517 //
518 // Mask off the port status change bits, these bits are
519 // write clean bit
520 //
521 State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
522
523 switch (PortFeature) {
524 case EfiUsbPortEnable:
525 //
526 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
527 // A port may be disabled by software writing a '1' to this flag.
528 //
529 Status = EFI_SUCCESS;
530 break;
531
532 case EfiUsbPortSuspend:
533 State |= XHC_PORTSC_LWS;
534 XhcWriteOpReg (Xhc, Offset, State);
535 State &= ~XHC_PORTSC_PLS;
536 State |= (3 << 5);
537 XhcWriteOpReg (Xhc, Offset, State);
538 break;
539
540 case EfiUsbPortReset:
541 DEBUG ((DEBUG_INFO, "XhcUsbPortReset!\n"));
542 //
543 // Make sure Host Controller not halt before reset it
544 //
545 if (XhcIsHalt (Xhc)) {
546 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
547
548 if (EFI_ERROR (Status)) {
549 DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
550 break;
551 }
552 }
553
554 //
555 // 4.3.1 Resetting a Root Hub Port
556 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
557 //
558 State |= XHC_PORTSC_RESET;
559 XhcWriteOpReg (Xhc, Offset, State);
560 XhcWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
561 break;
562
563 case EfiUsbPortPower:
564 //
565 // Not supported, ignore the operation
566 //
567 Status = EFI_SUCCESS;
568 break;
569
570 case EfiUsbPortOwner:
571 //
572 // XHCI root hub port don't has the owner bit, ignore the operation
573 //
574 Status = EFI_SUCCESS;
575 break;
576
577 default:
578 Status = EFI_INVALID_PARAMETER;
579 }
580
581 ON_EXIT:
582 DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
583 gBS->RestoreTPL (OldTpl);
584
585 return Status;
586 }
587
588 /**
589 Clears a feature for the specified root hub port.
590
591 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
592 @param PortNumber Specifies the root hub port whose feature is
593 requested to be cleared.
594 @param PortFeature Indicates the feature selector associated with the
595 feature clear request.
596
597 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
598 for the USB root hub port specified by PortNumber.
599 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
600 @retval EFI_DEVICE_ERROR Can't read register.
601
602 **/
603 EFI_STATUS
604 EFIAPI
605 XhcClearRootHubPortFeature (
606 IN EFI_USB2_HC_PROTOCOL *This,
607 IN UINT8 PortNumber,
608 IN EFI_USB_PORT_FEATURE PortFeature
609 )
610 {
611 USB_XHCI_INSTANCE *Xhc;
612 UINT32 Offset;
613 UINT32 State;
614 UINT32 TotalPort;
615 EFI_STATUS Status;
616 EFI_TPL OldTpl;
617
618 OldTpl = gBS->RaiseTPL (XHC_TPL);
619
620 Xhc = XHC_FROM_THIS (This);
621 Status = EFI_SUCCESS;
622
623 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
624
625 if (PortNumber >= TotalPort) {
626 Status = EFI_INVALID_PARAMETER;
627 goto ON_EXIT;
628 }
629
630 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
631
632 //
633 // Mask off the port status change bits, these bits are
634 // write clean bit
635 //
636 State = XhcReadOpReg (Xhc, Offset);
637 State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
638
639 switch (PortFeature) {
640 case EfiUsbPortEnable:
641 //
642 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
643 // A port may be disabled by software writing a '1' to this flag.
644 //
645 State |= XHC_PORTSC_PED;
646 State &= ~XHC_PORTSC_RESET;
647 XhcWriteOpReg (Xhc, Offset, State);
648 break;
649
650 case EfiUsbPortSuspend:
651 State |= XHC_PORTSC_LWS;
652 XhcWriteOpReg (Xhc, Offset, State);
653 State &= ~XHC_PORTSC_PLS;
654 XhcWriteOpReg (Xhc, Offset, State);
655 break;
656
657 case EfiUsbPortReset:
658 //
659 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
660 // Register bits indicate status when read, a clear bit may be set by
661 // writing a '1'. Writing a '0' to RW1S bits has no effect.
662 //
663 break;
664
665 case EfiUsbPortOwner:
666 //
667 // XHCI root hub port don't has the owner bit, ignore the operation
668 //
669 break;
670
671 case EfiUsbPortConnectChange:
672 //
673 // Clear connect status change
674 //
675 State |= XHC_PORTSC_CSC;
676 XhcWriteOpReg (Xhc, Offset, State);
677 break;
678
679 case EfiUsbPortEnableChange:
680 //
681 // Clear enable status change
682 //
683 State |= XHC_PORTSC_PEC;
684 XhcWriteOpReg (Xhc, Offset, State);
685 break;
686
687 case EfiUsbPortOverCurrentChange:
688 //
689 // Clear PortOverCurrent change
690 //
691 State |= XHC_PORTSC_OCC;
692 XhcWriteOpReg (Xhc, Offset, State);
693 break;
694
695 case EfiUsbPortResetChange:
696 //
697 // Clear Port Reset change
698 //
699 State |= XHC_PORTSC_PRC;
700 XhcWriteOpReg (Xhc, Offset, State);
701 break;
702
703 case EfiUsbPortPower:
704 case EfiUsbPortSuspendChange:
705 //
706 // Not supported or not related operation
707 //
708 break;
709
710 default:
711 Status = EFI_INVALID_PARAMETER;
712 break;
713 }
714
715 ON_EXIT:
716 DEBUG ((DEBUG_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
717 gBS->RestoreTPL (OldTpl);
718
719 return Status;
720 }
721
722 /**
723 Submits a new transaction to a target USB device.
724
725 @param Xhc The XHCI Instance.
726 @param DeviceAddress The target device address.
727 @param EndPointAddress Endpoint number and its direction encoded in bit 7
728 @param DeviceSpeed Target device speed.
729 @param MaximumPacketLength Maximum packet size the default control transfer
730 endpoint is capable of sending or receiving.
731 @param Type The transaction type.
732 @param Request USB device request to send.
733 @param Data Data buffer to be transmitted or received from USB
734 device.
735 @param DataLength The size (in bytes) of the data buffer.
736 @param Timeout Indicates the maximum timeout, in millisecond.
737 @param TransferResult Return the result of this control transfer.
738
739 @retval EFI_SUCCESS Transfer was completed successfully.
740 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
741 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
742 @retval EFI_TIMEOUT Transfer failed due to timeout.
743 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
744 **/
745 EFI_STATUS
746 XhcTransfer (
747 IN USB_XHCI_INSTANCE *Xhc,
748 IN UINT8 DeviceAddress,
749 IN UINT8 EndPointAddress,
750 IN UINT8 DeviceSpeed,
751 IN UINTN MaximumPacketLength,
752 IN UINTN Type,
753 IN EFI_USB_DEVICE_REQUEST *Request,
754 IN OUT VOID *Data,
755 IN OUT UINTN *DataLength,
756 IN UINTN Timeout,
757 OUT UINT32 *TransferResult
758 )
759 {
760 EFI_STATUS Status;
761 EFI_STATUS RecoveryStatus;
762 URB *Urb;
763
764 ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
765 Urb = XhcCreateUrb (
766 Xhc,
767 DeviceAddress,
768 EndPointAddress,
769 DeviceSpeed,
770 MaximumPacketLength,
771 Type,
772 Request,
773 Data,
774 *DataLength,
775 NULL,
776 NULL
777 );
778
779 if (Urb == NULL) {
780 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
781 return EFI_OUT_OF_RESOURCES;
782 }
783
784 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
785
786 if (Status == EFI_TIMEOUT) {
787 //
788 // The transfer timed out. Abort the transfer by dequeueing of the TD.
789 //
790 RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
791 if (RecoveryStatus == EFI_ALREADY_STARTED) {
792 //
793 // The URB is finished just before stopping endpoint.
794 // Change returning status from EFI_TIMEOUT to EFI_SUCCESS.
795 //
796 ASSERT (Urb->Result == EFI_USB_NOERROR);
797 Status = EFI_SUCCESS;
798 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
799 } else if (EFI_ERROR (RecoveryStatus)) {
800 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
801 }
802 }
803
804 *TransferResult = Urb->Result;
805 *DataLength = Urb->Completed;
806
807 if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
808 ASSERT (Status == EFI_DEVICE_ERROR);
809 RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
810 if (EFI_ERROR (RecoveryStatus)) {
811 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
812 }
813 }
814
815 Xhc->PciIo->Flush (Xhc->PciIo);
816 XhcFreeUrb (Xhc, Urb);
817 return Status;
818 }
819
820 /**
821 Submits control transfer to a target USB device.
822
823 @param This This EFI_USB2_HC_PROTOCOL instance.
824 @param DeviceAddress The target device address.
825 @param DeviceSpeed Target device speed.
826 @param MaximumPacketLength Maximum packet size the default control transfer
827 endpoint is capable of sending or receiving.
828 @param Request USB device request to send.
829 @param TransferDirection Specifies the data direction for the data stage
830 @param Data Data buffer to be transmitted or received from USB
831 device.
832 @param DataLength The size (in bytes) of the data buffer.
833 @param Timeout Indicates the maximum timeout, in millisecond.
834 @param Translator Transaction translator to be used by this device.
835 @param TransferResult Return the result of this control transfer.
836
837 @retval EFI_SUCCESS Transfer was completed successfully.
838 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
839 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
840 @retval EFI_TIMEOUT Transfer failed due to timeout.
841 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
842
843 **/
844 EFI_STATUS
845 EFIAPI
846 XhcControlTransfer (
847 IN EFI_USB2_HC_PROTOCOL *This,
848 IN UINT8 DeviceAddress,
849 IN UINT8 DeviceSpeed,
850 IN UINTN MaximumPacketLength,
851 IN EFI_USB_DEVICE_REQUEST *Request,
852 IN EFI_USB_DATA_DIRECTION TransferDirection,
853 IN OUT VOID *Data,
854 IN OUT UINTN *DataLength,
855 IN UINTN Timeout,
856 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
857 OUT UINT32 *TransferResult
858 )
859 {
860 USB_XHCI_INSTANCE *Xhc;
861 UINT8 Endpoint;
862 UINT8 Index;
863 UINT8 DescriptorType;
864 UINT8 SlotId;
865 UINT8 TTT;
866 UINT8 MTT;
867 UINT32 MaxPacket0;
868 EFI_USB_HUB_DESCRIPTOR *HubDesc;
869 EFI_TPL OldTpl;
870 EFI_STATUS Status;
871 UINTN MapSize;
872 EFI_USB_PORT_STATUS PortStatus;
873 UINT32 State;
874 EFI_USB_DEVICE_REQUEST ClearPortRequest;
875 UINTN Len;
876
877 //
878 // Validate parameters
879 //
880 if ((Request == NULL) || (TransferResult == NULL)) {
881 return EFI_INVALID_PARAMETER;
882 }
883
884 if ((TransferDirection != EfiUsbDataIn) &&
885 (TransferDirection != EfiUsbDataOut) &&
886 (TransferDirection != EfiUsbNoData))
887 {
888 return EFI_INVALID_PARAMETER;
889 }
890
891 if ((TransferDirection == EfiUsbNoData) &&
892 ((Data != NULL) || (*DataLength != 0)))
893 {
894 return EFI_INVALID_PARAMETER;
895 }
896
897 if ((TransferDirection != EfiUsbNoData) &&
898 ((Data == NULL) || (*DataLength == 0)))
899 {
900 return EFI_INVALID_PARAMETER;
901 }
902
903 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
904 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
905 (MaximumPacketLength != 512)
906 )
907 {
908 return EFI_INVALID_PARAMETER;
909 }
910
911 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
912 return EFI_INVALID_PARAMETER;
913 }
914
915 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
916 return EFI_INVALID_PARAMETER;
917 }
918
919 OldTpl = gBS->RaiseTPL (XHC_TPL);
920
921 Xhc = XHC_FROM_THIS (This);
922
923 Status = EFI_DEVICE_ERROR;
924 *TransferResult = EFI_USB_ERR_SYSTEM;
925 Len = 0;
926
927 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
928 DEBUG ((DEBUG_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
929 goto ON_EXIT;
930 }
931
932 //
933 // Check if the device is still enabled before every transaction.
934 //
935 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
936 if (SlotId == 0) {
937 goto ON_EXIT;
938 }
939
940 //
941 // Hook the Set_Address request from UsbBus.
942 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
943 //
944 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
945 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
946 {
947 //
948 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
949 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
950 //
951 for (Index = 0; Index < 255; Index++) {
952 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
953 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
954 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value))
955 {
956 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
957 }
958 }
959
960 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
961 Status = EFI_DEVICE_ERROR;
962 goto ON_EXIT;
963 }
964
965 //
966 // The actual device address has been assigned by XHCI during initializing the device slot.
967 // So we just need establish the mapping relationship between the device address requested from UsbBus
968 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
969 // can find out the actual device address by it.
970 //
971 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
972 Status = EFI_SUCCESS;
973 goto ON_EXIT;
974 }
975
976 //
977 // Create a new URB, insert it into the asynchronous
978 // schedule list, then poll the execution status.
979 // Note that we encode the direction in address although default control
980 // endpoint is bidirectional. XhcCreateUrb expects this
981 // combination of Ep addr and its direction.
982 //
983 Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
984 Status = XhcTransfer (
985 Xhc,
986 DeviceAddress,
987 Endpoint,
988 DeviceSpeed,
989 MaximumPacketLength,
990 XHC_CTRL_TRANSFER,
991 Request,
992 Data,
993 DataLength,
994 Timeout,
995 TransferResult
996 );
997
998 if (EFI_ERROR (Status)) {
999 goto ON_EXIT;
1000 }
1001
1002 //
1003 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
1004 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
1005 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1006 //
1007 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
1008 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
1009 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE)))))
1010 {
1011 DescriptorType = (UINT8)(Request->Value >> 8);
1012 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
1013 ASSERT (Data != NULL);
1014 //
1015 // Store a copy of device scriptor as hub device need this info to configure endpoint.
1016 //
1017 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
1018 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
1019 //
1020 // If it's a usb3.0 device, then its max packet size is a 2^n.
1021 //
1022 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1023 } else {
1024 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1025 }
1026
1027 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
1028 if (Xhc->HcCParams.Data.Csz == 0) {
1029 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
1030 } else {
1031 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
1032 }
1033 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
1034 ASSERT (Data != NULL);
1035 if (*DataLength == ((UINT16 *)Data)[1]) {
1036 //
1037 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
1038 //
1039 Index = (UINT8)Request->Value;
1040 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
1041 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool (*DataLength);
1042 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
1043 //
1044 // Default to use AlternateSetting 0 for all interfaces.
1045 //
1046 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
1047 }
1048 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
1049 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2))
1050 {
1051 ASSERT (Data != NULL);
1052 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
1053 ASSERT (HubDesc->NumPorts <= 15);
1054 //
1055 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
1056 //
1057 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
1058 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
1059 //
1060 // Don't support multi-TT feature for super speed hub now.
1061 //
1062 MTT = 0;
1063 DEBUG ((DEBUG_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
1064 } else {
1065 MTT = 0;
1066 }
1067
1068 if (Xhc->HcCParams.Data.Csz == 0) {
1069 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1070 } else {
1071 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1072 }
1073 }
1074 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1075 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
1076 {
1077 //
1078 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1079 //
1080 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1081 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1082 if (Xhc->HcCParams.Data.Csz == 0) {
1083 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1084 } else {
1085 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1086 }
1087
1088 break;
1089 }
1090 }
1091 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1092 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE)))
1093 {
1094 //
1095 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1096 // Request->Value indicates AlterlateSetting to set
1097 // Request->Index indicates Interface to set
1098 //
1099 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8)Request->Index] != (UINT8)Request->Value) {
1100 if (Xhc->HcCParams.Data.Csz == 0) {
1101 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1102 } else {
1103 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1104 }
1105 }
1106 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1107 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)))
1108 {
1109 ASSERT (Data != NULL);
1110 //
1111 // Hook Get_Status request from UsbBus to keep track of the port status change.
1112 //
1113 State = *(UINT32 *)Data;
1114 PortStatus.PortStatus = 0;
1115 PortStatus.PortChangeStatus = 0;
1116
1117 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1118 //
1119 // For super speed hub, its bit10~12 presents the attached device speed.
1120 //
1121 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1122 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1123 }
1124 } else {
1125 //
1126 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1127 //
1128 if (XHC_BIT_IS_SET (State, BIT9)) {
1129 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1130 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1131 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1132 }
1133 }
1134
1135 //
1136 // Convert the XHCI port/port change state to UEFI status
1137 //
1138 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1139 for (Index = 0; Index < MapSize; Index++) {
1140 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1141 PortStatus.PortStatus = (UINT16)(PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1142 }
1143 }
1144
1145 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1146 for (Index = 0; Index < MapSize; Index++) {
1147 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1148 PortStatus.PortChangeStatus = (UINT16)(PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1149 }
1150 }
1151
1152 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1153
1154 for (Index = 0; Index < MapSize; Index++) {
1155 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1156 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1157 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1158 ClearPortRequest.Request = (UINT8)USB_REQ_CLEAR_FEATURE;
1159 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1160 ClearPortRequest.Index = Request->Index;
1161 ClearPortRequest.Length = 0;
1162
1163 XhcControlTransfer (
1164 This,
1165 DeviceAddress,
1166 DeviceSpeed,
1167 MaximumPacketLength,
1168 &ClearPortRequest,
1169 EfiUsbNoData,
1170 NULL,
1171 &Len,
1172 Timeout,
1173 Translator,
1174 TransferResult
1175 );
1176 }
1177 }
1178
1179 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1180
1181 *(UINT32 *)Data = *(UINT32 *)&PortStatus;
1182 }
1183
1184 ON_EXIT:
1185 if (EFI_ERROR (Status)) {
1186 DEBUG ((DEBUG_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1187 }
1188
1189 gBS->RestoreTPL (OldTpl);
1190
1191 return Status;
1192 }
1193
1194 /**
1195 Submits bulk transfer to a bulk endpoint of a USB device.
1196
1197 @param This This EFI_USB2_HC_PROTOCOL instance.
1198 @param DeviceAddress Target device address.
1199 @param EndPointAddress Endpoint number and its direction in bit 7.
1200 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1201 transfer.
1202 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1203 sending or receiving.
1204 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1205 @param Data Array of pointers to the buffers of data to transmit
1206 from or receive into.
1207 @param DataLength The lenght of the data buffer.
1208 @param DataToggle On input, the initial data toggle for the transfer;
1209 On output, it is updated to to next data toggle to
1210 use of the subsequent bulk transfer.
1211 @param Timeout Indicates the maximum time, in millisecond, which
1212 the transfer is allowed to complete.
1213 @param Translator A pointr to the transaction translator data.
1214 @param TransferResult A pointer to the detailed result information of the
1215 bulk transfer.
1216
1217 @retval EFI_SUCCESS The transfer was completed successfully.
1218 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1219 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1220 @retval EFI_TIMEOUT The transfer failed due to timeout.
1221 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1222
1223 **/
1224 EFI_STATUS
1225 EFIAPI
1226 XhcBulkTransfer (
1227 IN EFI_USB2_HC_PROTOCOL *This,
1228 IN UINT8 DeviceAddress,
1229 IN UINT8 EndPointAddress,
1230 IN UINT8 DeviceSpeed,
1231 IN UINTN MaximumPacketLength,
1232 IN UINT8 DataBuffersNumber,
1233 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1234 IN OUT UINTN *DataLength,
1235 IN OUT UINT8 *DataToggle,
1236 IN UINTN Timeout,
1237 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1238 OUT UINT32 *TransferResult
1239 )
1240 {
1241 USB_XHCI_INSTANCE *Xhc;
1242 UINT8 SlotId;
1243 EFI_STATUS Status;
1244 EFI_TPL OldTpl;
1245 UINTN DebugErrorLevel;
1246
1247 //
1248 // Validate the parameters
1249 //
1250 if ((DataLength == NULL) || (*DataLength == 0) ||
1251 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
1252 {
1253 return EFI_INVALID_PARAMETER;
1254 }
1255
1256 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1257 return EFI_INVALID_PARAMETER;
1258 }
1259
1260 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1261 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1262 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1263 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024)))
1264 {
1265 return EFI_INVALID_PARAMETER;
1266 }
1267
1268 OldTpl = gBS->RaiseTPL (XHC_TPL);
1269
1270 Xhc = XHC_FROM_THIS (This);
1271
1272 *TransferResult = EFI_USB_ERR_SYSTEM;
1273 Status = EFI_DEVICE_ERROR;
1274
1275 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1276 DEBUG ((DEBUG_ERROR, "XhcBulkTransfer: HC is halted\n"));
1277 goto ON_EXIT;
1278 }
1279
1280 //
1281 // Check if the device is still enabled before every transaction.
1282 //
1283 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1284 if (SlotId == 0) {
1285 goto ON_EXIT;
1286 }
1287
1288 //
1289 // Create a new URB, insert it into the asynchronous
1290 // schedule list, then poll the execution status.
1291 //
1292 Status = XhcTransfer (
1293 Xhc,
1294 DeviceAddress,
1295 EndPointAddress,
1296 DeviceSpeed,
1297 MaximumPacketLength,
1298 XHC_BULK_TRANSFER,
1299 NULL,
1300 Data[0],
1301 DataLength,
1302 Timeout,
1303 TransferResult
1304 );
1305
1306 ON_EXIT:
1307 if (EFI_ERROR (Status)) {
1308 if (Status == EFI_TIMEOUT) {
1309 DebugErrorLevel = DEBUG_VERBOSE;
1310 } else {
1311 DebugErrorLevel = DEBUG_ERROR;
1312 }
1313
1314 DEBUG ((DebugErrorLevel, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1315 }
1316
1317 gBS->RestoreTPL (OldTpl);
1318
1319 return Status;
1320 }
1321
1322 /**
1323 Submits an asynchronous interrupt transfer to an
1324 interrupt endpoint of a USB device.
1325
1326 @param This This EFI_USB2_HC_PROTOCOL instance.
1327 @param DeviceAddress Target device address.
1328 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1329 @param DeviceSpeed Indicates device speed.
1330 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1331 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1332 transfer If FALSE, to remove the specified
1333 asynchronous interrupt.
1334 @param DataToggle On input, the initial data toggle to use; on output,
1335 it is updated to indicate the next data toggle.
1336 @param PollingInterval The he interval, in milliseconds, that the transfer
1337 is polled.
1338 @param DataLength The length of data to receive at the rate specified
1339 by PollingInterval.
1340 @param Translator Transaction translator to use.
1341 @param CallBackFunction Function to call at the rate specified by
1342 PollingInterval.
1343 @param Context Context to CallBackFunction.
1344
1345 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1346 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1347 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1348 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1349
1350 **/
1351 EFI_STATUS
1352 EFIAPI
1353 XhcAsyncInterruptTransfer (
1354 IN EFI_USB2_HC_PROTOCOL *This,
1355 IN UINT8 DeviceAddress,
1356 IN UINT8 EndPointAddress,
1357 IN UINT8 DeviceSpeed,
1358 IN UINTN MaximumPacketLength,
1359 IN BOOLEAN IsNewTransfer,
1360 IN OUT UINT8 *DataToggle,
1361 IN UINTN PollingInterval,
1362 IN UINTN DataLength,
1363 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1364 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1365 IN VOID *Context OPTIONAL
1366 )
1367 {
1368 USB_XHCI_INSTANCE *Xhc;
1369 URB *Urb;
1370 EFI_STATUS Status;
1371 UINT8 SlotId;
1372 UINT8 Index;
1373 EFI_TPL OldTpl;
1374
1375 //
1376 // Validate parameters
1377 //
1378 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1379 return EFI_INVALID_PARAMETER;
1380 }
1381
1382 if (IsNewTransfer) {
1383 if (DataLength == 0) {
1384 return EFI_INVALID_PARAMETER;
1385 }
1386
1387 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1388 return EFI_INVALID_PARAMETER;
1389 }
1390
1391 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1392 return EFI_INVALID_PARAMETER;
1393 }
1394 }
1395
1396 OldTpl = gBS->RaiseTPL (XHC_TPL);
1397
1398 Xhc = XHC_FROM_THIS (This);
1399
1400 //
1401 // Delete Async interrupt transfer request.
1402 //
1403 if (!IsNewTransfer) {
1404 //
1405 // The delete request may happen after device is detached.
1406 //
1407 for (Index = 0; Index < 255; Index++) {
1408 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1409 break;
1410 }
1411 }
1412
1413 if (Index == 255) {
1414 Status = EFI_INVALID_PARAMETER;
1415 goto ON_EXIT;
1416 }
1417
1418 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1419 DEBUG ((DEBUG_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1420 goto ON_EXIT;
1421 }
1422
1423 Status = EFI_SUCCESS;
1424
1425 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1426 DEBUG ((DEBUG_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1427 Status = EFI_DEVICE_ERROR;
1428 goto ON_EXIT;
1429 }
1430
1431 //
1432 // Check if the device is still enabled before every transaction.
1433 //
1434 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1435 if (SlotId == 0) {
1436 goto ON_EXIT;
1437 }
1438
1439 Urb = XhciInsertAsyncIntTransfer (
1440 Xhc,
1441 DeviceAddress,
1442 EndPointAddress,
1443 DeviceSpeed,
1444 MaximumPacketLength,
1445 DataLength,
1446 CallBackFunction,
1447 Context
1448 );
1449 if (Urb == NULL) {
1450 Status = EFI_OUT_OF_RESOURCES;
1451 goto ON_EXIT;
1452 }
1453
1454 //
1455 // Ring the doorbell
1456 //
1457 Status = RingIntTransferDoorBell (Xhc, Urb);
1458
1459 ON_EXIT:
1460 Xhc->PciIo->Flush (Xhc->PciIo);
1461 gBS->RestoreTPL (OldTpl);
1462
1463 return Status;
1464 }
1465
1466 /**
1467 Submits synchronous interrupt transfer to an interrupt endpoint
1468 of a USB device.
1469
1470 @param This This EFI_USB2_HC_PROTOCOL instance.
1471 @param DeviceAddress Target device address.
1472 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1473 @param DeviceSpeed Indicates device speed.
1474 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1475 of sending or receiving.
1476 @param Data Buffer of data that will be transmitted to USB
1477 device or received from USB device.
1478 @param DataLength On input, the size, in bytes, of the data buffer; On
1479 output, the number of bytes transferred.
1480 @param DataToggle On input, the initial data toggle to use; on output,
1481 it is updated to indicate the next data toggle.
1482 @param Timeout Maximum time, in second, to complete.
1483 @param Translator Transaction translator to use.
1484 @param TransferResult Variable to receive the transfer result.
1485
1486 @return EFI_SUCCESS The transfer was completed successfully.
1487 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1488 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1489 @return EFI_TIMEOUT The transfer failed due to timeout.
1490 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1491
1492 **/
1493 EFI_STATUS
1494 EFIAPI
1495 XhcSyncInterruptTransfer (
1496 IN EFI_USB2_HC_PROTOCOL *This,
1497 IN UINT8 DeviceAddress,
1498 IN UINT8 EndPointAddress,
1499 IN UINT8 DeviceSpeed,
1500 IN UINTN MaximumPacketLength,
1501 IN OUT VOID *Data,
1502 IN OUT UINTN *DataLength,
1503 IN OUT UINT8 *DataToggle,
1504 IN UINTN Timeout,
1505 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1506 OUT UINT32 *TransferResult
1507 )
1508 {
1509 USB_XHCI_INSTANCE *Xhc;
1510 UINT8 SlotId;
1511 EFI_STATUS Status;
1512 EFI_TPL OldTpl;
1513
1514 //
1515 // Validates parameters
1516 //
1517 if ((DataLength == NULL) || (*DataLength == 0) ||
1518 (Data == NULL) || (TransferResult == NULL))
1519 {
1520 return EFI_INVALID_PARAMETER;
1521 }
1522
1523 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1524 return EFI_INVALID_PARAMETER;
1525 }
1526
1527 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1528 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1529 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072)))
1530 {
1531 return EFI_INVALID_PARAMETER;
1532 }
1533
1534 OldTpl = gBS->RaiseTPL (XHC_TPL);
1535
1536 Xhc = XHC_FROM_THIS (This);
1537
1538 *TransferResult = EFI_USB_ERR_SYSTEM;
1539 Status = EFI_DEVICE_ERROR;
1540
1541 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1542 DEBUG ((DEBUG_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1543 goto ON_EXIT;
1544 }
1545
1546 //
1547 // Check if the device is still enabled before every transaction.
1548 //
1549 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1550 if (SlotId == 0) {
1551 goto ON_EXIT;
1552 }
1553
1554 Status = XhcTransfer (
1555 Xhc,
1556 DeviceAddress,
1557 EndPointAddress,
1558 DeviceSpeed,
1559 MaximumPacketLength,
1560 XHC_INT_TRANSFER_SYNC,
1561 NULL,
1562 Data,
1563 DataLength,
1564 Timeout,
1565 TransferResult
1566 );
1567
1568 ON_EXIT:
1569 if (EFI_ERROR (Status)) {
1570 DEBUG ((DEBUG_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1571 }
1572
1573 gBS->RestoreTPL (OldTpl);
1574
1575 return Status;
1576 }
1577
1578 /**
1579 Submits isochronous transfer to a target USB device.
1580
1581 @param This This EFI_USB2_HC_PROTOCOL instance.
1582 @param DeviceAddress Target device address.
1583 @param EndPointAddress End point address with its direction.
1584 @param DeviceSpeed Device speed, Low speed device doesn't support this
1585 type.
1586 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1587 sending or receiving.
1588 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1589 @param Data Array of pointers to the buffers of data that will
1590 be transmitted to USB device or received from USB
1591 device.
1592 @param DataLength The size, in bytes, of the data buffer.
1593 @param Translator Transaction translator to use.
1594 @param TransferResult Variable to receive the transfer result.
1595
1596 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1597
1598 **/
1599 EFI_STATUS
1600 EFIAPI
1601 XhcIsochronousTransfer (
1602 IN EFI_USB2_HC_PROTOCOL *This,
1603 IN UINT8 DeviceAddress,
1604 IN UINT8 EndPointAddress,
1605 IN UINT8 DeviceSpeed,
1606 IN UINTN MaximumPacketLength,
1607 IN UINT8 DataBuffersNumber,
1608 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1609 IN UINTN DataLength,
1610 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1611 OUT UINT32 *TransferResult
1612 )
1613 {
1614 return EFI_UNSUPPORTED;
1615 }
1616
1617 /**
1618 Submits Async isochronous transfer to a target USB device.
1619
1620 @param This This EFI_USB2_HC_PROTOCOL instance.
1621 @param DeviceAddress Target device address.
1622 @param EndPointAddress End point address with its direction.
1623 @param DeviceSpeed Device speed, Low speed device doesn't support this
1624 type.
1625 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1626 sending or receiving.
1627 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1628 @param Data Array of pointers to the buffers of data that will
1629 be transmitted to USB device or received from USB
1630 device.
1631 @param DataLength The size, in bytes, of the data buffer.
1632 @param Translator Transaction translator to use.
1633 @param IsochronousCallBack Function to be called when the transfer complete.
1634 @param Context Context passed to the call back function as
1635 parameter.
1636
1637 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1638
1639 **/
1640 EFI_STATUS
1641 EFIAPI
1642 XhcAsyncIsochronousTransfer (
1643 IN EFI_USB2_HC_PROTOCOL *This,
1644 IN UINT8 DeviceAddress,
1645 IN UINT8 EndPointAddress,
1646 IN UINT8 DeviceSpeed,
1647 IN UINTN MaximumPacketLength,
1648 IN UINT8 DataBuffersNumber,
1649 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1650 IN UINTN DataLength,
1651 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1652 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1653 IN VOID *Context
1654 )
1655 {
1656 return EFI_UNSUPPORTED;
1657 }
1658
1659 /**
1660 Entry point for EFI drivers.
1661
1662 @param ImageHandle EFI_HANDLE.
1663 @param SystemTable EFI_SYSTEM_TABLE.
1664
1665 @retval EFI_SUCCESS Success.
1666 @retval Others Fail.
1667
1668 **/
1669 EFI_STATUS
1670 EFIAPI
1671 XhcDriverEntryPoint (
1672 IN EFI_HANDLE ImageHandle,
1673 IN EFI_SYSTEM_TABLE *SystemTable
1674 )
1675 {
1676 return EfiLibInstallDriverBindingComponentName2 (
1677 ImageHandle,
1678 SystemTable,
1679 &gXhciDriverBinding,
1680 ImageHandle,
1681 &gXhciComponentName,
1682 &gXhciComponentName2
1683 );
1684 }
1685
1686 /**
1687 Test to see if this driver supports ControllerHandle. Any
1688 ControllerHandle that has Usb2HcProtocol installed will
1689 be supported.
1690
1691 @param This Protocol instance pointer.
1692 @param Controller Handle of device to test.
1693 @param RemainingDevicePath Not used.
1694
1695 @return EFI_SUCCESS This driver supports this device.
1696 @return EFI_UNSUPPORTED This driver does not support this device.
1697
1698 **/
1699 EFI_STATUS
1700 EFIAPI
1701 XhcDriverBindingSupported (
1702 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1703 IN EFI_HANDLE Controller,
1704 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1705 )
1706 {
1707 EFI_STATUS Status;
1708 EFI_PCI_IO_PROTOCOL *PciIo;
1709 USB_CLASSC UsbClassCReg;
1710
1711 //
1712 // Test whether there is PCI IO Protocol attached on the controller handle.
1713 //
1714 Status = gBS->OpenProtocol (
1715 Controller,
1716 &gEfiPciIoProtocolGuid,
1717 (VOID **)&PciIo,
1718 This->DriverBindingHandle,
1719 Controller,
1720 EFI_OPEN_PROTOCOL_BY_DRIVER
1721 );
1722
1723 if (EFI_ERROR (Status)) {
1724 return EFI_UNSUPPORTED;
1725 }
1726
1727 Status = PciIo->Pci.Read (
1728 PciIo,
1729 EfiPciIoWidthUint8,
1730 PCI_CLASSCODE_OFFSET,
1731 sizeof (USB_CLASSC) / sizeof (UINT8),
1732 &UsbClassCReg
1733 );
1734
1735 if (EFI_ERROR (Status)) {
1736 Status = EFI_UNSUPPORTED;
1737 goto ON_EXIT;
1738 }
1739
1740 //
1741 // Test whether the controller belongs to Xhci type
1742 //
1743 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1744 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1745 (UsbClassCReg.ProgInterface != PCI_IF_XHCI))
1746 {
1747 Status = EFI_UNSUPPORTED;
1748 }
1749
1750 ON_EXIT:
1751 gBS->CloseProtocol (
1752 Controller,
1753 &gEfiPciIoProtocolGuid,
1754 This->DriverBindingHandle,
1755 Controller
1756 );
1757
1758 return Status;
1759 }
1760
1761 /**
1762 Create and initialize a USB_XHCI_INSTANCE structure.
1763
1764 @param PciIo The PciIo on this device.
1765 @param DevicePath The device path of host controller.
1766 @param OriginalPciAttributes Original PCI attributes.
1767
1768 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1769 otherwise NULL.
1770
1771 **/
1772 USB_XHCI_INSTANCE *
1773 XhcCreateUsbHc (
1774 IN EFI_PCI_IO_PROTOCOL *PciIo,
1775 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1776 IN UINT64 OriginalPciAttributes
1777 )
1778 {
1779 USB_XHCI_INSTANCE *Xhc;
1780 EFI_STATUS Status;
1781 UINT32 PageSize;
1782 UINT16 ExtCapReg;
1783 UINT8 ReleaseNumber;
1784
1785 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1786
1787 if (Xhc == NULL) {
1788 return NULL;
1789 }
1790
1791 //
1792 // Initialize private data structure
1793 //
1794 Xhc->Signature = XHCI_INSTANCE_SIG;
1795 Xhc->PciIo = PciIo;
1796 Xhc->DevicePath = DevicePath;
1797 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1798 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1799
1800 Status = PciIo->Pci.Read (
1801 PciIo,
1802 EfiPciIoWidthUint8,
1803 XHC_PCI_SBRN_OFFSET,
1804 1,
1805 &ReleaseNumber
1806 );
1807
1808 if (!EFI_ERROR (Status)) {
1809 Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4;
1810 Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F);
1811 }
1812
1813 InitializeListHead (&Xhc->AsyncIntTransfers);
1814
1815 //
1816 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1817 //
1818 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1819 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1820 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1821 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1822 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1823 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1824
1825 //
1826 // This PageSize field defines the page size supported by the xHC implementation.
1827 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1828 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1829 //
1830 PageSize = XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET);
1831 if ((PageSize & (~XHC_PAGESIZE_MASK)) != 0) {
1832 DEBUG ((DEBUG_ERROR, "XhcCreateUsb3Hc: Reserved bits are not 0 for PageSize\n"));
1833 goto ON_ERROR;
1834 }
1835
1836 PageSize &= XHC_PAGESIZE_MASK;
1837 Xhc->PageSize = 1 << (HighBitSet32 (PageSize) + 12);
1838
1839 ExtCapReg = (UINT16)(Xhc->HcCParams.Data.ExtCapReg);
1840 Xhc->ExtCapRegBase = ExtCapReg << 2;
1841 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1842 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1843 Xhc->Usb2SupOffset = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2);
1844 Xhc->Usb3SupOffset = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3);
1845
1846 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1847 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1848 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1849 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1850 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1851 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1852 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1853 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1854 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb2SupOffset 0x%x\n", Xhc->Usb2SupOffset));
1855 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb3SupOffset 0x%x\n", Xhc->Usb3SupOffset));
1856
1857 //
1858 // Create AsyncRequest Polling Timer
1859 //
1860 Status = gBS->CreateEvent (
1861 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1862 TPL_NOTIFY,
1863 XhcMonitorAsyncRequests,
1864 Xhc,
1865 &Xhc->PollTimer
1866 );
1867
1868 if (EFI_ERROR (Status)) {
1869 goto ON_ERROR;
1870 }
1871
1872 return Xhc;
1873
1874 ON_ERROR:
1875 FreePool (Xhc);
1876 return NULL;
1877 }
1878
1879 /**
1880 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1881
1882 @param Event Pointer to this event
1883 @param Context Event handler private data
1884
1885 **/
1886 VOID
1887 EFIAPI
1888 XhcExitBootService (
1889 EFI_EVENT Event,
1890 VOID *Context
1891 )
1892
1893 {
1894 USB_XHCI_INSTANCE *Xhc;
1895 EFI_PCI_IO_PROTOCOL *PciIo;
1896
1897 Xhc = (USB_XHCI_INSTANCE *)Context;
1898 PciIo = Xhc->PciIo;
1899
1900 //
1901 // Stop AsyncRequest Polling timer then stop the XHCI driver
1902 // and uninstall the XHCI protocl.
1903 //
1904 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1905 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1906
1907 if (Xhc->PollTimer != NULL) {
1908 gBS->CloseEvent (Xhc->PollTimer);
1909 }
1910
1911 XhcClearBiosOwnership (Xhc);
1912
1913 //
1914 // Restore original PCI attributes
1915 //
1916 PciIo->Attributes (
1917 PciIo,
1918 EfiPciIoAttributeOperationSet,
1919 Xhc->OriginalPciAttributes,
1920 NULL
1921 );
1922 }
1923
1924 /**
1925 Starting the Usb XHCI Driver.
1926
1927 @param This Protocol instance pointer.
1928 @param Controller Handle of device to test.
1929 @param RemainingDevicePath Not used.
1930
1931 @return EFI_SUCCESS supports this device.
1932 @return EFI_UNSUPPORTED do not support this device.
1933 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1934 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1935
1936 **/
1937 EFI_STATUS
1938 EFIAPI
1939 XhcDriverBindingStart (
1940 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1941 IN EFI_HANDLE Controller,
1942 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1943 )
1944 {
1945 EFI_STATUS Status;
1946 EFI_PCI_IO_PROTOCOL *PciIo;
1947 UINT64 Supports;
1948 UINT64 OriginalPciAttributes;
1949 BOOLEAN PciAttributesSaved;
1950 USB_XHCI_INSTANCE *Xhc;
1951 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1952
1953 //
1954 // Open the PciIo Protocol, then enable the USB host controller
1955 //
1956 Status = gBS->OpenProtocol (
1957 Controller,
1958 &gEfiPciIoProtocolGuid,
1959 (VOID **)&PciIo,
1960 This->DriverBindingHandle,
1961 Controller,
1962 EFI_OPEN_PROTOCOL_BY_DRIVER
1963 );
1964
1965 if (EFI_ERROR (Status)) {
1966 return Status;
1967 }
1968
1969 //
1970 // Open Device Path Protocol for on USB host controller
1971 //
1972 HcDevicePath = NULL;
1973 Status = gBS->OpenProtocol (
1974 Controller,
1975 &gEfiDevicePathProtocolGuid,
1976 (VOID **)&HcDevicePath,
1977 This->DriverBindingHandle,
1978 Controller,
1979 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1980 );
1981
1982 PciAttributesSaved = FALSE;
1983 //
1984 // Save original PCI attributes
1985 //
1986 Status = PciIo->Attributes (
1987 PciIo,
1988 EfiPciIoAttributeOperationGet,
1989 0,
1990 &OriginalPciAttributes
1991 );
1992
1993 if (EFI_ERROR (Status)) {
1994 goto CLOSE_PCIIO;
1995 }
1996
1997 PciAttributesSaved = TRUE;
1998
1999 Status = PciIo->Attributes (
2000 PciIo,
2001 EfiPciIoAttributeOperationSupported,
2002 0,
2003 &Supports
2004 );
2005 if (!EFI_ERROR (Status)) {
2006 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
2007 Status = PciIo->Attributes (
2008 PciIo,
2009 EfiPciIoAttributeOperationEnable,
2010 Supports,
2011 NULL
2012 );
2013 }
2014
2015 if (EFI_ERROR (Status)) {
2016 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
2017 goto CLOSE_PCIIO;
2018 }
2019
2020 //
2021 // Create then install USB2_HC_PROTOCOL
2022 //
2023 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
2024
2025 if (Xhc == NULL) {
2026 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
2027 return EFI_OUT_OF_RESOURCES;
2028 }
2029
2030 //
2031 // Enable 64-bit DMA support in the PCI layer if this controller
2032 // supports it.
2033 //
2034 if (Xhc->HcCParams.Data.Ac64 != 0) {
2035 Status = PciIo->Attributes (
2036 PciIo,
2037 EfiPciIoAttributeOperationEnable,
2038 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
2039 NULL
2040 );
2041 if (!EFI_ERROR (Status)) {
2042 Xhc->Support64BitDma = TRUE;
2043 } else {
2044 DEBUG ((
2045 DEBUG_WARN,
2046 "%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
2047 __FUNCTION__,
2048 Controller,
2049 Status
2050 ));
2051 }
2052 }
2053
2054 XhcSetBiosOwnership (Xhc);
2055
2056 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
2057 ASSERT (XhcIsHalt (Xhc));
2058
2059 //
2060 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2061 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2062 //
2063 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2064
2065 //
2066 // Initialize the schedule
2067 //
2068 XhcInitSched (Xhc);
2069
2070 //
2071 // Start the Host Controller
2072 //
2073 XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
2074
2075 //
2076 // Start the asynchronous interrupt monitor
2077 //
2078 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2079 if (EFI_ERROR (Status)) {
2080 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2081 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2082 goto FREE_POOL;
2083 }
2084
2085 //
2086 // Create event to stop the HC when exit boot service.
2087 //
2088 Status = gBS->CreateEventEx (
2089 EVT_NOTIFY_SIGNAL,
2090 TPL_NOTIFY,
2091 XhcExitBootService,
2092 Xhc,
2093 &gEfiEventExitBootServicesGuid,
2094 &Xhc->ExitBootServiceEvent
2095 );
2096 if (EFI_ERROR (Status)) {
2097 goto FREE_POOL;
2098 }
2099
2100 //
2101 // Install the component name protocol, don't fail the start
2102 // because of something for display.
2103 //
2104 AddUnicodeString2 (
2105 "eng",
2106 gXhciComponentName.SupportedLanguages,
2107 &Xhc->ControllerNameTable,
2108 L"eXtensible Host Controller (USB 3.0)",
2109 TRUE
2110 );
2111 AddUnicodeString2 (
2112 "en",
2113 gXhciComponentName2.SupportedLanguages,
2114 &Xhc->ControllerNameTable,
2115 L"eXtensible Host Controller (USB 3.0)",
2116 FALSE
2117 );
2118
2119 Status = gBS->InstallProtocolInterface (
2120 &Controller,
2121 &gEfiUsb2HcProtocolGuid,
2122 EFI_NATIVE_INTERFACE,
2123 &Xhc->Usb2Hc
2124 );
2125 if (EFI_ERROR (Status)) {
2126 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2127 goto FREE_POOL;
2128 }
2129
2130 DEBUG ((DEBUG_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2131 return EFI_SUCCESS;
2132
2133 FREE_POOL:
2134 gBS->CloseEvent (Xhc->PollTimer);
2135 XhcFreeSched (Xhc);
2136 FreePool (Xhc);
2137
2138 CLOSE_PCIIO:
2139 if (PciAttributesSaved) {
2140 //
2141 // Restore original PCI attributes
2142 //
2143 PciIo->Attributes (
2144 PciIo,
2145 EfiPciIoAttributeOperationSet,
2146 OriginalPciAttributes,
2147 NULL
2148 );
2149 }
2150
2151 gBS->CloseProtocol (
2152 Controller,
2153 &gEfiPciIoProtocolGuid,
2154 This->DriverBindingHandle,
2155 Controller
2156 );
2157
2158 return Status;
2159 }
2160
2161 /**
2162 Stop this driver on ControllerHandle. Support stopping any child handles
2163 created by this driver.
2164
2165 @param This Protocol instance pointer.
2166 @param Controller Handle of device to stop driver on.
2167 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2168 @param ChildHandleBuffer List of handles for the children we need to stop.
2169
2170 @return EFI_SUCCESS Success.
2171 @return EFI_DEVICE_ERROR Fail.
2172
2173 **/
2174 EFI_STATUS
2175 EFIAPI
2176 XhcDriverBindingStop (
2177 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2178 IN EFI_HANDLE Controller,
2179 IN UINTN NumberOfChildren,
2180 IN EFI_HANDLE *ChildHandleBuffer
2181 )
2182 {
2183 EFI_STATUS Status;
2184 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2185 EFI_PCI_IO_PROTOCOL *PciIo;
2186 USB_XHCI_INSTANCE *Xhc;
2187 UINT8 Index;
2188
2189 //
2190 // Test whether the Controller handler passed in is a valid
2191 // Usb controller handle that should be supported, if not,
2192 // return the error status directly
2193 //
2194 Status = gBS->OpenProtocol (
2195 Controller,
2196 &gEfiUsb2HcProtocolGuid,
2197 (VOID **)&Usb2Hc,
2198 This->DriverBindingHandle,
2199 Controller,
2200 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2201 );
2202
2203 if (EFI_ERROR (Status)) {
2204 return Status;
2205 }
2206
2207 Status = gBS->UninstallProtocolInterface (
2208 Controller,
2209 &gEfiUsb2HcProtocolGuid,
2210 Usb2Hc
2211 );
2212
2213 if (EFI_ERROR (Status)) {
2214 return Status;
2215 }
2216
2217 Xhc = XHC_FROM_THIS (Usb2Hc);
2218 PciIo = Xhc->PciIo;
2219
2220 //
2221 // Stop AsyncRequest Polling timer then stop the XHCI driver
2222 // and uninstall the XHCI protocl.
2223 //
2224 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2225
2226 //
2227 // Disable the device slots occupied by these devices on its downstream ports.
2228 // Entry 0 is reserved.
2229 //
2230 for (Index = 0; Index < 255; Index++) {
2231 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2232 (Xhc->UsbDevContext[Index + 1].SlotId == 0))
2233 {
2234 continue;
2235 }
2236
2237 if (Xhc->HcCParams.Data.Csz == 0) {
2238 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2239 } else {
2240 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2241 }
2242 }
2243
2244 if (Xhc->PollTimer != NULL) {
2245 gBS->CloseEvent (Xhc->PollTimer);
2246 }
2247
2248 if (Xhc->ExitBootServiceEvent != NULL) {
2249 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2250 }
2251
2252 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2253 XhcClearBiosOwnership (Xhc);
2254 XhciDelAllAsyncIntTransfers (Xhc);
2255 XhcFreeSched (Xhc);
2256
2257 if (Xhc->ControllerNameTable) {
2258 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2259 }
2260
2261 //
2262 // Restore original PCI attributes
2263 //
2264 PciIo->Attributes (
2265 PciIo,
2266 EfiPciIoAttributeOperationSet,
2267 Xhc->OriginalPciAttributes,
2268 NULL
2269 );
2270
2271 gBS->CloseProtocol (
2272 Controller,
2273 &gEfiPciIoProtocolGuid,
2274 This->DriverBindingHandle,
2275 Controller
2276 );
2277
2278 FreePool (Xhc);
2279
2280 return EFI_SUCCESS;
2281 }
EFI Development Kit II mirror for PVE