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MdeModulePkg XhciDxe: Extract new XhciInsertAsyncIntTransfer function
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c
1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "Xhci.h"
16
17 //
18 // Two arrays used to translate the XHCI port state (change)
19 // to the UEFI protocol's port state (change).
20 //
21 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
22 {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
23 {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
24 {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
25 {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
26 };
27
28 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
29 {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
30 {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
31 {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
32 {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
33 };
34
35 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
36 {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
37 {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
38 {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
39 {XHC_PORTSC_PRC, EfiUsbPortResetChange}
40 };
41
42 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
43 {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
44 {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
45 {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
46 {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
47 };
48
49 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
50 {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
51 {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
52 {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
53 {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
54 };
55
56 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
57 {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
58 {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
59 {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
60 {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
61 {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
62 };
63
64 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
65 XhcDriverBindingSupported,
66 XhcDriverBindingStart,
67 XhcDriverBindingStop,
68 0x30,
69 NULL,
70 NULL
71 };
72
73 //
74 // Template for Xhci's Usb2 Host Controller Protocol Instance.
75 //
76 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
77 XhcGetCapability,
78 XhcReset,
79 XhcGetState,
80 XhcSetState,
81 XhcControlTransfer,
82 XhcBulkTransfer,
83 XhcAsyncInterruptTransfer,
84 XhcSyncInterruptTransfer,
85 XhcIsochronousTransfer,
86 XhcAsyncIsochronousTransfer,
87 XhcGetRootHubPortStatus,
88 XhcSetRootHubPortFeature,
89 XhcClearRootHubPortFeature,
90 0x3,
91 0x0
92 };
93
94 /**
95 Retrieves the capability of root hub ports.
96
97 @param This The EFI_USB2_HC_PROTOCOL instance.
98 @param MaxSpeed Max speed supported by the controller.
99 @param PortNumber Number of the root hub ports.
100 @param Is64BitCapable Whether the controller supports 64-bit memory
101 addressing.
102
103 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
104 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
105
106 **/
107 EFI_STATUS
108 EFIAPI
109 XhcGetCapability (
110 IN EFI_USB2_HC_PROTOCOL *This,
111 OUT UINT8 *MaxSpeed,
112 OUT UINT8 *PortNumber,
113 OUT UINT8 *Is64BitCapable
114 )
115 {
116 USB_XHCI_INSTANCE *Xhc;
117 EFI_TPL OldTpl;
118
119 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
120 return EFI_INVALID_PARAMETER;
121 }
122
123 OldTpl = gBS->RaiseTPL (XHC_TPL);
124
125 Xhc = XHC_FROM_THIS (This);
126 *MaxSpeed = EFI_USB_SPEED_SUPER;
127 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
128 *Is64BitCapable = (UINT8) Xhc->Support64BitDma;
129 DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
130
131 gBS->RestoreTPL (OldTpl);
132
133 return EFI_SUCCESS;
134 }
135
136
137 /**
138 Provides software reset for the USB host controller.
139
140 @param This This EFI_USB2_HC_PROTOCOL instance.
141 @param Attributes A bit mask of the reset operation to perform.
142
143 @retval EFI_SUCCESS The reset operation succeeded.
144 @retval EFI_INVALID_PARAMETER Attributes is not valid.
145 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
146 not currently supported by the host controller.
147 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
148
149 **/
150 EFI_STATUS
151 EFIAPI
152 XhcReset (
153 IN EFI_USB2_HC_PROTOCOL *This,
154 IN UINT16 Attributes
155 )
156 {
157 USB_XHCI_INSTANCE *Xhc;
158 EFI_STATUS Status;
159 EFI_TPL OldTpl;
160
161 Xhc = XHC_FROM_THIS (This);
162
163 if (Xhc->DevicePath != NULL) {
164 //
165 // Report Status Code to indicate reset happens
166 //
167 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
168 EFI_PROGRESS_CODE,
169 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
170 Xhc->DevicePath
171 );
172 }
173
174 OldTpl = gBS->RaiseTPL (XHC_TPL);
175
176 switch (Attributes) {
177 case EFI_USB_HC_RESET_GLOBAL:
178 //
179 // Flow through, same behavior as Host Controller Reset
180 //
181 case EFI_USB_HC_RESET_HOST_CONTROLLER:
182 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
183 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
184 Status = EFI_SUCCESS;
185 goto ON_EXIT;
186 }
187 //
188 // Host Controller must be Halt when Reset it
189 //
190 if (!XhcIsHalt (Xhc)) {
191 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
192
193 if (EFI_ERROR (Status)) {
194 Status = EFI_DEVICE_ERROR;
195 goto ON_EXIT;
196 }
197 }
198
199 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
200 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
201
202 if (EFI_ERROR (Status)) {
203 goto ON_EXIT;
204 }
205 //
206 // Clean up the asynchronous transfers, currently only
207 // interrupt supports asynchronous operation.
208 //
209 XhciDelAllAsyncIntTransfers (Xhc);
210 XhcFreeSched (Xhc);
211
212 XhcInitSched (Xhc);
213 break;
214
215 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
216 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
217 Status = EFI_UNSUPPORTED;
218 break;
219
220 default:
221 Status = EFI_INVALID_PARAMETER;
222 }
223
224 ON_EXIT:
225 DEBUG ((EFI_D_INFO, "XhcReset: status %r\n", Status));
226 gBS->RestoreTPL (OldTpl);
227
228 return Status;
229 }
230
231
232 /**
233 Retrieve the current state of the USB host controller.
234
235 @param This This EFI_USB2_HC_PROTOCOL instance.
236 @param State Variable to return the current host controller
237 state.
238
239 @retval EFI_SUCCESS Host controller state was returned in State.
240 @retval EFI_INVALID_PARAMETER State is NULL.
241 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
242 retrieve the host controller's current state.
243
244 **/
245 EFI_STATUS
246 EFIAPI
247 XhcGetState (
248 IN EFI_USB2_HC_PROTOCOL *This,
249 OUT EFI_USB_HC_STATE *State
250 )
251 {
252 USB_XHCI_INSTANCE *Xhc;
253 EFI_TPL OldTpl;
254
255 if (State == NULL) {
256 return EFI_INVALID_PARAMETER;
257 }
258
259 OldTpl = gBS->RaiseTPL (XHC_TPL);
260
261 Xhc = XHC_FROM_THIS (This);
262
263 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
264 *State = EfiUsbHcStateHalt;
265 } else {
266 *State = EfiUsbHcStateOperational;
267 }
268
269 DEBUG ((EFI_D_INFO, "XhcGetState: current state %d\n", *State));
270 gBS->RestoreTPL (OldTpl);
271
272 return EFI_SUCCESS;
273 }
274
275 /**
276 Sets the USB host controller to a specific state.
277
278 @param This This EFI_USB2_HC_PROTOCOL instance.
279 @param State The state of the host controller that will be set.
280
281 @retval EFI_SUCCESS The USB host controller was successfully placed
282 in the state specified by State.
283 @retval EFI_INVALID_PARAMETER State is invalid.
284 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 XhcSetState (
290 IN EFI_USB2_HC_PROTOCOL *This,
291 IN EFI_USB_HC_STATE State
292 )
293 {
294 USB_XHCI_INSTANCE *Xhc;
295 EFI_STATUS Status;
296 EFI_USB_HC_STATE CurState;
297 EFI_TPL OldTpl;
298
299 Status = XhcGetState (This, &CurState);
300
301 if (EFI_ERROR (Status)) {
302 return EFI_DEVICE_ERROR;
303 }
304
305 if (CurState == State) {
306 return EFI_SUCCESS;
307 }
308
309 OldTpl = gBS->RaiseTPL (XHC_TPL);
310
311 Xhc = XHC_FROM_THIS (This);
312
313 switch (State) {
314 case EfiUsbHcStateHalt:
315 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
316 break;
317
318 case EfiUsbHcStateOperational:
319 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
320 Status = EFI_DEVICE_ERROR;
321 break;
322 }
323
324 //
325 // Software must not write a one to this field unless the host controller
326 // is in the Halted state. Doing so will yield undefined results.
327 // refers to Spec[XHCI1.0-2.3.1]
328 //
329 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
330 Status = EFI_DEVICE_ERROR;
331 break;
332 }
333
334 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
335 break;
336
337 case EfiUsbHcStateSuspend:
338 Status = EFI_UNSUPPORTED;
339 break;
340
341 default:
342 Status = EFI_INVALID_PARAMETER;
343 }
344
345 DEBUG ((EFI_D_INFO, "XhcSetState: status %r\n", Status));
346 gBS->RestoreTPL (OldTpl);
347
348 return Status;
349 }
350
351 /**
352 Retrieves the current status of a USB root hub port.
353
354 @param This This EFI_USB2_HC_PROTOCOL instance.
355 @param PortNumber The root hub port to retrieve the state from.
356 This value is zero-based.
357 @param PortStatus Variable to receive the port state.
358
359 @retval EFI_SUCCESS The status of the USB root hub port specified.
360 by PortNumber was returned in PortStatus.
361 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
362 @retval EFI_DEVICE_ERROR Can't read register.
363
364 **/
365 EFI_STATUS
366 EFIAPI
367 XhcGetRootHubPortStatus (
368 IN EFI_USB2_HC_PROTOCOL *This,
369 IN UINT8 PortNumber,
370 OUT EFI_USB_PORT_STATUS *PortStatus
371 )
372 {
373 USB_XHCI_INSTANCE *Xhc;
374 UINT32 Offset;
375 UINT32 State;
376 UINT32 TotalPort;
377 UINTN Index;
378 UINTN MapSize;
379 EFI_STATUS Status;
380 USB_DEV_ROUTE ParentRouteChart;
381 EFI_TPL OldTpl;
382
383 if (PortStatus == NULL) {
384 return EFI_INVALID_PARAMETER;
385 }
386
387 OldTpl = gBS->RaiseTPL (XHC_TPL);
388
389 Xhc = XHC_FROM_THIS (This);
390 Status = EFI_SUCCESS;
391
392 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
393
394 if (PortNumber >= TotalPort) {
395 Status = EFI_INVALID_PARAMETER;
396 goto ON_EXIT;
397 }
398
399 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
400 PortStatus->PortStatus = 0;
401 PortStatus->PortChangeStatus = 0;
402
403 State = XhcReadOpReg (Xhc, Offset);
404
405 //
406 // According to XHCI 1.1 spec November 2017,
407 // bit 10~13 of the root port status register identifies the speed of the attached device.
408 //
409 switch ((State & XHC_PORTSC_PS) >> 10) {
410 case 2:
411 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
412 break;
413
414 case 3:
415 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
416 break;
417
418 case 4:
419 case 5:
420 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
421 break;
422
423 default:
424 break;
425 }
426
427 //
428 // Convert the XHCI port/port change state to UEFI status
429 //
430 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
431
432 for (Index = 0; Index < MapSize; Index++) {
433 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
434 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
435 }
436 }
437 //
438 // Bit5~8 reflects its current link state.
439 //
440 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
441 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
442 }
443
444 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
445
446 for (Index = 0; Index < MapSize; Index++) {
447 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
448 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
449 }
450 }
451
452 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
453
454 for (Index = 0; Index < MapSize; Index++) {
455 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
456 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
457 }
458 }
459
460 //
461 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
462 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
463 //
464 ParentRouteChart.Dword = 0;
465 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
466
467 ON_EXIT:
468 gBS->RestoreTPL (OldTpl);
469 return Status;
470 }
471
472
473 /**
474 Sets a feature for the specified root hub port.
475
476 @param This This EFI_USB2_HC_PROTOCOL instance.
477 @param PortNumber Root hub port to set.
478 @param PortFeature Feature to set.
479
480 @retval EFI_SUCCESS The feature specified by PortFeature was set.
481 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
482 @retval EFI_DEVICE_ERROR Can't read register.
483
484 **/
485 EFI_STATUS
486 EFIAPI
487 XhcSetRootHubPortFeature (
488 IN EFI_USB2_HC_PROTOCOL *This,
489 IN UINT8 PortNumber,
490 IN EFI_USB_PORT_FEATURE PortFeature
491 )
492 {
493 USB_XHCI_INSTANCE *Xhc;
494 UINT32 Offset;
495 UINT32 State;
496 UINT32 TotalPort;
497 EFI_STATUS Status;
498 EFI_TPL OldTpl;
499
500 OldTpl = gBS->RaiseTPL (XHC_TPL);
501
502 Xhc = XHC_FROM_THIS (This);
503 Status = EFI_SUCCESS;
504
505 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
506
507 if (PortNumber >= TotalPort) {
508 Status = EFI_INVALID_PARAMETER;
509 goto ON_EXIT;
510 }
511
512 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
513 State = XhcReadOpReg (Xhc, Offset);
514
515 //
516 // Mask off the port status change bits, these bits are
517 // write clean bit
518 //
519 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
520
521 switch (PortFeature) {
522 case EfiUsbPortEnable:
523 //
524 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
525 // A port may be disabled by software writing a '1' to this flag.
526 //
527 Status = EFI_SUCCESS;
528 break;
529
530 case EfiUsbPortSuspend:
531 State |= XHC_PORTSC_LWS;
532 XhcWriteOpReg (Xhc, Offset, State);
533 State &= ~XHC_PORTSC_PLS;
534 State |= (3 << 5) ;
535 XhcWriteOpReg (Xhc, Offset, State);
536 break;
537
538 case EfiUsbPortReset:
539 DEBUG ((EFI_D_INFO, "XhcUsbPortReset!\n"));
540 //
541 // Make sure Host Controller not halt before reset it
542 //
543 if (XhcIsHalt (Xhc)) {
544 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
545
546 if (EFI_ERROR (Status)) {
547 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
548 break;
549 }
550 }
551
552 //
553 // 4.3.1 Resetting a Root Hub Port
554 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
555 //
556 State |= XHC_PORTSC_RESET;
557 XhcWriteOpReg (Xhc, Offset, State);
558 XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
559 break;
560
561 case EfiUsbPortPower:
562 //
563 // Not supported, ignore the operation
564 //
565 Status = EFI_SUCCESS;
566 break;
567
568 case EfiUsbPortOwner:
569 //
570 // XHCI root hub port don't has the owner bit, ignore the operation
571 //
572 Status = EFI_SUCCESS;
573 break;
574
575 default:
576 Status = EFI_INVALID_PARAMETER;
577 }
578
579 ON_EXIT:
580 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
581 gBS->RestoreTPL (OldTpl);
582
583 return Status;
584 }
585
586
587 /**
588 Clears a feature for the specified root hub port.
589
590 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
591 @param PortNumber Specifies the root hub port whose feature is
592 requested to be cleared.
593 @param PortFeature Indicates the feature selector associated with the
594 feature clear request.
595
596 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
597 for the USB root hub port specified by PortNumber.
598 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
599 @retval EFI_DEVICE_ERROR Can't read register.
600
601 **/
602 EFI_STATUS
603 EFIAPI
604 XhcClearRootHubPortFeature (
605 IN EFI_USB2_HC_PROTOCOL *This,
606 IN UINT8 PortNumber,
607 IN EFI_USB_PORT_FEATURE PortFeature
608 )
609 {
610 USB_XHCI_INSTANCE *Xhc;
611 UINT32 Offset;
612 UINT32 State;
613 UINT32 TotalPort;
614 EFI_STATUS Status;
615 EFI_TPL OldTpl;
616
617 OldTpl = gBS->RaiseTPL (XHC_TPL);
618
619 Xhc = XHC_FROM_THIS (This);
620 Status = EFI_SUCCESS;
621
622 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
623
624 if (PortNumber >= TotalPort) {
625 Status = EFI_INVALID_PARAMETER;
626 goto ON_EXIT;
627 }
628
629 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
630
631 //
632 // Mask off the port status change bits, these bits are
633 // write clean bit
634 //
635 State = XhcReadOpReg (Xhc, Offset);
636 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
637
638 switch (PortFeature) {
639 case EfiUsbPortEnable:
640 //
641 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
642 // A port may be disabled by software writing a '1' to this flag.
643 //
644 State |= XHC_PORTSC_PED;
645 State &= ~XHC_PORTSC_RESET;
646 XhcWriteOpReg (Xhc, Offset, State);
647 break;
648
649 case EfiUsbPortSuspend:
650 State |= XHC_PORTSC_LWS;
651 XhcWriteOpReg (Xhc, Offset, State);
652 State &= ~XHC_PORTSC_PLS;
653 XhcWriteOpReg (Xhc, Offset, State);
654 break;
655
656 case EfiUsbPortReset:
657 //
658 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
659 // Register bits indicate status when read, a clear bit may be set by
660 // writing a '1'. Writing a '0' to RW1S bits has no effect.
661 //
662 break;
663
664 case EfiUsbPortOwner:
665 //
666 // XHCI root hub port don't has the owner bit, ignore the operation
667 //
668 break;
669
670 case EfiUsbPortConnectChange:
671 //
672 // Clear connect status change
673 //
674 State |= XHC_PORTSC_CSC;
675 XhcWriteOpReg (Xhc, Offset, State);
676 break;
677
678 case EfiUsbPortEnableChange:
679 //
680 // Clear enable status change
681 //
682 State |= XHC_PORTSC_PEC;
683 XhcWriteOpReg (Xhc, Offset, State);
684 break;
685
686 case EfiUsbPortOverCurrentChange:
687 //
688 // Clear PortOverCurrent change
689 //
690 State |= XHC_PORTSC_OCC;
691 XhcWriteOpReg (Xhc, Offset, State);
692 break;
693
694 case EfiUsbPortResetChange:
695 //
696 // Clear Port Reset change
697 //
698 State |= XHC_PORTSC_PRC;
699 XhcWriteOpReg (Xhc, Offset, State);
700 break;
701
702 case EfiUsbPortPower:
703 case EfiUsbPortSuspendChange:
704 //
705 // Not supported or not related operation
706 //
707 break;
708
709 default:
710 Status = EFI_INVALID_PARAMETER;
711 break;
712 }
713
714 ON_EXIT:
715 DEBUG ((EFI_D_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
716 gBS->RestoreTPL (OldTpl);
717
718 return Status;
719 }
720
721 /**
722 Submits a new transaction to a target USB device.
723
724 @param Xhc The XHCI Instance.
725 @param DeviceAddress The target device address.
726 @param EndPointAddress Endpoint number and its direction encoded in bit 7
727 @param DeviceSpeed Target device speed.
728 @param MaximumPacketLength Maximum packet size the default control transfer
729 endpoint is capable of sending or receiving.
730 @param Type The transaction type.
731 @param Request USB device request to send.
732 @param Data Data buffer to be transmitted or received from USB
733 device.
734 @param DataLength The size (in bytes) of the data buffer.
735 @param Timeout Indicates the maximum timeout, in millisecond.
736 @param TransferResult Return the result of this control transfer.
737
738 @retval EFI_SUCCESS Transfer was completed successfully.
739 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
740 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
741 @retval EFI_TIMEOUT Transfer failed due to timeout.
742 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
743 **/
744 EFI_STATUS
745 XhcTransfer (
746 IN USB_XHCI_INSTANCE *Xhc,
747 IN UINT8 DeviceAddress,
748 IN UINT8 EndPointAddress,
749 IN UINT8 DeviceSpeed,
750 IN UINTN MaximumPacketLength,
751 IN UINTN Type,
752 IN EFI_USB_DEVICE_REQUEST *Request,
753 IN OUT VOID *Data,
754 IN OUT UINTN *DataLength,
755 IN UINTN Timeout,
756 OUT UINT32 *TransferResult
757 )
758 {
759 EFI_STATUS Status;
760 EFI_STATUS RecoveryStatus;
761 URB *Urb;
762
763 ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
764 Urb = XhcCreateUrb (
765 Xhc,
766 DeviceAddress,
767 EndPointAddress,
768 DeviceSpeed,
769 MaximumPacketLength,
770 Type,
771 Request,
772 Data,
773 *DataLength,
774 NULL,
775 NULL
776 );
777
778 if (Urb == NULL) {
779 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
780 return EFI_OUT_OF_RESOURCES;
781 }
782
783 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
784
785 if (Status == EFI_TIMEOUT) {
786 //
787 // The transfer timed out. Abort the transfer by dequeueing of the TD.
788 //
789 RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
790 if (RecoveryStatus == EFI_ALREADY_STARTED) {
791 //
792 // The URB is finished just before stopping endpoint.
793 // Change returning status from EFI_TIMEOUT to EFI_SUCCESS.
794 //
795 ASSERT (Urb->Result == EFI_USB_NOERROR);
796 Status = EFI_SUCCESS;
797 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
798 } else if (EFI_ERROR(RecoveryStatus)) {
799 DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
800 }
801 }
802
803 *TransferResult = Urb->Result;
804 *DataLength = Urb->Completed;
805
806 if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
807 ASSERT (Status == EFI_DEVICE_ERROR);
808 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
809 if (EFI_ERROR (RecoveryStatus)) {
810 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
811 }
812 }
813
814 Xhc->PciIo->Flush (Xhc->PciIo);
815 XhcFreeUrb (Xhc, Urb);
816 return Status;
817 }
818
819 /**
820 Submits control transfer to a target USB device.
821
822 @param This This EFI_USB2_HC_PROTOCOL instance.
823 @param DeviceAddress The target device address.
824 @param DeviceSpeed Target device speed.
825 @param MaximumPacketLength Maximum packet size the default control transfer
826 endpoint is capable of sending or receiving.
827 @param Request USB device request to send.
828 @param TransferDirection Specifies the data direction for the data stage
829 @param Data Data buffer to be transmitted or received from USB
830 device.
831 @param DataLength The size (in bytes) of the data buffer.
832 @param Timeout Indicates the maximum timeout, in millisecond.
833 @param Translator Transaction translator to be used by this device.
834 @param TransferResult Return the result of this control transfer.
835
836 @retval EFI_SUCCESS Transfer was completed successfully.
837 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
838 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
839 @retval EFI_TIMEOUT Transfer failed due to timeout.
840 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
841
842 **/
843 EFI_STATUS
844 EFIAPI
845 XhcControlTransfer (
846 IN EFI_USB2_HC_PROTOCOL *This,
847 IN UINT8 DeviceAddress,
848 IN UINT8 DeviceSpeed,
849 IN UINTN MaximumPacketLength,
850 IN EFI_USB_DEVICE_REQUEST *Request,
851 IN EFI_USB_DATA_DIRECTION TransferDirection,
852 IN OUT VOID *Data,
853 IN OUT UINTN *DataLength,
854 IN UINTN Timeout,
855 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
856 OUT UINT32 *TransferResult
857 )
858 {
859 USB_XHCI_INSTANCE *Xhc;
860 UINT8 Endpoint;
861 UINT8 Index;
862 UINT8 DescriptorType;
863 UINT8 SlotId;
864 UINT8 TTT;
865 UINT8 MTT;
866 UINT32 MaxPacket0;
867 EFI_USB_HUB_DESCRIPTOR *HubDesc;
868 EFI_TPL OldTpl;
869 EFI_STATUS Status;
870 UINTN MapSize;
871 EFI_USB_PORT_STATUS PortStatus;
872 UINT32 State;
873 EFI_USB_DEVICE_REQUEST ClearPortRequest;
874 UINTN Len;
875
876 //
877 // Validate parameters
878 //
879 if ((Request == NULL) || (TransferResult == NULL)) {
880 return EFI_INVALID_PARAMETER;
881 }
882
883 if ((TransferDirection != EfiUsbDataIn) &&
884 (TransferDirection != EfiUsbDataOut) &&
885 (TransferDirection != EfiUsbNoData)) {
886 return EFI_INVALID_PARAMETER;
887 }
888
889 if ((TransferDirection == EfiUsbNoData) &&
890 ((Data != NULL) || (*DataLength != 0))) {
891 return EFI_INVALID_PARAMETER;
892 }
893
894 if ((TransferDirection != EfiUsbNoData) &&
895 ((Data == NULL) || (*DataLength == 0))) {
896 return EFI_INVALID_PARAMETER;
897 }
898
899 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
900 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
901 (MaximumPacketLength != 512)
902 ) {
903 return EFI_INVALID_PARAMETER;
904 }
905
906 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
907 return EFI_INVALID_PARAMETER;
908 }
909
910 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
911 return EFI_INVALID_PARAMETER;
912 }
913
914 OldTpl = gBS->RaiseTPL (XHC_TPL);
915
916 Xhc = XHC_FROM_THIS (This);
917
918 Status = EFI_DEVICE_ERROR;
919 *TransferResult = EFI_USB_ERR_SYSTEM;
920 Len = 0;
921
922 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
923 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
924 goto ON_EXIT;
925 }
926
927 //
928 // Check if the device is still enabled before every transaction.
929 //
930 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
931 if (SlotId == 0) {
932 goto ON_EXIT;
933 }
934
935 //
936 // Hook the Set_Address request from UsbBus.
937 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
938 //
939 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
940 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
941 //
942 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
943 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
944 //
945 for (Index = 0; Index < 255; Index++) {
946 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
947 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
948 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
949 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
950 }
951 }
952
953 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
954 Status = EFI_DEVICE_ERROR;
955 goto ON_EXIT;
956 }
957 //
958 // The actual device address has been assigned by XHCI during initializing the device slot.
959 // So we just need establish the mapping relationship between the device address requested from UsbBus
960 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
961 // can find out the actual device address by it.
962 //
963 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
964 Status = EFI_SUCCESS;
965 goto ON_EXIT;
966 }
967
968 //
969 // Create a new URB, insert it into the asynchronous
970 // schedule list, then poll the execution status.
971 // Note that we encode the direction in address although default control
972 // endpoint is bidirectional. XhcCreateUrb expects this
973 // combination of Ep addr and its direction.
974 //
975 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
976 Status = XhcTransfer (
977 Xhc,
978 DeviceAddress,
979 Endpoint,
980 DeviceSpeed,
981 MaximumPacketLength,
982 XHC_CTRL_TRANSFER,
983 Request,
984 Data,
985 DataLength,
986 Timeout,
987 TransferResult
988 );
989
990 if (EFI_ERROR (Status)) {
991 goto ON_EXIT;
992 }
993
994 //
995 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
996 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
997 // Hook Set_Config request from UsbBus as we need configure device endpoint.
998 //
999 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
1000 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
1001 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
1002 DescriptorType = (UINT8)(Request->Value >> 8);
1003 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
1004 ASSERT (Data != NULL);
1005 //
1006 // Store a copy of device scriptor as hub device need this info to configure endpoint.
1007 //
1008 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
1009 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
1010 //
1011 // If it's a usb3.0 device, then its max packet size is a 2^n.
1012 //
1013 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1014 } else {
1015 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1016 }
1017 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
1018 if (Xhc->HcCParams.Data.Csz == 0) {
1019 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
1020 } else {
1021 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
1022 }
1023 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
1024 ASSERT (Data != NULL);
1025 if (*DataLength == ((UINT16 *)Data)[1]) {
1026 //
1027 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
1028 //
1029 Index = (UINT8)Request->Value;
1030 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
1031 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
1032 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
1033 //
1034 // Default to use AlternateSetting 0 for all interfaces.
1035 //
1036 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
1037 }
1038 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
1039 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
1040 ASSERT (Data != NULL);
1041 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
1042 ASSERT (HubDesc->NumPorts <= 15);
1043 //
1044 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
1045 //
1046 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
1047 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
1048 //
1049 // Don't support multi-TT feature for super speed hub now.
1050 //
1051 MTT = 0;
1052 DEBUG ((EFI_D_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
1053 } else {
1054 MTT = 0;
1055 }
1056
1057 if (Xhc->HcCParams.Data.Csz == 0) {
1058 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1059 } else {
1060 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1061 }
1062 }
1063 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1064 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
1065 //
1066 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1067 //
1068 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1069 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1070 if (Xhc->HcCParams.Data.Csz == 0) {
1071 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1072 } else {
1073 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1074 }
1075 break;
1076 }
1077 }
1078 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1079 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
1080 //
1081 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1082 // Request->Value indicates AlterlateSetting to set
1083 // Request->Index indicates Interface to set
1084 //
1085 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
1086 if (Xhc->HcCParams.Data.Csz == 0) {
1087 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1088 } else {
1089 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1090 }
1091 }
1092 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1093 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
1094 ASSERT (Data != NULL);
1095 //
1096 // Hook Get_Status request from UsbBus to keep track of the port status change.
1097 //
1098 State = *(UINT32 *)Data;
1099 PortStatus.PortStatus = 0;
1100 PortStatus.PortChangeStatus = 0;
1101
1102 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1103 //
1104 // For super speed hub, its bit10~12 presents the attached device speed.
1105 //
1106 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1107 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1108 }
1109 } else {
1110 //
1111 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1112 //
1113 if (XHC_BIT_IS_SET (State, BIT9)) {
1114 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1115 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1116 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1117 }
1118 }
1119
1120 //
1121 // Convert the XHCI port/port change state to UEFI status
1122 //
1123 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1124 for (Index = 0; Index < MapSize; Index++) {
1125 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1126 PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1127 }
1128 }
1129
1130 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1131 for (Index = 0; Index < MapSize; Index++) {
1132 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1133 PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1134 }
1135 }
1136
1137 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1138
1139 for (Index = 0; Index < MapSize; Index++) {
1140 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1141 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1142 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1143 ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
1144 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1145 ClearPortRequest.Index = Request->Index;
1146 ClearPortRequest.Length = 0;
1147
1148 XhcControlTransfer (
1149 This,
1150 DeviceAddress,
1151 DeviceSpeed,
1152 MaximumPacketLength,
1153 &ClearPortRequest,
1154 EfiUsbNoData,
1155 NULL,
1156 &Len,
1157 Timeout,
1158 Translator,
1159 TransferResult
1160 );
1161 }
1162 }
1163
1164 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1165
1166 *(UINT32 *)Data = *(UINT32*)&PortStatus;
1167 }
1168
1169 ON_EXIT:
1170 if (EFI_ERROR (Status)) {
1171 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1172 }
1173
1174 gBS->RestoreTPL (OldTpl);
1175
1176 return Status;
1177 }
1178
1179
1180 /**
1181 Submits bulk transfer to a bulk endpoint of a USB device.
1182
1183 @param This This EFI_USB2_HC_PROTOCOL instance.
1184 @param DeviceAddress Target device address.
1185 @param EndPointAddress Endpoint number and its direction in bit 7.
1186 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1187 transfer.
1188 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1189 sending or receiving.
1190 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1191 @param Data Array of pointers to the buffers of data to transmit
1192 from or receive into.
1193 @param DataLength The lenght of the data buffer.
1194 @param DataToggle On input, the initial data toggle for the transfer;
1195 On output, it is updated to to next data toggle to
1196 use of the subsequent bulk transfer.
1197 @param Timeout Indicates the maximum time, in millisecond, which
1198 the transfer is allowed to complete.
1199 @param Translator A pointr to the transaction translator data.
1200 @param TransferResult A pointer to the detailed result information of the
1201 bulk transfer.
1202
1203 @retval EFI_SUCCESS The transfer was completed successfully.
1204 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1205 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1206 @retval EFI_TIMEOUT The transfer failed due to timeout.
1207 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1208
1209 **/
1210 EFI_STATUS
1211 EFIAPI
1212 XhcBulkTransfer (
1213 IN EFI_USB2_HC_PROTOCOL *This,
1214 IN UINT8 DeviceAddress,
1215 IN UINT8 EndPointAddress,
1216 IN UINT8 DeviceSpeed,
1217 IN UINTN MaximumPacketLength,
1218 IN UINT8 DataBuffersNumber,
1219 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1220 IN OUT UINTN *DataLength,
1221 IN OUT UINT8 *DataToggle,
1222 IN UINTN Timeout,
1223 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1224 OUT UINT32 *TransferResult
1225 )
1226 {
1227 USB_XHCI_INSTANCE *Xhc;
1228 UINT8 SlotId;
1229 EFI_STATUS Status;
1230 EFI_TPL OldTpl;
1231
1232 //
1233 // Validate the parameters
1234 //
1235 if ((DataLength == NULL) || (*DataLength == 0) ||
1236 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
1237 return EFI_INVALID_PARAMETER;
1238 }
1239
1240 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1241 return EFI_INVALID_PARAMETER;
1242 }
1243
1244 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1245 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1246 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1247 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
1248 return EFI_INVALID_PARAMETER;
1249 }
1250
1251 OldTpl = gBS->RaiseTPL (XHC_TPL);
1252
1253 Xhc = XHC_FROM_THIS (This);
1254
1255 *TransferResult = EFI_USB_ERR_SYSTEM;
1256 Status = EFI_DEVICE_ERROR;
1257
1258 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1259 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: HC is halted\n"));
1260 goto ON_EXIT;
1261 }
1262
1263 //
1264 // Check if the device is still enabled before every transaction.
1265 //
1266 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1267 if (SlotId == 0) {
1268 goto ON_EXIT;
1269 }
1270
1271 //
1272 // Create a new URB, insert it into the asynchronous
1273 // schedule list, then poll the execution status.
1274 //
1275 Status = XhcTransfer (
1276 Xhc,
1277 DeviceAddress,
1278 EndPointAddress,
1279 DeviceSpeed,
1280 MaximumPacketLength,
1281 XHC_BULK_TRANSFER,
1282 NULL,
1283 Data[0],
1284 DataLength,
1285 Timeout,
1286 TransferResult
1287 );
1288
1289 ON_EXIT:
1290 if (EFI_ERROR (Status)) {
1291 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1292 }
1293 gBS->RestoreTPL (OldTpl);
1294
1295 return Status;
1296 }
1297
1298 /**
1299 Submits an asynchronous interrupt transfer to an
1300 interrupt endpoint of a USB device.
1301
1302 @param This This EFI_USB2_HC_PROTOCOL instance.
1303 @param DeviceAddress Target device address.
1304 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1305 @param DeviceSpeed Indicates device speed.
1306 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1307 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1308 transfer If FALSE, to remove the specified
1309 asynchronous interrupt.
1310 @param DataToggle On input, the initial data toggle to use; on output,
1311 it is updated to indicate the next data toggle.
1312 @param PollingInterval The he interval, in milliseconds, that the transfer
1313 is polled.
1314 @param DataLength The length of data to receive at the rate specified
1315 by PollingInterval.
1316 @param Translator Transaction translator to use.
1317 @param CallBackFunction Function to call at the rate specified by
1318 PollingInterval.
1319 @param Context Context to CallBackFunction.
1320
1321 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1322 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1323 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1324 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1325
1326 **/
1327 EFI_STATUS
1328 EFIAPI
1329 XhcAsyncInterruptTransfer (
1330 IN EFI_USB2_HC_PROTOCOL *This,
1331 IN UINT8 DeviceAddress,
1332 IN UINT8 EndPointAddress,
1333 IN UINT8 DeviceSpeed,
1334 IN UINTN MaximumPacketLength,
1335 IN BOOLEAN IsNewTransfer,
1336 IN OUT UINT8 *DataToggle,
1337 IN UINTN PollingInterval,
1338 IN UINTN DataLength,
1339 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1340 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1341 IN VOID *Context OPTIONAL
1342 )
1343 {
1344 USB_XHCI_INSTANCE *Xhc;
1345 URB *Urb;
1346 EFI_STATUS Status;
1347 UINT8 SlotId;
1348 UINT8 Index;
1349 EFI_TPL OldTpl;
1350
1351 //
1352 // Validate parameters
1353 //
1354 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1355 return EFI_INVALID_PARAMETER;
1356 }
1357
1358 if (IsNewTransfer) {
1359 if (DataLength == 0) {
1360 return EFI_INVALID_PARAMETER;
1361 }
1362
1363 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1364 return EFI_INVALID_PARAMETER;
1365 }
1366
1367 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1368 return EFI_INVALID_PARAMETER;
1369 }
1370 }
1371
1372 OldTpl = gBS->RaiseTPL (XHC_TPL);
1373
1374 Xhc = XHC_FROM_THIS (This);
1375
1376 //
1377 // Delete Async interrupt transfer request.
1378 //
1379 if (!IsNewTransfer) {
1380 //
1381 // The delete request may happen after device is detached.
1382 //
1383 for (Index = 0; Index < 255; Index++) {
1384 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1385 break;
1386 }
1387 }
1388
1389 if (Index == 255) {
1390 Status = EFI_INVALID_PARAMETER;
1391 goto ON_EXIT;
1392 }
1393
1394 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1395 DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1396 goto ON_EXIT;
1397 }
1398
1399 Status = EFI_SUCCESS;
1400
1401 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1402 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1403 Status = EFI_DEVICE_ERROR;
1404 goto ON_EXIT;
1405 }
1406
1407 //
1408 // Check if the device is still enabled before every transaction.
1409 //
1410 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1411 if (SlotId == 0) {
1412 goto ON_EXIT;
1413 }
1414
1415 Urb = XhciInsertAsyncIntTransfer (
1416 Xhc,
1417 DeviceAddress,
1418 EndPointAddress,
1419 DeviceSpeed,
1420 MaximumPacketLength,
1421 DataLength,
1422 CallBackFunction,
1423 Context
1424 );
1425 if (Urb == NULL) {
1426 Status = EFI_OUT_OF_RESOURCES;
1427 goto ON_EXIT;
1428 }
1429
1430 //
1431 // Ring the doorbell
1432 //
1433 Status = RingIntTransferDoorBell (Xhc, Urb);
1434
1435 ON_EXIT:
1436 Xhc->PciIo->Flush (Xhc->PciIo);
1437 gBS->RestoreTPL (OldTpl);
1438
1439 return Status;
1440 }
1441
1442
1443 /**
1444 Submits synchronous interrupt transfer to an interrupt endpoint
1445 of a USB device.
1446
1447 @param This This EFI_USB2_HC_PROTOCOL instance.
1448 @param DeviceAddress Target device address.
1449 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1450 @param DeviceSpeed Indicates device speed.
1451 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1452 of sending or receiving.
1453 @param Data Buffer of data that will be transmitted to USB
1454 device or received from USB device.
1455 @param DataLength On input, the size, in bytes, of the data buffer; On
1456 output, the number of bytes transferred.
1457 @param DataToggle On input, the initial data toggle to use; on output,
1458 it is updated to indicate the next data toggle.
1459 @param Timeout Maximum time, in second, to complete.
1460 @param Translator Transaction translator to use.
1461 @param TransferResult Variable to receive the transfer result.
1462
1463 @return EFI_SUCCESS The transfer was completed successfully.
1464 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1465 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1466 @return EFI_TIMEOUT The transfer failed due to timeout.
1467 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1468
1469 **/
1470 EFI_STATUS
1471 EFIAPI
1472 XhcSyncInterruptTransfer (
1473 IN EFI_USB2_HC_PROTOCOL *This,
1474 IN UINT8 DeviceAddress,
1475 IN UINT8 EndPointAddress,
1476 IN UINT8 DeviceSpeed,
1477 IN UINTN MaximumPacketLength,
1478 IN OUT VOID *Data,
1479 IN OUT UINTN *DataLength,
1480 IN OUT UINT8 *DataToggle,
1481 IN UINTN Timeout,
1482 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1483 OUT UINT32 *TransferResult
1484 )
1485 {
1486 USB_XHCI_INSTANCE *Xhc;
1487 UINT8 SlotId;
1488 EFI_STATUS Status;
1489 EFI_TPL OldTpl;
1490
1491 //
1492 // Validates parameters
1493 //
1494 if ((DataLength == NULL) || (*DataLength == 0) ||
1495 (Data == NULL) || (TransferResult == NULL)) {
1496 return EFI_INVALID_PARAMETER;
1497 }
1498
1499 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1500 return EFI_INVALID_PARAMETER;
1501 }
1502
1503 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1504 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1505 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
1506 return EFI_INVALID_PARAMETER;
1507 }
1508
1509 OldTpl = gBS->RaiseTPL (XHC_TPL);
1510
1511 Xhc = XHC_FROM_THIS (This);
1512
1513 *TransferResult = EFI_USB_ERR_SYSTEM;
1514 Status = EFI_DEVICE_ERROR;
1515
1516 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1517 DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1518 goto ON_EXIT;
1519 }
1520
1521 //
1522 // Check if the device is still enabled before every transaction.
1523 //
1524 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1525 if (SlotId == 0) {
1526 goto ON_EXIT;
1527 }
1528
1529 Status = XhcTransfer (
1530 Xhc,
1531 DeviceAddress,
1532 EndPointAddress,
1533 DeviceSpeed,
1534 MaximumPacketLength,
1535 XHC_INT_TRANSFER_SYNC,
1536 NULL,
1537 Data,
1538 DataLength,
1539 Timeout,
1540 TransferResult
1541 );
1542
1543 ON_EXIT:
1544 if (EFI_ERROR (Status)) {
1545 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1546 }
1547 gBS->RestoreTPL (OldTpl);
1548
1549 return Status;
1550 }
1551
1552
1553 /**
1554 Submits isochronous transfer to a target USB device.
1555
1556 @param This This EFI_USB2_HC_PROTOCOL instance.
1557 @param DeviceAddress Target device address.
1558 @param EndPointAddress End point address with its direction.
1559 @param DeviceSpeed Device speed, Low speed device doesn't support this
1560 type.
1561 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1562 sending or receiving.
1563 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1564 @param Data Array of pointers to the buffers of data that will
1565 be transmitted to USB device or received from USB
1566 device.
1567 @param DataLength The size, in bytes, of the data buffer.
1568 @param Translator Transaction translator to use.
1569 @param TransferResult Variable to receive the transfer result.
1570
1571 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1572
1573 **/
1574 EFI_STATUS
1575 EFIAPI
1576 XhcIsochronousTransfer (
1577 IN EFI_USB2_HC_PROTOCOL *This,
1578 IN UINT8 DeviceAddress,
1579 IN UINT8 EndPointAddress,
1580 IN UINT8 DeviceSpeed,
1581 IN UINTN MaximumPacketLength,
1582 IN UINT8 DataBuffersNumber,
1583 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1584 IN UINTN DataLength,
1585 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1586 OUT UINT32 *TransferResult
1587 )
1588 {
1589 return EFI_UNSUPPORTED;
1590 }
1591
1592
1593 /**
1594 Submits Async isochronous transfer to a target USB device.
1595
1596 @param This This EFI_USB2_HC_PROTOCOL instance.
1597 @param DeviceAddress Target device address.
1598 @param EndPointAddress End point address with its direction.
1599 @param DeviceSpeed Device speed, Low speed device doesn't support this
1600 type.
1601 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1602 sending or receiving.
1603 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1604 @param Data Array of pointers to the buffers of data that will
1605 be transmitted to USB device or received from USB
1606 device.
1607 @param DataLength The size, in bytes, of the data buffer.
1608 @param Translator Transaction translator to use.
1609 @param IsochronousCallBack Function to be called when the transfer complete.
1610 @param Context Context passed to the call back function as
1611 parameter.
1612
1613 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1614
1615 **/
1616 EFI_STATUS
1617 EFIAPI
1618 XhcAsyncIsochronousTransfer (
1619 IN EFI_USB2_HC_PROTOCOL *This,
1620 IN UINT8 DeviceAddress,
1621 IN UINT8 EndPointAddress,
1622 IN UINT8 DeviceSpeed,
1623 IN UINTN MaximumPacketLength,
1624 IN UINT8 DataBuffersNumber,
1625 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1626 IN UINTN DataLength,
1627 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1628 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1629 IN VOID *Context
1630 )
1631 {
1632 return EFI_UNSUPPORTED;
1633 }
1634
1635 /**
1636 Entry point for EFI drivers.
1637
1638 @param ImageHandle EFI_HANDLE.
1639 @param SystemTable EFI_SYSTEM_TABLE.
1640
1641 @retval EFI_SUCCESS Success.
1642 @retval Others Fail.
1643
1644 **/
1645 EFI_STATUS
1646 EFIAPI
1647 XhcDriverEntryPoint (
1648 IN EFI_HANDLE ImageHandle,
1649 IN EFI_SYSTEM_TABLE *SystemTable
1650 )
1651 {
1652 return EfiLibInstallDriverBindingComponentName2 (
1653 ImageHandle,
1654 SystemTable,
1655 &gXhciDriverBinding,
1656 ImageHandle,
1657 &gXhciComponentName,
1658 &gXhciComponentName2
1659 );
1660 }
1661
1662
1663 /**
1664 Test to see if this driver supports ControllerHandle. Any
1665 ControllerHandle that has Usb2HcProtocol installed will
1666 be supported.
1667
1668 @param This Protocol instance pointer.
1669 @param Controller Handle of device to test.
1670 @param RemainingDevicePath Not used.
1671
1672 @return EFI_SUCCESS This driver supports this device.
1673 @return EFI_UNSUPPORTED This driver does not support this device.
1674
1675 **/
1676 EFI_STATUS
1677 EFIAPI
1678 XhcDriverBindingSupported (
1679 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1680 IN EFI_HANDLE Controller,
1681 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1682 )
1683 {
1684 EFI_STATUS Status;
1685 EFI_PCI_IO_PROTOCOL *PciIo;
1686 USB_CLASSC UsbClassCReg;
1687
1688 //
1689 // Test whether there is PCI IO Protocol attached on the controller handle.
1690 //
1691 Status = gBS->OpenProtocol (
1692 Controller,
1693 &gEfiPciIoProtocolGuid,
1694 (VOID **) &PciIo,
1695 This->DriverBindingHandle,
1696 Controller,
1697 EFI_OPEN_PROTOCOL_BY_DRIVER
1698 );
1699
1700 if (EFI_ERROR (Status)) {
1701 return EFI_UNSUPPORTED;
1702 }
1703
1704 Status = PciIo->Pci.Read (
1705 PciIo,
1706 EfiPciIoWidthUint8,
1707 PCI_CLASSCODE_OFFSET,
1708 sizeof (USB_CLASSC) / sizeof (UINT8),
1709 &UsbClassCReg
1710 );
1711
1712 if (EFI_ERROR (Status)) {
1713 Status = EFI_UNSUPPORTED;
1714 goto ON_EXIT;
1715 }
1716
1717 //
1718 // Test whether the controller belongs to Xhci type
1719 //
1720 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1721 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1722 (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
1723 Status = EFI_UNSUPPORTED;
1724 }
1725
1726 ON_EXIT:
1727 gBS->CloseProtocol (
1728 Controller,
1729 &gEfiPciIoProtocolGuid,
1730 This->DriverBindingHandle,
1731 Controller
1732 );
1733
1734 return Status;
1735 }
1736
1737 /**
1738 Create and initialize a USB_XHCI_INSTANCE structure.
1739
1740 @param PciIo The PciIo on this device.
1741 @param DevicePath The device path of host controller.
1742 @param OriginalPciAttributes Original PCI attributes.
1743
1744 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1745 otherwise NULL.
1746
1747 **/
1748 USB_XHCI_INSTANCE*
1749 XhcCreateUsbHc (
1750 IN EFI_PCI_IO_PROTOCOL *PciIo,
1751 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1752 IN UINT64 OriginalPciAttributes
1753 )
1754 {
1755 USB_XHCI_INSTANCE *Xhc;
1756 EFI_STATUS Status;
1757 UINT32 PageSize;
1758 UINT16 ExtCapReg;
1759 UINT8 ReleaseNumber;
1760
1761 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1762
1763 if (Xhc == NULL) {
1764 return NULL;
1765 }
1766
1767 //
1768 // Initialize private data structure
1769 //
1770 Xhc->Signature = XHCI_INSTANCE_SIG;
1771 Xhc->PciIo = PciIo;
1772 Xhc->DevicePath = DevicePath;
1773 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1774 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1775
1776 Status = PciIo->Pci.Read (
1777 PciIo,
1778 EfiPciIoWidthUint8,
1779 XHC_PCI_SBRN_OFFSET,
1780 1,
1781 &ReleaseNumber
1782 );
1783
1784 if (!EFI_ERROR (Status)) {
1785 Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4;
1786 Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F);
1787 }
1788
1789 InitializeListHead (&Xhc->AsyncIntTransfers);
1790
1791 //
1792 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1793 //
1794 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1795 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1796 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1797 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1798 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1799 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1800
1801 //
1802 // This PageSize field defines the page size supported by the xHC implementation.
1803 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1804 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1805 //
1806 PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
1807 Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
1808
1809 ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
1810 Xhc->ExtCapRegBase = ExtCapReg << 2;
1811 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1812 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1813
1814 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1815 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1816 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1817 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1818 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1819 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1820 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1821 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1822
1823 //
1824 // Create AsyncRequest Polling Timer
1825 //
1826 Status = gBS->CreateEvent (
1827 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1828 TPL_NOTIFY,
1829 XhcMonitorAsyncRequests,
1830 Xhc,
1831 &Xhc->PollTimer
1832 );
1833
1834 if (EFI_ERROR (Status)) {
1835 goto ON_ERROR;
1836 }
1837
1838 return Xhc;
1839
1840 ON_ERROR:
1841 FreePool (Xhc);
1842 return NULL;
1843 }
1844
1845 /**
1846 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1847
1848 @param Event Pointer to this event
1849 @param Context Event handler private data
1850
1851 **/
1852 VOID
1853 EFIAPI
1854 XhcExitBootService (
1855 EFI_EVENT Event,
1856 VOID *Context
1857 )
1858
1859 {
1860 USB_XHCI_INSTANCE *Xhc;
1861 EFI_PCI_IO_PROTOCOL *PciIo;
1862
1863 Xhc = (USB_XHCI_INSTANCE*) Context;
1864 PciIo = Xhc->PciIo;
1865
1866 //
1867 // Stop AsyncRequest Polling timer then stop the XHCI driver
1868 // and uninstall the XHCI protocl.
1869 //
1870 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1871 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1872
1873 if (Xhc->PollTimer != NULL) {
1874 gBS->CloseEvent (Xhc->PollTimer);
1875 }
1876
1877 XhcClearBiosOwnership (Xhc);
1878
1879 //
1880 // Restore original PCI attributes
1881 //
1882 PciIo->Attributes (
1883 PciIo,
1884 EfiPciIoAttributeOperationSet,
1885 Xhc->OriginalPciAttributes,
1886 NULL
1887 );
1888 }
1889
1890 /**
1891 Starting the Usb XHCI Driver.
1892
1893 @param This Protocol instance pointer.
1894 @param Controller Handle of device to test.
1895 @param RemainingDevicePath Not used.
1896
1897 @return EFI_SUCCESS supports this device.
1898 @return EFI_UNSUPPORTED do not support this device.
1899 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1900 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1901
1902 **/
1903 EFI_STATUS
1904 EFIAPI
1905 XhcDriverBindingStart (
1906 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1907 IN EFI_HANDLE Controller,
1908 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1909 )
1910 {
1911 EFI_STATUS Status;
1912 EFI_PCI_IO_PROTOCOL *PciIo;
1913 UINT64 Supports;
1914 UINT64 OriginalPciAttributes;
1915 BOOLEAN PciAttributesSaved;
1916 USB_XHCI_INSTANCE *Xhc;
1917 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1918
1919 //
1920 // Open the PciIo Protocol, then enable the USB host controller
1921 //
1922 Status = gBS->OpenProtocol (
1923 Controller,
1924 &gEfiPciIoProtocolGuid,
1925 (VOID **) &PciIo,
1926 This->DriverBindingHandle,
1927 Controller,
1928 EFI_OPEN_PROTOCOL_BY_DRIVER
1929 );
1930
1931 if (EFI_ERROR (Status)) {
1932 return Status;
1933 }
1934
1935 //
1936 // Open Device Path Protocol for on USB host controller
1937 //
1938 HcDevicePath = NULL;
1939 Status = gBS->OpenProtocol (
1940 Controller,
1941 &gEfiDevicePathProtocolGuid,
1942 (VOID **) &HcDevicePath,
1943 This->DriverBindingHandle,
1944 Controller,
1945 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1946 );
1947
1948 PciAttributesSaved = FALSE;
1949 //
1950 // Save original PCI attributes
1951 //
1952 Status = PciIo->Attributes (
1953 PciIo,
1954 EfiPciIoAttributeOperationGet,
1955 0,
1956 &OriginalPciAttributes
1957 );
1958
1959 if (EFI_ERROR (Status)) {
1960 goto CLOSE_PCIIO;
1961 }
1962 PciAttributesSaved = TRUE;
1963
1964 Status = PciIo->Attributes (
1965 PciIo,
1966 EfiPciIoAttributeOperationSupported,
1967 0,
1968 &Supports
1969 );
1970 if (!EFI_ERROR (Status)) {
1971 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
1972 Status = PciIo->Attributes (
1973 PciIo,
1974 EfiPciIoAttributeOperationEnable,
1975 Supports,
1976 NULL
1977 );
1978 }
1979
1980 if (EFI_ERROR (Status)) {
1981 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
1982 goto CLOSE_PCIIO;
1983 }
1984
1985 //
1986 // Create then install USB2_HC_PROTOCOL
1987 //
1988 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
1989
1990 if (Xhc == NULL) {
1991 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
1992 return EFI_OUT_OF_RESOURCES;
1993 }
1994
1995 //
1996 // Enable 64-bit DMA support in the PCI layer if this controller
1997 // supports it.
1998 //
1999 if (Xhc->HcCParams.Data.Ac64 != 0) {
2000 Status = PciIo->Attributes (
2001 PciIo,
2002 EfiPciIoAttributeOperationEnable,
2003 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
2004 NULL
2005 );
2006 if (!EFI_ERROR (Status)) {
2007 Xhc->Support64BitDma = TRUE;
2008 } else {
2009 DEBUG ((EFI_D_WARN,
2010 "%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
2011 __FUNCTION__, Controller, Status));
2012 }
2013 }
2014
2015 XhcSetBiosOwnership (Xhc);
2016
2017 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
2018 ASSERT (XhcIsHalt (Xhc));
2019
2020 //
2021 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2022 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2023 //
2024 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2025
2026 //
2027 // Initialize the schedule
2028 //
2029 XhcInitSched (Xhc);
2030
2031 //
2032 // Start the Host Controller
2033 //
2034 XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
2035
2036 //
2037 // Start the asynchronous interrupt monitor
2038 //
2039 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2040 if (EFI_ERROR (Status)) {
2041 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2042 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2043 goto FREE_POOL;
2044 }
2045
2046 //
2047 // Create event to stop the HC when exit boot service.
2048 //
2049 Status = gBS->CreateEventEx (
2050 EVT_NOTIFY_SIGNAL,
2051 TPL_NOTIFY,
2052 XhcExitBootService,
2053 Xhc,
2054 &gEfiEventExitBootServicesGuid,
2055 &Xhc->ExitBootServiceEvent
2056 );
2057 if (EFI_ERROR (Status)) {
2058 goto FREE_POOL;
2059 }
2060
2061 //
2062 // Install the component name protocol, don't fail the start
2063 // because of something for display.
2064 //
2065 AddUnicodeString2 (
2066 "eng",
2067 gXhciComponentName.SupportedLanguages,
2068 &Xhc->ControllerNameTable,
2069 L"eXtensible Host Controller (USB 3.0)",
2070 TRUE
2071 );
2072 AddUnicodeString2 (
2073 "en",
2074 gXhciComponentName2.SupportedLanguages,
2075 &Xhc->ControllerNameTable,
2076 L"eXtensible Host Controller (USB 3.0)",
2077 FALSE
2078 );
2079
2080 Status = gBS->InstallProtocolInterface (
2081 &Controller,
2082 &gEfiUsb2HcProtocolGuid,
2083 EFI_NATIVE_INTERFACE,
2084 &Xhc->Usb2Hc
2085 );
2086 if (EFI_ERROR (Status)) {
2087 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2088 goto FREE_POOL;
2089 }
2090
2091 DEBUG ((EFI_D_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2092 return EFI_SUCCESS;
2093
2094 FREE_POOL:
2095 gBS->CloseEvent (Xhc->PollTimer);
2096 XhcFreeSched (Xhc);
2097 FreePool (Xhc);
2098
2099 CLOSE_PCIIO:
2100 if (PciAttributesSaved) {
2101 //
2102 // Restore original PCI attributes
2103 //
2104 PciIo->Attributes (
2105 PciIo,
2106 EfiPciIoAttributeOperationSet,
2107 OriginalPciAttributes,
2108 NULL
2109 );
2110 }
2111
2112 gBS->CloseProtocol (
2113 Controller,
2114 &gEfiPciIoProtocolGuid,
2115 This->DriverBindingHandle,
2116 Controller
2117 );
2118
2119 return Status;
2120 }
2121
2122
2123 /**
2124 Stop this driver on ControllerHandle. Support stopping any child handles
2125 created by this driver.
2126
2127 @param This Protocol instance pointer.
2128 @param Controller Handle of device to stop driver on.
2129 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2130 @param ChildHandleBuffer List of handles for the children we need to stop.
2131
2132 @return EFI_SUCCESS Success.
2133 @return EFI_DEVICE_ERROR Fail.
2134
2135 **/
2136 EFI_STATUS
2137 EFIAPI
2138 XhcDriverBindingStop (
2139 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2140 IN EFI_HANDLE Controller,
2141 IN UINTN NumberOfChildren,
2142 IN EFI_HANDLE *ChildHandleBuffer
2143 )
2144 {
2145 EFI_STATUS Status;
2146 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2147 EFI_PCI_IO_PROTOCOL *PciIo;
2148 USB_XHCI_INSTANCE *Xhc;
2149 UINT8 Index;
2150
2151 //
2152 // Test whether the Controller handler passed in is a valid
2153 // Usb controller handle that should be supported, if not,
2154 // return the error status directly
2155 //
2156 Status = gBS->OpenProtocol (
2157 Controller,
2158 &gEfiUsb2HcProtocolGuid,
2159 (VOID **) &Usb2Hc,
2160 This->DriverBindingHandle,
2161 Controller,
2162 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2163 );
2164
2165 if (EFI_ERROR (Status)) {
2166 return Status;
2167 }
2168
2169 Status = gBS->UninstallProtocolInterface (
2170 Controller,
2171 &gEfiUsb2HcProtocolGuid,
2172 Usb2Hc
2173 );
2174
2175 if (EFI_ERROR (Status)) {
2176 return Status;
2177 }
2178
2179 Xhc = XHC_FROM_THIS (Usb2Hc);
2180 PciIo = Xhc->PciIo;
2181
2182 //
2183 // Stop AsyncRequest Polling timer then stop the XHCI driver
2184 // and uninstall the XHCI protocl.
2185 //
2186 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2187
2188 //
2189 // Disable the device slots occupied by these devices on its downstream ports.
2190 // Entry 0 is reserved.
2191 //
2192 for (Index = 0; Index < 255; Index++) {
2193 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2194 (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
2195 continue;
2196 }
2197 if (Xhc->HcCParams.Data.Csz == 0) {
2198 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2199 } else {
2200 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2201 }
2202 }
2203
2204 if (Xhc->PollTimer != NULL) {
2205 gBS->CloseEvent (Xhc->PollTimer);
2206 }
2207
2208 if (Xhc->ExitBootServiceEvent != NULL) {
2209 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2210 }
2211
2212 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2213 XhcClearBiosOwnership (Xhc);
2214 XhciDelAllAsyncIntTransfers (Xhc);
2215 XhcFreeSched (Xhc);
2216
2217 if (Xhc->ControllerNameTable) {
2218 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2219 }
2220
2221 //
2222 // Restore original PCI attributes
2223 //
2224 PciIo->Attributes (
2225 PciIo,
2226 EfiPciIoAttributeOperationSet,
2227 Xhc->OriginalPciAttributes,
2228 NULL
2229 );
2230
2231 gBS->CloseProtocol (
2232 Controller,
2233 &gEfiPciIoProtocolGuid,
2234 This->DriverBindingHandle,
2235 Controller
2236 );
2237
2238 FreePool (Xhc);
2239
2240 return EFI_SUCCESS;
2241 }
2242
EFI Development Kit II mirror for PVE