MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c
1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "Xhci.h"
16
17 //
18 // Two arrays used to translate the XHCI port state (change)
19 // to the UEFI protocol's port state (change).
20 //
21 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
22 {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
23 {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
24 {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
25 {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
26 };
27
28 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
29 {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
30 {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
31 {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
32 {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
33 };
34
35 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
36 {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
37 {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
38 {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
39 {XHC_PORTSC_PRC, EfiUsbPortResetChange}
40 };
41
42 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
43 {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
44 {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
45 {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
46 {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
47 };
48
49 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
50 {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
51 {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
52 {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
53 {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
54 };
55
56 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
57 {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
58 {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
59 {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
60 {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
61 {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
62 };
63
64 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
65 XhcDriverBindingSupported,
66 XhcDriverBindingStart,
67 XhcDriverBindingStop,
68 0x30,
69 NULL,
70 NULL
71 };
72
73 //
74 // Template for Xhci's Usb2 Host Controller Protocol Instance.
75 //
76 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
77 XhcGetCapability,
78 XhcReset,
79 XhcGetState,
80 XhcSetState,
81 XhcControlTransfer,
82 XhcBulkTransfer,
83 XhcAsyncInterruptTransfer,
84 XhcSyncInterruptTransfer,
85 XhcIsochronousTransfer,
86 XhcAsyncIsochronousTransfer,
87 XhcGetRootHubPortStatus,
88 XhcSetRootHubPortFeature,
89 XhcClearRootHubPortFeature,
90 0x3,
91 0x0
92 };
93
94 /**
95 Retrieves the capability of root hub ports.
96
97 @param This The EFI_USB2_HC_PROTOCOL instance.
98 @param MaxSpeed Max speed supported by the controller.
99 @param PortNumber Number of the root hub ports.
100 @param Is64BitCapable Whether the controller supports 64-bit memory
101 addressing.
102
103 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
104 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
105
106 **/
107 EFI_STATUS
108 EFIAPI
109 XhcGetCapability (
110 IN EFI_USB2_HC_PROTOCOL *This,
111 OUT UINT8 *MaxSpeed,
112 OUT UINT8 *PortNumber,
113 OUT UINT8 *Is64BitCapable
114 )
115 {
116 USB_XHCI_INSTANCE *Xhc;
117 EFI_TPL OldTpl;
118
119 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
120 return EFI_INVALID_PARAMETER;
121 }
122
123 OldTpl = gBS->RaiseTPL (XHC_TPL);
124
125 Xhc = XHC_FROM_THIS (This);
126 *MaxSpeed = EFI_USB_SPEED_SUPER;
127 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
128 *Is64BitCapable = (UINT8) Xhc->Support64BitDma;
129 DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
130
131 gBS->RestoreTPL (OldTpl);
132
133 return EFI_SUCCESS;
134 }
135
136
137 /**
138 Provides software reset for the USB host controller.
139
140 @param This This EFI_USB2_HC_PROTOCOL instance.
141 @param Attributes A bit mask of the reset operation to perform.
142
143 @retval EFI_SUCCESS The reset operation succeeded.
144 @retval EFI_INVALID_PARAMETER Attributes is not valid.
145 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
146 not currently supported by the host controller.
147 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
148
149 **/
150 EFI_STATUS
151 EFIAPI
152 XhcReset (
153 IN EFI_USB2_HC_PROTOCOL *This,
154 IN UINT16 Attributes
155 )
156 {
157 USB_XHCI_INSTANCE *Xhc;
158 EFI_STATUS Status;
159 EFI_TPL OldTpl;
160
161 Xhc = XHC_FROM_THIS (This);
162
163 if (Xhc->DevicePath != NULL) {
164 //
165 // Report Status Code to indicate reset happens
166 //
167 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
168 EFI_PROGRESS_CODE,
169 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
170 Xhc->DevicePath
171 );
172 }
173
174 OldTpl = gBS->RaiseTPL (XHC_TPL);
175
176 switch (Attributes) {
177 case EFI_USB_HC_RESET_GLOBAL:
178 //
179 // Flow through, same behavior as Host Controller Reset
180 //
181 case EFI_USB_HC_RESET_HOST_CONTROLLER:
182 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
183 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
184 Status = EFI_SUCCESS;
185 goto ON_EXIT;
186 }
187 //
188 // Host Controller must be Halt when Reset it
189 //
190 if (!XhcIsHalt (Xhc)) {
191 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
192
193 if (EFI_ERROR (Status)) {
194 Status = EFI_DEVICE_ERROR;
195 goto ON_EXIT;
196 }
197 }
198
199 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
200 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
201
202 if (EFI_ERROR (Status)) {
203 goto ON_EXIT;
204 }
205 //
206 // Clean up the asynchronous transfers, currently only
207 // interrupt supports asynchronous operation.
208 //
209 XhciDelAllAsyncIntTransfers (Xhc);
210 XhcFreeSched (Xhc);
211
212 XhcInitSched (Xhc);
213 break;
214
215 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
216 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
217 Status = EFI_UNSUPPORTED;
218 break;
219
220 default:
221 Status = EFI_INVALID_PARAMETER;
222 }
223
224 ON_EXIT:
225 DEBUG ((EFI_D_INFO, "XhcReset: status %r\n", Status));
226 gBS->RestoreTPL (OldTpl);
227
228 return Status;
229 }
230
231
232 /**
233 Retrieve the current state of the USB host controller.
234
235 @param This This EFI_USB2_HC_PROTOCOL instance.
236 @param State Variable to return the current host controller
237 state.
238
239 @retval EFI_SUCCESS Host controller state was returned in State.
240 @retval EFI_INVALID_PARAMETER State is NULL.
241 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
242 retrieve the host controller's current state.
243
244 **/
245 EFI_STATUS
246 EFIAPI
247 XhcGetState (
248 IN EFI_USB2_HC_PROTOCOL *This,
249 OUT EFI_USB_HC_STATE *State
250 )
251 {
252 USB_XHCI_INSTANCE *Xhc;
253 EFI_TPL OldTpl;
254
255 if (State == NULL) {
256 return EFI_INVALID_PARAMETER;
257 }
258
259 OldTpl = gBS->RaiseTPL (XHC_TPL);
260
261 Xhc = XHC_FROM_THIS (This);
262
263 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
264 *State = EfiUsbHcStateHalt;
265 } else {
266 *State = EfiUsbHcStateOperational;
267 }
268
269 DEBUG ((EFI_D_INFO, "XhcGetState: current state %d\n", *State));
270 gBS->RestoreTPL (OldTpl);
271
272 return EFI_SUCCESS;
273 }
274
275 /**
276 Sets the USB host controller to a specific state.
277
278 @param This This EFI_USB2_HC_PROTOCOL instance.
279 @param State The state of the host controller that will be set.
280
281 @retval EFI_SUCCESS The USB host controller was successfully placed
282 in the state specified by State.
283 @retval EFI_INVALID_PARAMETER State is invalid.
284 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 XhcSetState (
290 IN EFI_USB2_HC_PROTOCOL *This,
291 IN EFI_USB_HC_STATE State
292 )
293 {
294 USB_XHCI_INSTANCE *Xhc;
295 EFI_STATUS Status;
296 EFI_USB_HC_STATE CurState;
297 EFI_TPL OldTpl;
298
299 Status = XhcGetState (This, &CurState);
300
301 if (EFI_ERROR (Status)) {
302 return EFI_DEVICE_ERROR;
303 }
304
305 if (CurState == State) {
306 return EFI_SUCCESS;
307 }
308
309 OldTpl = gBS->RaiseTPL (XHC_TPL);
310
311 Xhc = XHC_FROM_THIS (This);
312
313 switch (State) {
314 case EfiUsbHcStateHalt:
315 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
316 break;
317
318 case EfiUsbHcStateOperational:
319 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
320 Status = EFI_DEVICE_ERROR;
321 break;
322 }
323
324 //
325 // Software must not write a one to this field unless the host controller
326 // is in the Halted state. Doing so will yield undefined results.
327 // refers to Spec[XHCI1.0-2.3.1]
328 //
329 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
330 Status = EFI_DEVICE_ERROR;
331 break;
332 }
333
334 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
335 break;
336
337 case EfiUsbHcStateSuspend:
338 Status = EFI_UNSUPPORTED;
339 break;
340
341 default:
342 Status = EFI_INVALID_PARAMETER;
343 }
344
345 DEBUG ((EFI_D_INFO, "XhcSetState: status %r\n", Status));
346 gBS->RestoreTPL (OldTpl);
347
348 return Status;
349 }
350
351 /**
352 Retrieves the current status of a USB root hub port.
353
354 @param This This EFI_USB2_HC_PROTOCOL instance.
355 @param PortNumber The root hub port to retrieve the state from.
356 This value is zero-based.
357 @param PortStatus Variable to receive the port state.
358
359 @retval EFI_SUCCESS The status of the USB root hub port specified.
360 by PortNumber was returned in PortStatus.
361 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
362 @retval EFI_DEVICE_ERROR Can't read register.
363
364 **/
365 EFI_STATUS
366 EFIAPI
367 XhcGetRootHubPortStatus (
368 IN EFI_USB2_HC_PROTOCOL *This,
369 IN UINT8 PortNumber,
370 OUT EFI_USB_PORT_STATUS *PortStatus
371 )
372 {
373 USB_XHCI_INSTANCE *Xhc;
374 UINT32 Offset;
375 UINT32 State;
376 UINT32 TotalPort;
377 UINTN Index;
378 UINTN MapSize;
379 EFI_STATUS Status;
380 USB_DEV_ROUTE ParentRouteChart;
381 EFI_TPL OldTpl;
382
383 if (PortStatus == NULL) {
384 return EFI_INVALID_PARAMETER;
385 }
386
387 OldTpl = gBS->RaiseTPL (XHC_TPL);
388
389 Xhc = XHC_FROM_THIS (This);
390 Status = EFI_SUCCESS;
391
392 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
393
394 if (PortNumber >= TotalPort) {
395 Status = EFI_INVALID_PARAMETER;
396 goto ON_EXIT;
397 }
398
399 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
400 PortStatus->PortStatus = 0;
401 PortStatus->PortChangeStatus = 0;
402
403 State = XhcReadOpReg (Xhc, Offset);
404
405 //
406 // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.
407 //
408 switch ((State & XHC_PORTSC_PS) >> 10) {
409 case 2:
410 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
411 break;
412
413 case 3:
414 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
415 break;
416
417 case 4:
418 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
419 break;
420
421 default:
422 break;
423 }
424
425 //
426 // Convert the XHCI port/port change state to UEFI status
427 //
428 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
429
430 for (Index = 0; Index < MapSize; Index++) {
431 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
432 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
433 }
434 }
435 //
436 // Bit5~8 reflects its current link state.
437 //
438 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
439 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
440 }
441
442 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
443
444 for (Index = 0; Index < MapSize; Index++) {
445 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
446 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
447 }
448 }
449
450 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
451
452 for (Index = 0; Index < MapSize; Index++) {
453 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
454 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
455 }
456 }
457
458 //
459 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
460 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
461 //
462 ParentRouteChart.Dword = 0;
463 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
464
465 ON_EXIT:
466 gBS->RestoreTPL (OldTpl);
467 return Status;
468 }
469
470
471 /**
472 Sets a feature for the specified root hub port.
473
474 @param This This EFI_USB2_HC_PROTOCOL instance.
475 @param PortNumber Root hub port to set.
476 @param PortFeature Feature to set.
477
478 @retval EFI_SUCCESS The feature specified by PortFeature was set.
479 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
480 @retval EFI_DEVICE_ERROR Can't read register.
481
482 **/
483 EFI_STATUS
484 EFIAPI
485 XhcSetRootHubPortFeature (
486 IN EFI_USB2_HC_PROTOCOL *This,
487 IN UINT8 PortNumber,
488 IN EFI_USB_PORT_FEATURE PortFeature
489 )
490 {
491 USB_XHCI_INSTANCE *Xhc;
492 UINT32 Offset;
493 UINT32 State;
494 UINT32 TotalPort;
495 EFI_STATUS Status;
496 EFI_TPL OldTpl;
497
498 OldTpl = gBS->RaiseTPL (XHC_TPL);
499
500 Xhc = XHC_FROM_THIS (This);
501 Status = EFI_SUCCESS;
502
503 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
504
505 if (PortNumber >= TotalPort) {
506 Status = EFI_INVALID_PARAMETER;
507 goto ON_EXIT;
508 }
509
510 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
511 State = XhcReadOpReg (Xhc, Offset);
512
513 //
514 // Mask off the port status change bits, these bits are
515 // write clean bit
516 //
517 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
518
519 switch (PortFeature) {
520 case EfiUsbPortEnable:
521 //
522 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
523 // A port may be disabled by software writing a '1' to this flag.
524 //
525 Status = EFI_SUCCESS;
526 break;
527
528 case EfiUsbPortSuspend:
529 State |= XHC_PORTSC_LWS;
530 XhcWriteOpReg (Xhc, Offset, State);
531 State &= ~XHC_PORTSC_PLS;
532 State |= (3 << 5) ;
533 XhcWriteOpReg (Xhc, Offset, State);
534 break;
535
536 case EfiUsbPortReset:
537 DEBUG ((EFI_D_INFO, "XhcUsbPortReset!\n"));
538 //
539 // Make sure Host Controller not halt before reset it
540 //
541 if (XhcIsHalt (Xhc)) {
542 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
543
544 if (EFI_ERROR (Status)) {
545 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
546 break;
547 }
548 }
549
550 //
551 // 4.3.1 Resetting a Root Hub Port
552 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
553 //
554 State |= XHC_PORTSC_RESET;
555 XhcWriteOpReg (Xhc, Offset, State);
556 XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
557 break;
558
559 case EfiUsbPortPower:
560 //
561 // Not supported, ignore the operation
562 //
563 Status = EFI_SUCCESS;
564 break;
565
566 case EfiUsbPortOwner:
567 //
568 // XHCI root hub port don't has the owner bit, ignore the operation
569 //
570 Status = EFI_SUCCESS;
571 break;
572
573 default:
574 Status = EFI_INVALID_PARAMETER;
575 }
576
577 ON_EXIT:
578 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
579 gBS->RestoreTPL (OldTpl);
580
581 return Status;
582 }
583
584
585 /**
586 Clears a feature for the specified root hub port.
587
588 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
589 @param PortNumber Specifies the root hub port whose feature is
590 requested to be cleared.
591 @param PortFeature Indicates the feature selector associated with the
592 feature clear request.
593
594 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
595 for the USB root hub port specified by PortNumber.
596 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
597 @retval EFI_DEVICE_ERROR Can't read register.
598
599 **/
600 EFI_STATUS
601 EFIAPI
602 XhcClearRootHubPortFeature (
603 IN EFI_USB2_HC_PROTOCOL *This,
604 IN UINT8 PortNumber,
605 IN EFI_USB_PORT_FEATURE PortFeature
606 )
607 {
608 USB_XHCI_INSTANCE *Xhc;
609 UINT32 Offset;
610 UINT32 State;
611 UINT32 TotalPort;
612 EFI_STATUS Status;
613 EFI_TPL OldTpl;
614
615 OldTpl = gBS->RaiseTPL (XHC_TPL);
616
617 Xhc = XHC_FROM_THIS (This);
618 Status = EFI_SUCCESS;
619
620 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
621
622 if (PortNumber >= TotalPort) {
623 Status = EFI_INVALID_PARAMETER;
624 goto ON_EXIT;
625 }
626
627 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
628
629 //
630 // Mask off the port status change bits, these bits are
631 // write clean bit
632 //
633 State = XhcReadOpReg (Xhc, Offset);
634 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
635
636 switch (PortFeature) {
637 case EfiUsbPortEnable:
638 //
639 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
640 // A port may be disabled by software writing a '1' to this flag.
641 //
642 State |= XHC_PORTSC_PED;
643 State &= ~XHC_PORTSC_RESET;
644 XhcWriteOpReg (Xhc, Offset, State);
645 break;
646
647 case EfiUsbPortSuspend:
648 State |= XHC_PORTSC_LWS;
649 XhcWriteOpReg (Xhc, Offset, State);
650 State &= ~XHC_PORTSC_PLS;
651 XhcWriteOpReg (Xhc, Offset, State);
652 break;
653
654 case EfiUsbPortReset:
655 //
656 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
657 // Register bits indicate status when read, a clear bit may be set by
658 // writing a '1'. Writing a '0' to RW1S bits has no effect.
659 //
660 break;
661
662 case EfiUsbPortOwner:
663 //
664 // XHCI root hub port don't has the owner bit, ignore the operation
665 //
666 break;
667
668 case EfiUsbPortConnectChange:
669 //
670 // Clear connect status change
671 //
672 State |= XHC_PORTSC_CSC;
673 XhcWriteOpReg (Xhc, Offset, State);
674 break;
675
676 case EfiUsbPortEnableChange:
677 //
678 // Clear enable status change
679 //
680 State |= XHC_PORTSC_PEC;
681 XhcWriteOpReg (Xhc, Offset, State);
682 break;
683
684 case EfiUsbPortOverCurrentChange:
685 //
686 // Clear PortOverCurrent change
687 //
688 State |= XHC_PORTSC_OCC;
689 XhcWriteOpReg (Xhc, Offset, State);
690 break;
691
692 case EfiUsbPortResetChange:
693 //
694 // Clear Port Reset change
695 //
696 State |= XHC_PORTSC_PRC;
697 XhcWriteOpReg (Xhc, Offset, State);
698 break;
699
700 case EfiUsbPortPower:
701 case EfiUsbPortSuspendChange:
702 //
703 // Not supported or not related operation
704 //
705 break;
706
707 default:
708 Status = EFI_INVALID_PARAMETER;
709 break;
710 }
711
712 ON_EXIT:
713 DEBUG ((EFI_D_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
714 gBS->RestoreTPL (OldTpl);
715
716 return Status;
717 }
718
719 /**
720 Submits a new transaction to a target USB device.
721
722 @param Xhc The XHCI Instance.
723 @param DeviceAddress The target device address.
724 @param EndPointAddress Endpoint number and its direction encoded in bit 7
725 @param DeviceSpeed Target device speed.
726 @param MaximumPacketLength Maximum packet size the default control transfer
727 endpoint is capable of sending or receiving.
728 @param Type The transaction type.
729 @param Request USB device request to send.
730 @param Data Data buffer to be transmitted or received from USB
731 device.
732 @param DataLength The size (in bytes) of the data buffer.
733 @param Timeout Indicates the maximum timeout, in millisecond.
734 @param TransferResult Return the result of this control transfer.
735
736 @retval EFI_SUCCESS Transfer was completed successfully.
737 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
738 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
739 @retval EFI_TIMEOUT Transfer failed due to timeout.
740 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
741 **/
742 EFI_STATUS
743 XhcTransfer (
744 IN USB_XHCI_INSTANCE *Xhc,
745 IN UINT8 DeviceAddress,
746 IN UINT8 EndPointAddress,
747 IN UINT8 DeviceSpeed,
748 IN UINTN MaximumPacketLength,
749 IN UINTN Type,
750 IN EFI_USB_DEVICE_REQUEST *Request,
751 IN OUT VOID *Data,
752 IN OUT UINTN *DataLength,
753 IN UINTN Timeout,
754 OUT UINT32 *TransferResult
755 )
756 {
757 EFI_STATUS Status;
758 EFI_STATUS RecoveryStatus;
759 URB *Urb;
760
761 ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
762 Urb = XhcCreateUrb (
763 Xhc,
764 DeviceAddress,
765 EndPointAddress,
766 DeviceSpeed,
767 MaximumPacketLength,
768 Type,
769 Request,
770 Data,
771 *DataLength,
772 NULL,
773 NULL
774 );
775
776 if (Urb == NULL) {
777 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
778 return EFI_OUT_OF_RESOURCES;
779 }
780
781 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
782
783 *TransferResult = Urb->Result;
784 *DataLength = Urb->Completed;
785
786 if (Status == EFI_TIMEOUT) {
787 //
788 // The transfer timed out. Abort the transfer by dequeueing of the TD.
789 //
790 RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
791 if (EFI_ERROR (RecoveryStatus)) {
792 DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed\n", Type));
793 }
794 } else {
795 if (*TransferResult == EFI_USB_NOERROR) {
796 Status = EFI_SUCCESS;
797 } else if (*TransferResult == EFI_USB_ERR_STALL) {
798 RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
799 if (EFI_ERROR (RecoveryStatus)) {
800 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed\n", Type));
801 }
802 Status = EFI_DEVICE_ERROR;
803 }
804 }
805
806 Xhc->PciIo->Flush (Xhc->PciIo);
807 XhcFreeUrb (Xhc, Urb);
808 return Status;
809 }
810
811 /**
812 Submits control transfer to a target USB device.
813
814 @param This This EFI_USB2_HC_PROTOCOL instance.
815 @param DeviceAddress The target device address.
816 @param DeviceSpeed Target device speed.
817 @param MaximumPacketLength Maximum packet size the default control transfer
818 endpoint is capable of sending or receiving.
819 @param Request USB device request to send.
820 @param TransferDirection Specifies the data direction for the data stage
821 @param Data Data buffer to be transmitted or received from USB
822 device.
823 @param DataLength The size (in bytes) of the data buffer.
824 @param Timeout Indicates the maximum timeout, in millisecond.
825 @param Translator Transaction translator to be used by this device.
826 @param TransferResult Return the result of this control transfer.
827
828 @retval EFI_SUCCESS Transfer was completed successfully.
829 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
830 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
831 @retval EFI_TIMEOUT Transfer failed due to timeout.
832 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
833
834 **/
835 EFI_STATUS
836 EFIAPI
837 XhcControlTransfer (
838 IN EFI_USB2_HC_PROTOCOL *This,
839 IN UINT8 DeviceAddress,
840 IN UINT8 DeviceSpeed,
841 IN UINTN MaximumPacketLength,
842 IN EFI_USB_DEVICE_REQUEST *Request,
843 IN EFI_USB_DATA_DIRECTION TransferDirection,
844 IN OUT VOID *Data,
845 IN OUT UINTN *DataLength,
846 IN UINTN Timeout,
847 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
848 OUT UINT32 *TransferResult
849 )
850 {
851 USB_XHCI_INSTANCE *Xhc;
852 UINT8 Endpoint;
853 UINT8 Index;
854 UINT8 DescriptorType;
855 UINT8 SlotId;
856 UINT8 TTT;
857 UINT8 MTT;
858 UINT32 MaxPacket0;
859 EFI_USB_HUB_DESCRIPTOR *HubDesc;
860 EFI_TPL OldTpl;
861 EFI_STATUS Status;
862 UINTN MapSize;
863 EFI_USB_PORT_STATUS PortStatus;
864 UINT32 State;
865 EFI_USB_DEVICE_REQUEST ClearPortRequest;
866 UINTN Len;
867
868 //
869 // Validate parameters
870 //
871 if ((Request == NULL) || (TransferResult == NULL)) {
872 return EFI_INVALID_PARAMETER;
873 }
874
875 if ((TransferDirection != EfiUsbDataIn) &&
876 (TransferDirection != EfiUsbDataOut) &&
877 (TransferDirection != EfiUsbNoData)) {
878 return EFI_INVALID_PARAMETER;
879 }
880
881 if ((TransferDirection == EfiUsbNoData) &&
882 ((Data != NULL) || (*DataLength != 0))) {
883 return EFI_INVALID_PARAMETER;
884 }
885
886 if ((TransferDirection != EfiUsbNoData) &&
887 ((Data == NULL) || (*DataLength == 0))) {
888 return EFI_INVALID_PARAMETER;
889 }
890
891 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
892 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
893 (MaximumPacketLength != 512)
894 ) {
895 return EFI_INVALID_PARAMETER;
896 }
897
898 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
899 return EFI_INVALID_PARAMETER;
900 }
901
902 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
903 return EFI_INVALID_PARAMETER;
904 }
905
906 OldTpl = gBS->RaiseTPL (XHC_TPL);
907
908 Xhc = XHC_FROM_THIS (This);
909
910 Status = EFI_DEVICE_ERROR;
911 *TransferResult = EFI_USB_ERR_SYSTEM;
912 Len = 0;
913
914 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
915 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
916 goto ON_EXIT;
917 }
918
919 //
920 // Check if the device is still enabled before every transaction.
921 //
922 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
923 if (SlotId == 0) {
924 goto ON_EXIT;
925 }
926
927 //
928 // Hook the Set_Address request from UsbBus.
929 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
930 //
931 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
932 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
933 //
934 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
935 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
936 //
937 for (Index = 0; Index < 255; Index++) {
938 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
939 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
940 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
941 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
942 }
943 }
944
945 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
946 Status = EFI_DEVICE_ERROR;
947 goto ON_EXIT;
948 }
949 //
950 // The actual device address has been assigned by XHCI during initializing the device slot.
951 // So we just need establish the mapping relationship between the device address requested from UsbBus
952 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
953 // can find out the actual device address by it.
954 //
955 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
956 Status = EFI_SUCCESS;
957 goto ON_EXIT;
958 }
959
960 //
961 // Create a new URB, insert it into the asynchronous
962 // schedule list, then poll the execution status.
963 // Note that we encode the direction in address although default control
964 // endpoint is bidirectional. XhcCreateUrb expects this
965 // combination of Ep addr and its direction.
966 //
967 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
968 Status = XhcTransfer (
969 Xhc,
970 DeviceAddress,
971 Endpoint,
972 DeviceSpeed,
973 MaximumPacketLength,
974 XHC_CTRL_TRANSFER,
975 Request,
976 Data,
977 DataLength,
978 Timeout,
979 TransferResult
980 );
981
982 if (EFI_ERROR (Status)) {
983 goto ON_EXIT;
984 }
985
986 //
987 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
988 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
989 // Hook Set_Config request from UsbBus as we need configure device endpoint.
990 //
991 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
992 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
993 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
994 DescriptorType = (UINT8)(Request->Value >> 8);
995 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
996 ASSERT (Data != NULL);
997 //
998 // Store a copy of device scriptor as hub device need this info to configure endpoint.
999 //
1000 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
1001 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
1002 //
1003 // If it's a usb3.0 device, then its max packet size is a 2^n.
1004 //
1005 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1006 } else {
1007 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1008 }
1009 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
1010 if (Xhc->HcCParams.Data.Csz == 0) {
1011 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
1012 } else {
1013 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
1014 }
1015 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
1016 ASSERT (Data != NULL);
1017 if (*DataLength == ((UINT16 *)Data)[1]) {
1018 //
1019 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
1020 //
1021 Index = (UINT8)Request->Value;
1022 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
1023 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
1024 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
1025 //
1026 // Default to use AlternateSetting 0 for all interfaces.
1027 //
1028 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
1029 }
1030 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
1031 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
1032 ASSERT (Data != NULL);
1033 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
1034 ASSERT (HubDesc->NumPorts <= 15);
1035 //
1036 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
1037 //
1038 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
1039 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
1040 //
1041 // Don't support multi-TT feature for super speed hub now.
1042 //
1043 MTT = 0;
1044 DEBUG ((EFI_D_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
1045 } else {
1046 MTT = 0;
1047 }
1048
1049 if (Xhc->HcCParams.Data.Csz == 0) {
1050 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1051 } else {
1052 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1053 }
1054 }
1055 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1056 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
1057 //
1058 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1059 //
1060 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1061 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1062 if (Xhc->HcCParams.Data.Csz == 0) {
1063 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1064 } else {
1065 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1066 }
1067 break;
1068 }
1069 }
1070 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1071 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
1072 //
1073 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1074 // Request->Value indicates AlterlateSetting to set
1075 // Request->Index indicates Interface to set
1076 //
1077 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
1078 if (Xhc->HcCParams.Data.Csz == 0) {
1079 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1080 } else {
1081 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1082 }
1083 }
1084 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1085 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
1086 ASSERT (Data != NULL);
1087 //
1088 // Hook Get_Status request from UsbBus to keep track of the port status change.
1089 //
1090 State = *(UINT32 *)Data;
1091 PortStatus.PortStatus = 0;
1092 PortStatus.PortChangeStatus = 0;
1093
1094 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1095 //
1096 // For super speed hub, its bit10~12 presents the attached device speed.
1097 //
1098 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1099 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1100 }
1101 } else {
1102 //
1103 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1104 //
1105 if (XHC_BIT_IS_SET (State, BIT9)) {
1106 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1107 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1108 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1109 }
1110 }
1111
1112 //
1113 // Convert the XHCI port/port change state to UEFI status
1114 //
1115 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1116 for (Index = 0; Index < MapSize; Index++) {
1117 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1118 PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1119 }
1120 }
1121
1122 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1123 for (Index = 0; Index < MapSize; Index++) {
1124 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1125 PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1126 }
1127 }
1128
1129 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1130
1131 for (Index = 0; Index < MapSize; Index++) {
1132 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1133 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1134 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1135 ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
1136 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1137 ClearPortRequest.Index = Request->Index;
1138 ClearPortRequest.Length = 0;
1139
1140 XhcControlTransfer (
1141 This,
1142 DeviceAddress,
1143 DeviceSpeed,
1144 MaximumPacketLength,
1145 &ClearPortRequest,
1146 EfiUsbNoData,
1147 NULL,
1148 &Len,
1149 Timeout,
1150 Translator,
1151 TransferResult
1152 );
1153 }
1154 }
1155
1156 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1157
1158 *(UINT32 *)Data = *(UINT32*)&PortStatus;
1159 }
1160
1161 ON_EXIT:
1162 if (EFI_ERROR (Status)) {
1163 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1164 }
1165
1166 gBS->RestoreTPL (OldTpl);
1167
1168 return Status;
1169 }
1170
1171
1172 /**
1173 Submits bulk transfer to a bulk endpoint of a USB device.
1174
1175 @param This This EFI_USB2_HC_PROTOCOL instance.
1176 @param DeviceAddress Target device address.
1177 @param EndPointAddress Endpoint number and its direction in bit 7.
1178 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1179 transfer.
1180 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1181 sending or receiving.
1182 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1183 @param Data Array of pointers to the buffers of data to transmit
1184 from or receive into.
1185 @param DataLength The lenght of the data buffer.
1186 @param DataToggle On input, the initial data toggle for the transfer;
1187 On output, it is updated to to next data toggle to
1188 use of the subsequent bulk transfer.
1189 @param Timeout Indicates the maximum time, in millisecond, which
1190 the transfer is allowed to complete.
1191 @param Translator A pointr to the transaction translator data.
1192 @param TransferResult A pointer to the detailed result information of the
1193 bulk transfer.
1194
1195 @retval EFI_SUCCESS The transfer was completed successfully.
1196 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1197 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1198 @retval EFI_TIMEOUT The transfer failed due to timeout.
1199 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1200
1201 **/
1202 EFI_STATUS
1203 EFIAPI
1204 XhcBulkTransfer (
1205 IN EFI_USB2_HC_PROTOCOL *This,
1206 IN UINT8 DeviceAddress,
1207 IN UINT8 EndPointAddress,
1208 IN UINT8 DeviceSpeed,
1209 IN UINTN MaximumPacketLength,
1210 IN UINT8 DataBuffersNumber,
1211 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1212 IN OUT UINTN *DataLength,
1213 IN OUT UINT8 *DataToggle,
1214 IN UINTN Timeout,
1215 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1216 OUT UINT32 *TransferResult
1217 )
1218 {
1219 USB_XHCI_INSTANCE *Xhc;
1220 UINT8 SlotId;
1221 EFI_STATUS Status;
1222 EFI_TPL OldTpl;
1223
1224 //
1225 // Validate the parameters
1226 //
1227 if ((DataLength == NULL) || (*DataLength == 0) ||
1228 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
1229 return EFI_INVALID_PARAMETER;
1230 }
1231
1232 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1233 return EFI_INVALID_PARAMETER;
1234 }
1235
1236 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1237 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1238 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1239 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
1240 return EFI_INVALID_PARAMETER;
1241 }
1242
1243 OldTpl = gBS->RaiseTPL (XHC_TPL);
1244
1245 Xhc = XHC_FROM_THIS (This);
1246
1247 *TransferResult = EFI_USB_ERR_SYSTEM;
1248 Status = EFI_DEVICE_ERROR;
1249
1250 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1251 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: HC is halted\n"));
1252 goto ON_EXIT;
1253 }
1254
1255 //
1256 // Check if the device is still enabled before every transaction.
1257 //
1258 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1259 if (SlotId == 0) {
1260 goto ON_EXIT;
1261 }
1262
1263 //
1264 // Create a new URB, insert it into the asynchronous
1265 // schedule list, then poll the execution status.
1266 //
1267 Status = XhcTransfer (
1268 Xhc,
1269 DeviceAddress,
1270 EndPointAddress,
1271 DeviceSpeed,
1272 MaximumPacketLength,
1273 XHC_BULK_TRANSFER,
1274 NULL,
1275 Data[0],
1276 DataLength,
1277 Timeout,
1278 TransferResult
1279 );
1280
1281 ON_EXIT:
1282 if (EFI_ERROR (Status)) {
1283 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1284 }
1285 gBS->RestoreTPL (OldTpl);
1286
1287 return Status;
1288 }
1289
1290 /**
1291 Submits an asynchronous interrupt transfer to an
1292 interrupt endpoint of a USB device.
1293
1294 @param This This EFI_USB2_HC_PROTOCOL instance.
1295 @param DeviceAddress Target device address.
1296 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1297 @param DeviceSpeed Indicates device speed.
1298 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1299 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1300 transfer If FALSE, to remove the specified
1301 asynchronous interrupt.
1302 @param DataToggle On input, the initial data toggle to use; on output,
1303 it is updated to indicate the next data toggle.
1304 @param PollingInterval The he interval, in milliseconds, that the transfer
1305 is polled.
1306 @param DataLength The length of data to receive at the rate specified
1307 by PollingInterval.
1308 @param Translator Transaction translator to use.
1309 @param CallBackFunction Function to call at the rate specified by
1310 PollingInterval.
1311 @param Context Context to CallBackFunction.
1312
1313 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1314 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1315 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1316 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1317
1318 **/
1319 EFI_STATUS
1320 EFIAPI
1321 XhcAsyncInterruptTransfer (
1322 IN EFI_USB2_HC_PROTOCOL *This,
1323 IN UINT8 DeviceAddress,
1324 IN UINT8 EndPointAddress,
1325 IN UINT8 DeviceSpeed,
1326 IN UINTN MaximumPacketLength,
1327 IN BOOLEAN IsNewTransfer,
1328 IN OUT UINT8 *DataToggle,
1329 IN UINTN PollingInterval,
1330 IN UINTN DataLength,
1331 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1332 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1333 IN VOID *Context OPTIONAL
1334 )
1335 {
1336 USB_XHCI_INSTANCE *Xhc;
1337 URB *Urb;
1338 EFI_STATUS Status;
1339 UINT8 SlotId;
1340 UINT8 Index;
1341 UINT8 *Data;
1342 EFI_TPL OldTpl;
1343
1344 //
1345 // Validate parameters
1346 //
1347 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1348 return EFI_INVALID_PARAMETER;
1349 }
1350
1351 if (IsNewTransfer) {
1352 if (DataLength == 0) {
1353 return EFI_INVALID_PARAMETER;
1354 }
1355
1356 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1357 return EFI_INVALID_PARAMETER;
1358 }
1359
1360 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1361 return EFI_INVALID_PARAMETER;
1362 }
1363 }
1364
1365 OldTpl = gBS->RaiseTPL (XHC_TPL);
1366
1367 Xhc = XHC_FROM_THIS (This);
1368
1369 //
1370 // Delete Async interrupt transfer request.
1371 //
1372 if (!IsNewTransfer) {
1373 //
1374 // The delete request may happen after device is detached.
1375 //
1376 for (Index = 0; Index < 255; Index++) {
1377 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1378 break;
1379 }
1380 }
1381
1382 if (Index == 255) {
1383 Status = EFI_INVALID_PARAMETER;
1384 goto ON_EXIT;
1385 }
1386
1387 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1388 DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1389 goto ON_EXIT;
1390 }
1391
1392 Status = EFI_SUCCESS;
1393
1394 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1395 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1396 Status = EFI_DEVICE_ERROR;
1397 goto ON_EXIT;
1398 }
1399
1400 //
1401 // Check if the device is still enabled before every transaction.
1402 //
1403 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1404 if (SlotId == 0) {
1405 goto ON_EXIT;
1406 }
1407
1408 Data = AllocateZeroPool (DataLength);
1409
1410 if (Data == NULL) {
1411 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to allocate buffer\n"));
1412 Status = EFI_OUT_OF_RESOURCES;
1413 goto ON_EXIT;
1414 }
1415
1416 Urb = XhcCreateUrb (
1417 Xhc,
1418 DeviceAddress,
1419 EndPointAddress,
1420 DeviceSpeed,
1421 MaximumPacketLength,
1422 XHC_INT_TRANSFER_ASYNC,
1423 NULL,
1424 Data,
1425 DataLength,
1426 CallBackFunction,
1427 Context
1428 );
1429
1430 if (Urb == NULL) {
1431 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to create URB\n"));
1432 FreePool (Data);
1433 Status = EFI_OUT_OF_RESOURCES;
1434 goto ON_EXIT;
1435 }
1436
1437 InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList);
1438 //
1439 // Ring the doorbell
1440 //
1441 Status = RingIntTransferDoorBell (Xhc, Urb);
1442
1443 ON_EXIT:
1444 Xhc->PciIo->Flush (Xhc->PciIo);
1445 gBS->RestoreTPL (OldTpl);
1446
1447 return Status;
1448 }
1449
1450
1451 /**
1452 Submits synchronous interrupt transfer to an interrupt endpoint
1453 of a USB device.
1454
1455 @param This This EFI_USB2_HC_PROTOCOL instance.
1456 @param DeviceAddress Target device address.
1457 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1458 @param DeviceSpeed Indicates device speed.
1459 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1460 of sending or receiving.
1461 @param Data Buffer of data that will be transmitted to USB
1462 device or received from USB device.
1463 @param DataLength On input, the size, in bytes, of the data buffer; On
1464 output, the number of bytes transferred.
1465 @param DataToggle On input, the initial data toggle to use; on output,
1466 it is updated to indicate the next data toggle.
1467 @param Timeout Maximum time, in second, to complete.
1468 @param Translator Transaction translator to use.
1469 @param TransferResult Variable to receive the transfer result.
1470
1471 @return EFI_SUCCESS The transfer was completed successfully.
1472 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1473 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1474 @return EFI_TIMEOUT The transfer failed due to timeout.
1475 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1476
1477 **/
1478 EFI_STATUS
1479 EFIAPI
1480 XhcSyncInterruptTransfer (
1481 IN EFI_USB2_HC_PROTOCOL *This,
1482 IN UINT8 DeviceAddress,
1483 IN UINT8 EndPointAddress,
1484 IN UINT8 DeviceSpeed,
1485 IN UINTN MaximumPacketLength,
1486 IN OUT VOID *Data,
1487 IN OUT UINTN *DataLength,
1488 IN OUT UINT8 *DataToggle,
1489 IN UINTN Timeout,
1490 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1491 OUT UINT32 *TransferResult
1492 )
1493 {
1494 USB_XHCI_INSTANCE *Xhc;
1495 UINT8 SlotId;
1496 EFI_STATUS Status;
1497 EFI_TPL OldTpl;
1498
1499 //
1500 // Validates parameters
1501 //
1502 if ((DataLength == NULL) || (*DataLength == 0) ||
1503 (Data == NULL) || (TransferResult == NULL)) {
1504 return EFI_INVALID_PARAMETER;
1505 }
1506
1507 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1508 return EFI_INVALID_PARAMETER;
1509 }
1510
1511 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1512 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1513 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
1514 return EFI_INVALID_PARAMETER;
1515 }
1516
1517 OldTpl = gBS->RaiseTPL (XHC_TPL);
1518
1519 Xhc = XHC_FROM_THIS (This);
1520
1521 *TransferResult = EFI_USB_ERR_SYSTEM;
1522 Status = EFI_DEVICE_ERROR;
1523
1524 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1525 DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1526 goto ON_EXIT;
1527 }
1528
1529 //
1530 // Check if the device is still enabled before every transaction.
1531 //
1532 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1533 if (SlotId == 0) {
1534 goto ON_EXIT;
1535 }
1536
1537 Status = XhcTransfer (
1538 Xhc,
1539 DeviceAddress,
1540 EndPointAddress,
1541 DeviceSpeed,
1542 MaximumPacketLength,
1543 XHC_INT_TRANSFER_SYNC,
1544 NULL,
1545 Data,
1546 DataLength,
1547 Timeout,
1548 TransferResult
1549 );
1550
1551 ON_EXIT:
1552 if (EFI_ERROR (Status)) {
1553 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1554 }
1555 gBS->RestoreTPL (OldTpl);
1556
1557 return Status;
1558 }
1559
1560
1561 /**
1562 Submits isochronous transfer to a target USB device.
1563
1564 @param This This EFI_USB2_HC_PROTOCOL instance.
1565 @param DeviceAddress Target device address.
1566 @param EndPointAddress End point address with its direction.
1567 @param DeviceSpeed Device speed, Low speed device doesn't support this
1568 type.
1569 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1570 sending or receiving.
1571 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1572 @param Data Array of pointers to the buffers of data that will
1573 be transmitted to USB device or received from USB
1574 device.
1575 @param DataLength The size, in bytes, of the data buffer.
1576 @param Translator Transaction translator to use.
1577 @param TransferResult Variable to receive the transfer result.
1578
1579 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1580
1581 **/
1582 EFI_STATUS
1583 EFIAPI
1584 XhcIsochronousTransfer (
1585 IN EFI_USB2_HC_PROTOCOL *This,
1586 IN UINT8 DeviceAddress,
1587 IN UINT8 EndPointAddress,
1588 IN UINT8 DeviceSpeed,
1589 IN UINTN MaximumPacketLength,
1590 IN UINT8 DataBuffersNumber,
1591 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1592 IN UINTN DataLength,
1593 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1594 OUT UINT32 *TransferResult
1595 )
1596 {
1597 return EFI_UNSUPPORTED;
1598 }
1599
1600
1601 /**
1602 Submits Async isochronous transfer to a target USB device.
1603
1604 @param This This EFI_USB2_HC_PROTOCOL instance.
1605 @param DeviceAddress Target device address.
1606 @param EndPointAddress End point address with its direction.
1607 @param DeviceSpeed Device speed, Low speed device doesn't support this
1608 type.
1609 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1610 sending or receiving.
1611 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1612 @param Data Array of pointers to the buffers of data that will
1613 be transmitted to USB device or received from USB
1614 device.
1615 @param DataLength The size, in bytes, of the data buffer.
1616 @param Translator Transaction translator to use.
1617 @param IsochronousCallBack Function to be called when the transfer complete.
1618 @param Context Context passed to the call back function as
1619 parameter.
1620
1621 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1622
1623 **/
1624 EFI_STATUS
1625 EFIAPI
1626 XhcAsyncIsochronousTransfer (
1627 IN EFI_USB2_HC_PROTOCOL *This,
1628 IN UINT8 DeviceAddress,
1629 IN UINT8 EndPointAddress,
1630 IN UINT8 DeviceSpeed,
1631 IN UINTN MaximumPacketLength,
1632 IN UINT8 DataBuffersNumber,
1633 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1634 IN UINTN DataLength,
1635 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1636 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1637 IN VOID *Context
1638 )
1639 {
1640 return EFI_UNSUPPORTED;
1641 }
1642
1643 /**
1644 Entry point for EFI drivers.
1645
1646 @param ImageHandle EFI_HANDLE.
1647 @param SystemTable EFI_SYSTEM_TABLE.
1648
1649 @retval EFI_SUCCESS Success.
1650 @retval Others Fail.
1651
1652 **/
1653 EFI_STATUS
1654 EFIAPI
1655 XhcDriverEntryPoint (
1656 IN EFI_HANDLE ImageHandle,
1657 IN EFI_SYSTEM_TABLE *SystemTable
1658 )
1659 {
1660 return EfiLibInstallDriverBindingComponentName2 (
1661 ImageHandle,
1662 SystemTable,
1663 &gXhciDriverBinding,
1664 ImageHandle,
1665 &gXhciComponentName,
1666 &gXhciComponentName2
1667 );
1668 }
1669
1670
1671 /**
1672 Test to see if this driver supports ControllerHandle. Any
1673 ControllerHandle that has Usb2HcProtocol installed will
1674 be supported.
1675
1676 @param This Protocol instance pointer.
1677 @param Controller Handle of device to test.
1678 @param RemainingDevicePath Not used.
1679
1680 @return EFI_SUCCESS This driver supports this device.
1681 @return EFI_UNSUPPORTED This driver does not support this device.
1682
1683 **/
1684 EFI_STATUS
1685 EFIAPI
1686 XhcDriverBindingSupported (
1687 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1688 IN EFI_HANDLE Controller,
1689 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1690 )
1691 {
1692 EFI_STATUS Status;
1693 EFI_PCI_IO_PROTOCOL *PciIo;
1694 USB_CLASSC UsbClassCReg;
1695
1696 //
1697 // Test whether there is PCI IO Protocol attached on the controller handle.
1698 //
1699 Status = gBS->OpenProtocol (
1700 Controller,
1701 &gEfiPciIoProtocolGuid,
1702 (VOID **) &PciIo,
1703 This->DriverBindingHandle,
1704 Controller,
1705 EFI_OPEN_PROTOCOL_BY_DRIVER
1706 );
1707
1708 if (EFI_ERROR (Status)) {
1709 return EFI_UNSUPPORTED;
1710 }
1711
1712 Status = PciIo->Pci.Read (
1713 PciIo,
1714 EfiPciIoWidthUint8,
1715 PCI_CLASSCODE_OFFSET,
1716 sizeof (USB_CLASSC) / sizeof (UINT8),
1717 &UsbClassCReg
1718 );
1719
1720 if (EFI_ERROR (Status)) {
1721 Status = EFI_UNSUPPORTED;
1722 goto ON_EXIT;
1723 }
1724
1725 //
1726 // Test whether the controller belongs to Xhci type
1727 //
1728 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1729 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1730 (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
1731 Status = EFI_UNSUPPORTED;
1732 }
1733
1734 ON_EXIT:
1735 gBS->CloseProtocol (
1736 Controller,
1737 &gEfiPciIoProtocolGuid,
1738 This->DriverBindingHandle,
1739 Controller
1740 );
1741
1742 return Status;
1743 }
1744
1745 /**
1746 Create and initialize a USB_XHCI_INSTANCE structure.
1747
1748 @param PciIo The PciIo on this device.
1749 @param DevicePath The device path of host controller.
1750 @param OriginalPciAttributes Original PCI attributes.
1751
1752 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1753 otherwise NULL.
1754
1755 **/
1756 USB_XHCI_INSTANCE*
1757 XhcCreateUsbHc (
1758 IN EFI_PCI_IO_PROTOCOL *PciIo,
1759 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1760 IN UINT64 OriginalPciAttributes
1761 )
1762 {
1763 USB_XHCI_INSTANCE *Xhc;
1764 EFI_STATUS Status;
1765 UINT32 PageSize;
1766 UINT16 ExtCapReg;
1767
1768 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1769
1770 if (Xhc == NULL) {
1771 return NULL;
1772 }
1773
1774 //
1775 // Initialize private data structure
1776 //
1777 Xhc->Signature = XHCI_INSTANCE_SIG;
1778 Xhc->PciIo = PciIo;
1779 Xhc->DevicePath = DevicePath;
1780 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1781 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1782
1783 InitializeListHead (&Xhc->AsyncIntTransfers);
1784
1785 //
1786 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1787 //
1788 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1789 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1790 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1791 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1792 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1793 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1794
1795 //
1796 // This PageSize field defines the page size supported by the xHC implementation.
1797 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1798 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1799 //
1800 PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
1801 Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
1802
1803 ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
1804 Xhc->ExtCapRegBase = ExtCapReg << 2;
1805 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1806 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1807
1808 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1809 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1810 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1811 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1812 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1813 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1814 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1815 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1816
1817 //
1818 // Create AsyncRequest Polling Timer
1819 //
1820 Status = gBS->CreateEvent (
1821 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1822 TPL_NOTIFY,
1823 XhcMonitorAsyncRequests,
1824 Xhc,
1825 &Xhc->PollTimer
1826 );
1827
1828 if (EFI_ERROR (Status)) {
1829 goto ON_ERROR;
1830 }
1831
1832 return Xhc;
1833
1834 ON_ERROR:
1835 FreePool (Xhc);
1836 return NULL;
1837 }
1838
1839 /**
1840 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1841
1842 @param Event Pointer to this event
1843 @param Context Event handler private data
1844
1845 **/
1846 VOID
1847 EFIAPI
1848 XhcExitBootService (
1849 EFI_EVENT Event,
1850 VOID *Context
1851 )
1852
1853 {
1854 USB_XHCI_INSTANCE *Xhc;
1855 EFI_PCI_IO_PROTOCOL *PciIo;
1856
1857 Xhc = (USB_XHCI_INSTANCE*) Context;
1858 PciIo = Xhc->PciIo;
1859
1860 //
1861 // Stop AsyncRequest Polling timer then stop the XHCI driver
1862 // and uninstall the XHCI protocl.
1863 //
1864 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1865 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1866
1867 if (Xhc->PollTimer != NULL) {
1868 gBS->CloseEvent (Xhc->PollTimer);
1869 }
1870
1871 XhcClearBiosOwnership (Xhc);
1872
1873 //
1874 // Restore original PCI attributes
1875 //
1876 PciIo->Attributes (
1877 PciIo,
1878 EfiPciIoAttributeOperationSet,
1879 Xhc->OriginalPciAttributes,
1880 NULL
1881 );
1882 }
1883
1884 /**
1885 Starting the Usb XHCI Driver.
1886
1887 @param This Protocol instance pointer.
1888 @param Controller Handle of device to test.
1889 @param RemainingDevicePath Not used.
1890
1891 @return EFI_SUCCESS supports this device.
1892 @return EFI_UNSUPPORTED do not support this device.
1893 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1894 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1895
1896 **/
1897 EFI_STATUS
1898 EFIAPI
1899 XhcDriverBindingStart (
1900 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1901 IN EFI_HANDLE Controller,
1902 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1903 )
1904 {
1905 EFI_STATUS Status;
1906 EFI_PCI_IO_PROTOCOL *PciIo;
1907 UINT64 Supports;
1908 UINT64 OriginalPciAttributes;
1909 BOOLEAN PciAttributesSaved;
1910 USB_XHCI_INSTANCE *Xhc;
1911 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1912
1913 //
1914 // Open the PciIo Protocol, then enable the USB host controller
1915 //
1916 Status = gBS->OpenProtocol (
1917 Controller,
1918 &gEfiPciIoProtocolGuid,
1919 (VOID **) &PciIo,
1920 This->DriverBindingHandle,
1921 Controller,
1922 EFI_OPEN_PROTOCOL_BY_DRIVER
1923 );
1924
1925 if (EFI_ERROR (Status)) {
1926 return Status;
1927 }
1928
1929 //
1930 // Open Device Path Protocol for on USB host controller
1931 //
1932 HcDevicePath = NULL;
1933 Status = gBS->OpenProtocol (
1934 Controller,
1935 &gEfiDevicePathProtocolGuid,
1936 (VOID **) &HcDevicePath,
1937 This->DriverBindingHandle,
1938 Controller,
1939 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1940 );
1941
1942 PciAttributesSaved = FALSE;
1943 //
1944 // Save original PCI attributes
1945 //
1946 Status = PciIo->Attributes (
1947 PciIo,
1948 EfiPciIoAttributeOperationGet,
1949 0,
1950 &OriginalPciAttributes
1951 );
1952
1953 if (EFI_ERROR (Status)) {
1954 goto CLOSE_PCIIO;
1955 }
1956 PciAttributesSaved = TRUE;
1957
1958 Status = PciIo->Attributes (
1959 PciIo,
1960 EfiPciIoAttributeOperationSupported,
1961 0,
1962 &Supports
1963 );
1964 if (!EFI_ERROR (Status)) {
1965 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
1966 Status = PciIo->Attributes (
1967 PciIo,
1968 EfiPciIoAttributeOperationEnable,
1969 Supports,
1970 NULL
1971 );
1972 }
1973
1974 if (EFI_ERROR (Status)) {
1975 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
1976 goto CLOSE_PCIIO;
1977 }
1978
1979 //
1980 // Create then install USB2_HC_PROTOCOL
1981 //
1982 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
1983
1984 if (Xhc == NULL) {
1985 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
1986 return EFI_OUT_OF_RESOURCES;
1987 }
1988
1989 //
1990 // Enable 64-bit DMA support in the PCI layer if this controller
1991 // supports it.
1992 //
1993 if (Xhc->HcCParams.Data.Ac64 != 0) {
1994 Status = PciIo->Attributes (
1995 PciIo,
1996 EfiPciIoAttributeOperationEnable,
1997 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
1998 NULL
1999 );
2000 if (!EFI_ERROR (Status)) {
2001 Xhc->Support64BitDma = TRUE;
2002 } else {
2003 DEBUG ((EFI_D_WARN,
2004 "%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
2005 __FUNCTION__, Controller, Status));
2006 }
2007 }
2008
2009 XhcSetBiosOwnership (Xhc);
2010
2011 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
2012 ASSERT (XhcIsHalt (Xhc));
2013
2014 //
2015 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2016 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2017 //
2018 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2019
2020 //
2021 // Initialize the schedule
2022 //
2023 XhcInitSched (Xhc);
2024
2025 //
2026 // Start the Host Controller
2027 //
2028 XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
2029
2030 //
2031 // Start the asynchronous interrupt monitor
2032 //
2033 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2034 if (EFI_ERROR (Status)) {
2035 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2036 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2037 goto FREE_POOL;
2038 }
2039
2040 //
2041 // Create event to stop the HC when exit boot service.
2042 //
2043 Status = gBS->CreateEventEx (
2044 EVT_NOTIFY_SIGNAL,
2045 TPL_NOTIFY,
2046 XhcExitBootService,
2047 Xhc,
2048 &gEfiEventExitBootServicesGuid,
2049 &Xhc->ExitBootServiceEvent
2050 );
2051 if (EFI_ERROR (Status)) {
2052 goto FREE_POOL;
2053 }
2054
2055 //
2056 // Install the component name protocol, don't fail the start
2057 // because of something for display.
2058 //
2059 AddUnicodeString2 (
2060 "eng",
2061 gXhciComponentName.SupportedLanguages,
2062 &Xhc->ControllerNameTable,
2063 L"eXtensible Host Controller (USB 3.0)",
2064 TRUE
2065 );
2066 AddUnicodeString2 (
2067 "en",
2068 gXhciComponentName2.SupportedLanguages,
2069 &Xhc->ControllerNameTable,
2070 L"eXtensible Host Controller (USB 3.0)",
2071 FALSE
2072 );
2073
2074 Status = gBS->InstallProtocolInterface (
2075 &Controller,
2076 &gEfiUsb2HcProtocolGuid,
2077 EFI_NATIVE_INTERFACE,
2078 &Xhc->Usb2Hc
2079 );
2080 if (EFI_ERROR (Status)) {
2081 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2082 goto FREE_POOL;
2083 }
2084
2085 DEBUG ((EFI_D_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2086 return EFI_SUCCESS;
2087
2088 FREE_POOL:
2089 gBS->CloseEvent (Xhc->PollTimer);
2090 XhcFreeSched (Xhc);
2091 FreePool (Xhc);
2092
2093 CLOSE_PCIIO:
2094 if (PciAttributesSaved) {
2095 //
2096 // Restore original PCI attributes
2097 //
2098 PciIo->Attributes (
2099 PciIo,
2100 EfiPciIoAttributeOperationSet,
2101 OriginalPciAttributes,
2102 NULL
2103 );
2104 }
2105
2106 gBS->CloseProtocol (
2107 Controller,
2108 &gEfiPciIoProtocolGuid,
2109 This->DriverBindingHandle,
2110 Controller
2111 );
2112
2113 return Status;
2114 }
2115
2116
2117 /**
2118 Stop this driver on ControllerHandle. Support stopping any child handles
2119 created by this driver.
2120
2121 @param This Protocol instance pointer.
2122 @param Controller Handle of device to stop driver on.
2123 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2124 @param ChildHandleBuffer List of handles for the children we need to stop.
2125
2126 @return EFI_SUCCESS Success.
2127 @return EFI_DEVICE_ERROR Fail.
2128
2129 **/
2130 EFI_STATUS
2131 EFIAPI
2132 XhcDriverBindingStop (
2133 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2134 IN EFI_HANDLE Controller,
2135 IN UINTN NumberOfChildren,
2136 IN EFI_HANDLE *ChildHandleBuffer
2137 )
2138 {
2139 EFI_STATUS Status;
2140 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2141 EFI_PCI_IO_PROTOCOL *PciIo;
2142 USB_XHCI_INSTANCE *Xhc;
2143 UINT8 Index;
2144
2145 //
2146 // Test whether the Controller handler passed in is a valid
2147 // Usb controller handle that should be supported, if not,
2148 // return the error status directly
2149 //
2150 Status = gBS->OpenProtocol (
2151 Controller,
2152 &gEfiUsb2HcProtocolGuid,
2153 (VOID **) &Usb2Hc,
2154 This->DriverBindingHandle,
2155 Controller,
2156 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2157 );
2158
2159 if (EFI_ERROR (Status)) {
2160 return Status;
2161 }
2162
2163 Status = gBS->UninstallProtocolInterface (
2164 Controller,
2165 &gEfiUsb2HcProtocolGuid,
2166 Usb2Hc
2167 );
2168
2169 if (EFI_ERROR (Status)) {
2170 return Status;
2171 }
2172
2173 Xhc = XHC_FROM_THIS (Usb2Hc);
2174 PciIo = Xhc->PciIo;
2175
2176 //
2177 // Stop AsyncRequest Polling timer then stop the XHCI driver
2178 // and uninstall the XHCI protocl.
2179 //
2180 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2181
2182 //
2183 // Disable the device slots occupied by these devices on its downstream ports.
2184 // Entry 0 is reserved.
2185 //
2186 for (Index = 0; Index < 255; Index++) {
2187 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2188 (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
2189 continue;
2190 }
2191 if (Xhc->HcCParams.Data.Csz == 0) {
2192 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2193 } else {
2194 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2195 }
2196 }
2197
2198 if (Xhc->PollTimer != NULL) {
2199 gBS->CloseEvent (Xhc->PollTimer);
2200 }
2201
2202 if (Xhc->ExitBootServiceEvent != NULL) {
2203 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2204 }
2205
2206 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2207 XhcClearBiosOwnership (Xhc);
2208 XhciDelAllAsyncIntTransfers (Xhc);
2209 XhcFreeSched (Xhc);
2210
2211 if (Xhc->ControllerNameTable) {
2212 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2213 }
2214
2215 //
2216 // Restore original PCI attributes
2217 //
2218 PciIo->Attributes (
2219 PciIo,
2220 EfiPciIoAttributeOperationSet,
2221 Xhc->OriginalPciAttributes,
2222 NULL
2223 );
2224
2225 gBS->CloseProtocol (
2226 Controller,
2227 &gEfiPciIoProtocolGuid,
2228 This->DriverBindingHandle,
2229 Controller
2230 );
2231
2232 FreePool (Xhc);
2233
2234 return EFI_SUCCESS;
2235 }
2236