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MdeModulePkg/XhciDxe: Add access xHCI Extended Capabilities Pointer
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c
1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "Xhci.h"
10
11 //
12 // Two arrays used to translate the XHCI port state (change)
13 // to the UEFI protocol's port state (change).
14 //
15 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
16 { XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
17 { XHC_PORTSC_PED, USB_PORT_STAT_ENABLE },
18 { XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
19 { XHC_PORTSC_RESET, USB_PORT_STAT_RESET }
20 };
21
22 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
23 { XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
24 { XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
25 { XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
26 { XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET }
27 };
28
29 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
30 { XHC_PORTSC_CSC, EfiUsbPortConnectChange },
31 { XHC_PORTSC_PEC, EfiUsbPortEnableChange },
32 { XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange },
33 { XHC_PORTSC_PRC, EfiUsbPortResetChange }
34 };
35
36 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
37 { XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION },
38 { XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE },
39 { XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT },
40 { XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET }
41 };
42
43 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
44 { XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION },
45 { XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE },
46 { XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT },
47 { XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET }
48 };
49
50 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
51 { XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange },
52 { XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange },
53 { XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange },
54 { XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange },
55 { XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange }
56 };
57
58 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
59 XhcDriverBindingSupported,
60 XhcDriverBindingStart,
61 XhcDriverBindingStop,
62 0x30,
63 NULL,
64 NULL
65 };
66
67 //
68 // Template for Xhci's Usb2 Host Controller Protocol Instance.
69 //
70 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
71 XhcGetCapability,
72 XhcReset,
73 XhcGetState,
74 XhcSetState,
75 XhcControlTransfer,
76 XhcBulkTransfer,
77 XhcAsyncInterruptTransfer,
78 XhcSyncInterruptTransfer,
79 XhcIsochronousTransfer,
80 XhcAsyncIsochronousTransfer,
81 XhcGetRootHubPortStatus,
82 XhcSetRootHubPortFeature,
83 XhcClearRootHubPortFeature,
84 0x3,
85 0x0
86 };
87
88 /**
89 Retrieves the capability of root hub ports.
90
91 @param This The EFI_USB2_HC_PROTOCOL instance.
92 @param MaxSpeed Max speed supported by the controller.
93 @param PortNumber Number of the root hub ports.
94 @param Is64BitCapable Whether the controller supports 64-bit memory
95 addressing.
96
97 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
98 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
99
100 **/
101 EFI_STATUS
102 EFIAPI
103 XhcGetCapability (
104 IN EFI_USB2_HC_PROTOCOL *This,
105 OUT UINT8 *MaxSpeed,
106 OUT UINT8 *PortNumber,
107 OUT UINT8 *Is64BitCapable
108 )
109 {
110 USB_XHCI_INSTANCE *Xhc;
111 EFI_TPL OldTpl;
112
113 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
114 return EFI_INVALID_PARAMETER;
115 }
116
117 OldTpl = gBS->RaiseTPL (XHC_TPL);
118
119 Xhc = XHC_FROM_THIS (This);
120 *MaxSpeed = EFI_USB_SPEED_SUPER;
121 *PortNumber = (UINT8)(Xhc->HcSParams1.Data.MaxPorts);
122 *Is64BitCapable = (UINT8)Xhc->Support64BitDma;
123 DEBUG ((DEBUG_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
124
125 gBS->RestoreTPL (OldTpl);
126
127 return EFI_SUCCESS;
128 }
129
130 /**
131 Provides software reset for the USB host controller.
132
133 @param This This EFI_USB2_HC_PROTOCOL instance.
134 @param Attributes A bit mask of the reset operation to perform.
135
136 @retval EFI_SUCCESS The reset operation succeeded.
137 @retval EFI_INVALID_PARAMETER Attributes is not valid.
138 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
139 not currently supported by the host controller.
140 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
141
142 **/
143 EFI_STATUS
144 EFIAPI
145 XhcReset (
146 IN EFI_USB2_HC_PROTOCOL *This,
147 IN UINT16 Attributes
148 )
149 {
150 USB_XHCI_INSTANCE *Xhc;
151 EFI_STATUS Status;
152 EFI_TPL OldTpl;
153
154 Xhc = XHC_FROM_THIS (This);
155
156 if (Xhc->DevicePath != NULL) {
157 //
158 // Report Status Code to indicate reset happens
159 //
160 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
161 EFI_PROGRESS_CODE,
162 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
163 Xhc->DevicePath
164 );
165 }
166
167 OldTpl = gBS->RaiseTPL (XHC_TPL);
168
169 switch (Attributes) {
170 case EFI_USB_HC_RESET_GLOBAL:
171 //
172 // Flow through, same behavior as Host Controller Reset
173 //
174 case EFI_USB_HC_RESET_HOST_CONTROLLER:
175 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
176 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0))
177 {
178 Status = EFI_SUCCESS;
179 goto ON_EXIT;
180 }
181
182 //
183 // Host Controller must be Halt when Reset it
184 //
185 if (!XhcIsHalt (Xhc)) {
186 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
187
188 if (EFI_ERROR (Status)) {
189 Status = EFI_DEVICE_ERROR;
190 goto ON_EXIT;
191 }
192 }
193
194 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
195 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
196
197 if (EFI_ERROR (Status)) {
198 goto ON_EXIT;
199 }
200
201 //
202 // Clean up the asynchronous transfers, currently only
203 // interrupt supports asynchronous operation.
204 //
205 XhciDelAllAsyncIntTransfers (Xhc);
206 XhcFreeSched (Xhc);
207
208 XhcInitSched (Xhc);
209 break;
210
211 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
212 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
213 Status = EFI_UNSUPPORTED;
214 break;
215
216 default:
217 Status = EFI_INVALID_PARAMETER;
218 }
219
220 ON_EXIT:
221 DEBUG ((DEBUG_INFO, "XhcReset: status %r\n", Status));
222 gBS->RestoreTPL (OldTpl);
223
224 return Status;
225 }
226
227 /**
228 Retrieve the current state of the USB host controller.
229
230 @param This This EFI_USB2_HC_PROTOCOL instance.
231 @param State Variable to return the current host controller
232 state.
233
234 @retval EFI_SUCCESS Host controller state was returned in State.
235 @retval EFI_INVALID_PARAMETER State is NULL.
236 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
237 retrieve the host controller's current state.
238
239 **/
240 EFI_STATUS
241 EFIAPI
242 XhcGetState (
243 IN EFI_USB2_HC_PROTOCOL *This,
244 OUT EFI_USB_HC_STATE *State
245 )
246 {
247 USB_XHCI_INSTANCE *Xhc;
248 EFI_TPL OldTpl;
249
250 if (State == NULL) {
251 return EFI_INVALID_PARAMETER;
252 }
253
254 OldTpl = gBS->RaiseTPL (XHC_TPL);
255
256 Xhc = XHC_FROM_THIS (This);
257
258 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
259 *State = EfiUsbHcStateHalt;
260 } else {
261 *State = EfiUsbHcStateOperational;
262 }
263
264 DEBUG ((DEBUG_INFO, "XhcGetState: current state %d\n", *State));
265 gBS->RestoreTPL (OldTpl);
266
267 return EFI_SUCCESS;
268 }
269
270 /**
271 Sets the USB host controller to a specific state.
272
273 @param This This EFI_USB2_HC_PROTOCOL instance.
274 @param State The state of the host controller that will be set.
275
276 @retval EFI_SUCCESS The USB host controller was successfully placed
277 in the state specified by State.
278 @retval EFI_INVALID_PARAMETER State is invalid.
279 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
280
281 **/
282 EFI_STATUS
283 EFIAPI
284 XhcSetState (
285 IN EFI_USB2_HC_PROTOCOL *This,
286 IN EFI_USB_HC_STATE State
287 )
288 {
289 USB_XHCI_INSTANCE *Xhc;
290 EFI_STATUS Status;
291 EFI_USB_HC_STATE CurState;
292 EFI_TPL OldTpl;
293
294 Status = XhcGetState (This, &CurState);
295
296 if (EFI_ERROR (Status)) {
297 return EFI_DEVICE_ERROR;
298 }
299
300 if (CurState == State) {
301 return EFI_SUCCESS;
302 }
303
304 OldTpl = gBS->RaiseTPL (XHC_TPL);
305
306 Xhc = XHC_FROM_THIS (This);
307
308 switch (State) {
309 case EfiUsbHcStateHalt:
310 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
311 break;
312
313 case EfiUsbHcStateOperational:
314 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
315 Status = EFI_DEVICE_ERROR;
316 break;
317 }
318
319 //
320 // Software must not write a one to this field unless the host controller
321 // is in the Halted state. Doing so will yield undefined results.
322 // refers to Spec[XHCI1.0-2.3.1]
323 //
324 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
325 Status = EFI_DEVICE_ERROR;
326 break;
327 }
328
329 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
330 break;
331
332 case EfiUsbHcStateSuspend:
333 Status = EFI_UNSUPPORTED;
334 break;
335
336 default:
337 Status = EFI_INVALID_PARAMETER;
338 }
339
340 DEBUG ((DEBUG_INFO, "XhcSetState: status %r\n", Status));
341 gBS->RestoreTPL (OldTpl);
342
343 return Status;
344 }
345
346 /**
347 Retrieves the current status of a USB root hub port.
348
349 @param This This EFI_USB2_HC_PROTOCOL instance.
350 @param PortNumber The root hub port to retrieve the state from.
351 This value is zero-based.
352 @param PortStatus Variable to receive the port state.
353
354 @retval EFI_SUCCESS The status of the USB root hub port specified.
355 by PortNumber was returned in PortStatus.
356 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
357 @retval EFI_DEVICE_ERROR Can't read register.
358
359 **/
360 EFI_STATUS
361 EFIAPI
362 XhcGetRootHubPortStatus (
363 IN EFI_USB2_HC_PROTOCOL *This,
364 IN UINT8 PortNumber,
365 OUT EFI_USB_PORT_STATUS *PortStatus
366 )
367 {
368 USB_XHCI_INSTANCE *Xhc;
369 UINT32 Offset;
370 UINT32 State;
371 UINT32 TotalPort;
372 UINTN Index;
373 UINTN MapSize;
374 EFI_STATUS Status;
375 USB_DEV_ROUTE ParentRouteChart;
376 EFI_TPL OldTpl;
377
378 if (PortStatus == NULL) {
379 return EFI_INVALID_PARAMETER;
380 }
381
382 OldTpl = gBS->RaiseTPL (XHC_TPL);
383
384 Xhc = XHC_FROM_THIS (This);
385 Status = EFI_SUCCESS;
386
387 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
388
389 if (PortNumber >= TotalPort) {
390 Status = EFI_INVALID_PARAMETER;
391 goto ON_EXIT;
392 }
393
394 Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
395 PortStatus->PortStatus = 0;
396 PortStatus->PortChangeStatus = 0;
397
398 State = XhcReadOpReg (Xhc, Offset);
399
400 //
401 // According to XHCI 1.1 spec November 2017,
402 // Section 7.2 xHCI Support Protocol Capability
403 //
404 PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10));
405 if (PortStatus->PortStatus == 0) {
406 //
407 // According to XHCI 1.1 spec November 2017,
408 // bit 10~13 of the root port status register identifies the speed of the attached device.
409 //
410 switch ((State & XHC_PORTSC_PS) >> 10) {
411 case 2:
412 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
413 break;
414
415 case 3:
416 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
417 break;
418
419 case 4:
420 case 5:
421 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
422 break;
423
424 default:
425 break;
426 }
427 }
428
429 //
430 // Convert the XHCI port/port change state to UEFI status
431 //
432 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
433
434 for (Index = 0; Index < MapSize; Index++) {
435 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
436 PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
437 }
438 }
439
440 //
441 // Bit5~8 reflects its current link state.
442 //
443 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
444 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
445 }
446
447 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
448
449 for (Index = 0; Index < MapSize; Index++) {
450 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
451 PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
452 }
453 }
454
455 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
456
457 for (Index = 0; Index < MapSize; Index++) {
458 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
459 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
460 }
461 }
462
463 //
464 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
465 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
466 //
467 ParentRouteChart.Dword = 0;
468 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
469
470 ON_EXIT:
471 gBS->RestoreTPL (OldTpl);
472 return Status;
473 }
474
475 /**
476 Sets a feature for the specified root hub port.
477
478 @param This This EFI_USB2_HC_PROTOCOL instance.
479 @param PortNumber Root hub port to set.
480 @param PortFeature Feature to set.
481
482 @retval EFI_SUCCESS The feature specified by PortFeature was set.
483 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
484 @retval EFI_DEVICE_ERROR Can't read register.
485
486 **/
487 EFI_STATUS
488 EFIAPI
489 XhcSetRootHubPortFeature (
490 IN EFI_USB2_HC_PROTOCOL *This,
491 IN UINT8 PortNumber,
492 IN EFI_USB_PORT_FEATURE PortFeature
493 )
494 {
495 USB_XHCI_INSTANCE *Xhc;
496 UINT32 Offset;
497 UINT32 State;
498 UINT32 TotalPort;
499 EFI_STATUS Status;
500 EFI_TPL OldTpl;
501
502 OldTpl = gBS->RaiseTPL (XHC_TPL);
503
504 Xhc = XHC_FROM_THIS (This);
505 Status = EFI_SUCCESS;
506
507 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
508
509 if (PortNumber >= TotalPort) {
510 Status = EFI_INVALID_PARAMETER;
511 goto ON_EXIT;
512 }
513
514 Offset = (UINT32)(XHC_PORTSC_OFFSET + (0x10 * PortNumber));
515 State = XhcReadOpReg (Xhc, Offset);
516
517 //
518 // Mask off the port status change bits, these bits are
519 // write clean bit
520 //
521 State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
522
523 switch (PortFeature) {
524 case EfiUsbPortEnable:
525 //
526 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
527 // A port may be disabled by software writing a '1' to this flag.
528 //
529 Status = EFI_SUCCESS;
530 break;
531
532 case EfiUsbPortSuspend:
533 State |= XHC_PORTSC_LWS;
534 XhcWriteOpReg (Xhc, Offset, State);
535 State &= ~XHC_PORTSC_PLS;
536 State |= (3 << 5);
537 XhcWriteOpReg (Xhc, Offset, State);
538 break;
539
540 case EfiUsbPortReset:
541 DEBUG ((DEBUG_INFO, "XhcUsbPortReset!\n"));
542 //
543 // Make sure Host Controller not halt before reset it
544 //
545 if (XhcIsHalt (Xhc)) {
546 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
547
548 if (EFI_ERROR (Status)) {
549 DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
550 break;
551 }
552 }
553
554 //
555 // 4.3.1 Resetting a Root Hub Port
556 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
557 //
558 State |= XHC_PORTSC_RESET;
559 XhcWriteOpReg (Xhc, Offset, State);
560 XhcWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
561 break;
562
563 case EfiUsbPortPower:
564 //
565 // Not supported, ignore the operation
566 //
567 Status = EFI_SUCCESS;
568 break;
569
570 case EfiUsbPortOwner:
571 //
572 // XHCI root hub port don't has the owner bit, ignore the operation
573 //
574 Status = EFI_SUCCESS;
575 break;
576
577 default:
578 Status = EFI_INVALID_PARAMETER;
579 }
580
581 ON_EXIT:
582 DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
583 gBS->RestoreTPL (OldTpl);
584
585 return Status;
586 }
587
588 /**
589 Clears a feature for the specified root hub port.
590
591 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
592 @param PortNumber Specifies the root hub port whose feature is
593 requested to be cleared.
594 @param PortFeature Indicates the feature selector associated with the
595 feature clear request.
596
597 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
598 for the USB root hub port specified by PortNumber.
599 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
600 @retval EFI_DEVICE_ERROR Can't read register.
601
602 **/
603 EFI_STATUS
604 EFIAPI
605 XhcClearRootHubPortFeature (
606 IN EFI_USB2_HC_PROTOCOL *This,
607 IN UINT8 PortNumber,
608 IN EFI_USB_PORT_FEATURE PortFeature
609 )
610 {
611 USB_XHCI_INSTANCE *Xhc;
612 UINT32 Offset;
613 UINT32 State;
614 UINT32 TotalPort;
615 EFI_STATUS Status;
616 EFI_TPL OldTpl;
617
618 OldTpl = gBS->RaiseTPL (XHC_TPL);
619
620 Xhc = XHC_FROM_THIS (This);
621 Status = EFI_SUCCESS;
622
623 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
624
625 if (PortNumber >= TotalPort) {
626 Status = EFI_INVALID_PARAMETER;
627 goto ON_EXIT;
628 }
629
630 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
631
632 //
633 // Mask off the port status change bits, these bits are
634 // write clean bit
635 //
636 State = XhcReadOpReg (Xhc, Offset);
637 State &= ~(BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
638
639 switch (PortFeature) {
640 case EfiUsbPortEnable:
641 //
642 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
643 // A port may be disabled by software writing a '1' to this flag.
644 //
645 State |= XHC_PORTSC_PED;
646 State &= ~XHC_PORTSC_RESET;
647 XhcWriteOpReg (Xhc, Offset, State);
648 break;
649
650 case EfiUsbPortSuspend:
651 State |= XHC_PORTSC_LWS;
652 XhcWriteOpReg (Xhc, Offset, State);
653 State &= ~XHC_PORTSC_PLS;
654 XhcWriteOpReg (Xhc, Offset, State);
655 break;
656
657 case EfiUsbPortReset:
658 //
659 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
660 // Register bits indicate status when read, a clear bit may be set by
661 // writing a '1'. Writing a '0' to RW1S bits has no effect.
662 //
663 break;
664
665 case EfiUsbPortOwner:
666 //
667 // XHCI root hub port don't has the owner bit, ignore the operation
668 //
669 break;
670
671 case EfiUsbPortConnectChange:
672 //
673 // Clear connect status change
674 //
675 State |= XHC_PORTSC_CSC;
676 XhcWriteOpReg (Xhc, Offset, State);
677 break;
678
679 case EfiUsbPortEnableChange:
680 //
681 // Clear enable status change
682 //
683 State |= XHC_PORTSC_PEC;
684 XhcWriteOpReg (Xhc, Offset, State);
685 break;
686
687 case EfiUsbPortOverCurrentChange:
688 //
689 // Clear PortOverCurrent change
690 //
691 State |= XHC_PORTSC_OCC;
692 XhcWriteOpReg (Xhc, Offset, State);
693 break;
694
695 case EfiUsbPortResetChange:
696 //
697 // Clear Port Reset change
698 //
699 State |= XHC_PORTSC_PRC;
700 XhcWriteOpReg (Xhc, Offset, State);
701 break;
702
703 case EfiUsbPortPower:
704 case EfiUsbPortSuspendChange:
705 //
706 // Not supported or not related operation
707 //
708 break;
709
710 default:
711 Status = EFI_INVALID_PARAMETER;
712 break;
713 }
714
715 ON_EXIT:
716 DEBUG ((DEBUG_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
717 gBS->RestoreTPL (OldTpl);
718
719 return Status;
720 }
721
722 /**
723 Submits a new transaction to a target USB device.
724
725 @param Xhc The XHCI Instance.
726 @param DeviceAddress The target device address.
727 @param EndPointAddress Endpoint number and its direction encoded in bit 7
728 @param DeviceSpeed Target device speed.
729 @param MaximumPacketLength Maximum packet size the default control transfer
730 endpoint is capable of sending or receiving.
731 @param Type The transaction type.
732 @param Request USB device request to send.
733 @param Data Data buffer to be transmitted or received from USB
734 device.
735 @param DataLength The size (in bytes) of the data buffer.
736 @param Timeout Indicates the maximum timeout, in millisecond.
737 @param TransferResult Return the result of this control transfer.
738
739 @retval EFI_SUCCESS Transfer was completed successfully.
740 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
741 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
742 @retval EFI_TIMEOUT Transfer failed due to timeout.
743 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
744 **/
745 EFI_STATUS
746 XhcTransfer (
747 IN USB_XHCI_INSTANCE *Xhc,
748 IN UINT8 DeviceAddress,
749 IN UINT8 EndPointAddress,
750 IN UINT8 DeviceSpeed,
751 IN UINTN MaximumPacketLength,
752 IN UINTN Type,
753 IN EFI_USB_DEVICE_REQUEST *Request,
754 IN OUT VOID *Data,
755 IN OUT UINTN *DataLength,
756 IN UINTN Timeout,
757 OUT UINT32 *TransferResult
758 )
759 {
760 EFI_STATUS Status;
761 EFI_STATUS RecoveryStatus;
762 URB *Urb;
763
764 ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
765 Urb = XhcCreateUrb (
766 Xhc,
767 DeviceAddress,
768 EndPointAddress,
769 DeviceSpeed,
770 MaximumPacketLength,
771 Type,
772 Request,
773 Data,
774 *DataLength,
775 NULL,
776 NULL
777 );
778
779 if (Urb == NULL) {
780 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
781 return EFI_OUT_OF_RESOURCES;
782 }
783
784 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
785
786 if (Status == EFI_TIMEOUT) {
787 //
788 // The transfer timed out. Abort the transfer by dequeueing of the TD.
789 //
790 RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
791 if (RecoveryStatus == EFI_ALREADY_STARTED) {
792 //
793 // The URB is finished just before stopping endpoint.
794 // Change returning status from EFI_TIMEOUT to EFI_SUCCESS.
795 //
796 ASSERT (Urb->Result == EFI_USB_NOERROR);
797 Status = EFI_SUCCESS;
798 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
799 } else if (EFI_ERROR (RecoveryStatus)) {
800 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
801 }
802 }
803
804 *TransferResult = Urb->Result;
805 *DataLength = Urb->Completed;
806
807 if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
808 ASSERT (Status == EFI_DEVICE_ERROR);
809 RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
810 if (EFI_ERROR (RecoveryStatus)) {
811 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
812 }
813 }
814
815 Xhc->PciIo->Flush (Xhc->PciIo);
816 XhcFreeUrb (Xhc, Urb);
817 return Status;
818 }
819
820 /**
821 Submits control transfer to a target USB device.
822
823 @param This This EFI_USB2_HC_PROTOCOL instance.
824 @param DeviceAddress The target device address.
825 @param DeviceSpeed Target device speed.
826 @param MaximumPacketLength Maximum packet size the default control transfer
827 endpoint is capable of sending or receiving.
828 @param Request USB device request to send.
829 @param TransferDirection Specifies the data direction for the data stage
830 @param Data Data buffer to be transmitted or received from USB
831 device.
832 @param DataLength The size (in bytes) of the data buffer.
833 @param Timeout Indicates the maximum timeout, in millisecond.
834 @param Translator Transaction translator to be used by this device.
835 @param TransferResult Return the result of this control transfer.
836
837 @retval EFI_SUCCESS Transfer was completed successfully.
838 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
839 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
840 @retval EFI_TIMEOUT Transfer failed due to timeout.
841 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
842
843 **/
844 EFI_STATUS
845 EFIAPI
846 XhcControlTransfer (
847 IN EFI_USB2_HC_PROTOCOL *This,
848 IN UINT8 DeviceAddress,
849 IN UINT8 DeviceSpeed,
850 IN UINTN MaximumPacketLength,
851 IN EFI_USB_DEVICE_REQUEST *Request,
852 IN EFI_USB_DATA_DIRECTION TransferDirection,
853 IN OUT VOID *Data,
854 IN OUT UINTN *DataLength,
855 IN UINTN Timeout,
856 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
857 OUT UINT32 *TransferResult
858 )
859 {
860 USB_XHCI_INSTANCE *Xhc;
861 UINT8 Endpoint;
862 UINT8 Index;
863 UINT8 DescriptorType;
864 UINT8 SlotId;
865 UINT8 TTT;
866 UINT8 MTT;
867 UINT32 MaxPacket0;
868 EFI_USB_HUB_DESCRIPTOR *HubDesc;
869 EFI_TPL OldTpl;
870 EFI_STATUS Status;
871 UINTN MapSize;
872 EFI_USB_PORT_STATUS PortStatus;
873 UINT32 State;
874 EFI_USB_DEVICE_REQUEST ClearPortRequest;
875 UINTN Len;
876
877 //
878 // Validate parameters
879 //
880 if ((Request == NULL) || (TransferResult == NULL)) {
881 return EFI_INVALID_PARAMETER;
882 }
883
884 if ((TransferDirection != EfiUsbDataIn) &&
885 (TransferDirection != EfiUsbDataOut) &&
886 (TransferDirection != EfiUsbNoData))
887 {
888 return EFI_INVALID_PARAMETER;
889 }
890
891 if ((TransferDirection == EfiUsbNoData) &&
892 ((Data != NULL) || (*DataLength != 0)))
893 {
894 return EFI_INVALID_PARAMETER;
895 }
896
897 if ((TransferDirection != EfiUsbNoData) &&
898 ((Data == NULL) || (*DataLength == 0)))
899 {
900 return EFI_INVALID_PARAMETER;
901 }
902
903 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
904 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
905 (MaximumPacketLength != 512)
906 )
907 {
908 return EFI_INVALID_PARAMETER;
909 }
910
911 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
912 return EFI_INVALID_PARAMETER;
913 }
914
915 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
916 return EFI_INVALID_PARAMETER;
917 }
918
919 OldTpl = gBS->RaiseTPL (XHC_TPL);
920
921 Xhc = XHC_FROM_THIS (This);
922
923 Status = EFI_DEVICE_ERROR;
924 *TransferResult = EFI_USB_ERR_SYSTEM;
925 Len = 0;
926
927 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
928 DEBUG ((DEBUG_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
929 goto ON_EXIT;
930 }
931
932 //
933 // Check if the device is still enabled before every transaction.
934 //
935 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
936 if (SlotId == 0) {
937 goto ON_EXIT;
938 }
939
940 //
941 // Hook the Set_Address request from UsbBus.
942 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
943 //
944 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
945 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
946 {
947 //
948 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
949 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
950 //
951 for (Index = 0; Index < 255; Index++) {
952 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
953 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
954 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value))
955 {
956 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
957 }
958 }
959
960 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
961 Status = EFI_DEVICE_ERROR;
962 goto ON_EXIT;
963 }
964
965 //
966 // The actual device address has been assigned by XHCI during initializing the device slot.
967 // So we just need establish the mapping relationship between the device address requested from UsbBus
968 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
969 // can find out the actual device address by it.
970 //
971 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
972 Status = EFI_SUCCESS;
973 goto ON_EXIT;
974 }
975
976 //
977 // Create a new URB, insert it into the asynchronous
978 // schedule list, then poll the execution status.
979 // Note that we encode the direction in address although default control
980 // endpoint is bidirectional. XhcCreateUrb expects this
981 // combination of Ep addr and its direction.
982 //
983 Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
984 Status = XhcTransfer (
985 Xhc,
986 DeviceAddress,
987 Endpoint,
988 DeviceSpeed,
989 MaximumPacketLength,
990 XHC_CTRL_TRANSFER,
991 Request,
992 Data,
993 DataLength,
994 Timeout,
995 TransferResult
996 );
997
998 if (EFI_ERROR (Status)) {
999 goto ON_EXIT;
1000 }
1001
1002 //
1003 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
1004 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
1005 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1006 //
1007 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
1008 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
1009 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE)))))
1010 {
1011 DescriptorType = (UINT8)(Request->Value >> 8);
1012 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
1013 ASSERT (Data != NULL);
1014 //
1015 // Store a copy of device scriptor as hub device need this info to configure endpoint.
1016 //
1017 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
1018 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
1019 //
1020 // If it's a usb3.0 device, then its max packet size is a 2^n.
1021 //
1022 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1023 } else {
1024 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1025 }
1026
1027 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
1028 if (Xhc->HcCParams.Data.Csz == 0) {
1029 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
1030 } else {
1031 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
1032 }
1033 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
1034 ASSERT (Data != NULL);
1035 if (*DataLength == ((UINT16 *)Data)[1]) {
1036 //
1037 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
1038 //
1039 Index = (UINT8)Request->Value;
1040 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
1041 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool (*DataLength);
1042 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
1043 //
1044 // Default to use AlternateSetting 0 for all interfaces.
1045 //
1046 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
1047 }
1048 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
1049 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2))
1050 {
1051 ASSERT (Data != NULL);
1052 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
1053 ASSERT (HubDesc->NumPorts <= 15);
1054 //
1055 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
1056 //
1057 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
1058 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
1059 //
1060 // Don't support multi-TT feature for super speed hub now.
1061 //
1062 MTT = 0;
1063 DEBUG ((DEBUG_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
1064 } else {
1065 MTT = 0;
1066 }
1067
1068 if (Xhc->HcCParams.Data.Csz == 0) {
1069 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1070 } else {
1071 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1072 }
1073 }
1074 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1075 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)))
1076 {
1077 //
1078 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1079 //
1080 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1081 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1082 if (Xhc->HcCParams.Data.Csz == 0) {
1083 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1084 } else {
1085 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1086 }
1087
1088 break;
1089 }
1090 }
1091 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1092 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE)))
1093 {
1094 //
1095 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1096 // Request->Value indicates AlterlateSetting to set
1097 // Request->Index indicates Interface to set
1098 //
1099 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8)Request->Index] != (UINT8)Request->Value) {
1100 if (Xhc->HcCParams.Data.Csz == 0) {
1101 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1102 } else {
1103 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1104 }
1105 }
1106 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1107 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)))
1108 {
1109 ASSERT (Data != NULL);
1110 //
1111 // Hook Get_Status request from UsbBus to keep track of the port status change.
1112 //
1113 State = *(UINT32 *)Data;
1114 PortStatus.PortStatus = 0;
1115 PortStatus.PortChangeStatus = 0;
1116
1117 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1118 //
1119 // For super speed hub, its bit10~12 presents the attached device speed.
1120 //
1121 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1122 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1123 }
1124 } else {
1125 //
1126 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1127 //
1128 if (XHC_BIT_IS_SET (State, BIT9)) {
1129 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1130 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1131 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1132 }
1133 }
1134
1135 //
1136 // Convert the XHCI port/port change state to UEFI status
1137 //
1138 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1139 for (Index = 0; Index < MapSize; Index++) {
1140 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1141 PortStatus.PortStatus = (UINT16)(PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1142 }
1143 }
1144
1145 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1146 for (Index = 0; Index < MapSize; Index++) {
1147 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1148 PortStatus.PortChangeStatus = (UINT16)(PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1149 }
1150 }
1151
1152 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1153
1154 for (Index = 0; Index < MapSize; Index++) {
1155 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1156 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1157 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1158 ClearPortRequest.Request = (UINT8)USB_REQ_CLEAR_FEATURE;
1159 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1160 ClearPortRequest.Index = Request->Index;
1161 ClearPortRequest.Length = 0;
1162
1163 XhcControlTransfer (
1164 This,
1165 DeviceAddress,
1166 DeviceSpeed,
1167 MaximumPacketLength,
1168 &ClearPortRequest,
1169 EfiUsbNoData,
1170 NULL,
1171 &Len,
1172 Timeout,
1173 Translator,
1174 TransferResult
1175 );
1176 }
1177 }
1178
1179 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1180
1181 *(UINT32 *)Data = *(UINT32 *)&PortStatus;
1182 }
1183
1184 ON_EXIT:
1185 if (EFI_ERROR (Status)) {
1186 DEBUG ((DEBUG_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1187 }
1188
1189 gBS->RestoreTPL (OldTpl);
1190
1191 return Status;
1192 }
1193
1194 /**
1195 Submits bulk transfer to a bulk endpoint of a USB device.
1196
1197 @param This This EFI_USB2_HC_PROTOCOL instance.
1198 @param DeviceAddress Target device address.
1199 @param EndPointAddress Endpoint number and its direction in bit 7.
1200 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1201 transfer.
1202 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1203 sending or receiving.
1204 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1205 @param Data Array of pointers to the buffers of data to transmit
1206 from or receive into.
1207 @param DataLength The lenght of the data buffer.
1208 @param DataToggle On input, the initial data toggle for the transfer;
1209 On output, it is updated to to next data toggle to
1210 use of the subsequent bulk transfer.
1211 @param Timeout Indicates the maximum time, in millisecond, which
1212 the transfer is allowed to complete.
1213 @param Translator A pointr to the transaction translator data.
1214 @param TransferResult A pointer to the detailed result information of the
1215 bulk transfer.
1216
1217 @retval EFI_SUCCESS The transfer was completed successfully.
1218 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1219 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1220 @retval EFI_TIMEOUT The transfer failed due to timeout.
1221 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1222
1223 **/
1224 EFI_STATUS
1225 EFIAPI
1226 XhcBulkTransfer (
1227 IN EFI_USB2_HC_PROTOCOL *This,
1228 IN UINT8 DeviceAddress,
1229 IN UINT8 EndPointAddress,
1230 IN UINT8 DeviceSpeed,
1231 IN UINTN MaximumPacketLength,
1232 IN UINT8 DataBuffersNumber,
1233 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1234 IN OUT UINTN *DataLength,
1235 IN OUT UINT8 *DataToggle,
1236 IN UINTN Timeout,
1237 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1238 OUT UINT32 *TransferResult
1239 )
1240 {
1241 USB_XHCI_INSTANCE *Xhc;
1242 UINT8 SlotId;
1243 EFI_STATUS Status;
1244 EFI_TPL OldTpl;
1245
1246 //
1247 // Validate the parameters
1248 //
1249 if ((DataLength == NULL) || (*DataLength == 0) ||
1250 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
1251 {
1252 return EFI_INVALID_PARAMETER;
1253 }
1254
1255 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1256 return EFI_INVALID_PARAMETER;
1257 }
1258
1259 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1260 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1261 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1262 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024)))
1263 {
1264 return EFI_INVALID_PARAMETER;
1265 }
1266
1267 OldTpl = gBS->RaiseTPL (XHC_TPL);
1268
1269 Xhc = XHC_FROM_THIS (This);
1270
1271 *TransferResult = EFI_USB_ERR_SYSTEM;
1272 Status = EFI_DEVICE_ERROR;
1273
1274 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1275 DEBUG ((DEBUG_ERROR, "XhcBulkTransfer: HC is halted\n"));
1276 goto ON_EXIT;
1277 }
1278
1279 //
1280 // Check if the device is still enabled before every transaction.
1281 //
1282 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1283 if (SlotId == 0) {
1284 goto ON_EXIT;
1285 }
1286
1287 //
1288 // Create a new URB, insert it into the asynchronous
1289 // schedule list, then poll the execution status.
1290 //
1291 Status = XhcTransfer (
1292 Xhc,
1293 DeviceAddress,
1294 EndPointAddress,
1295 DeviceSpeed,
1296 MaximumPacketLength,
1297 XHC_BULK_TRANSFER,
1298 NULL,
1299 Data[0],
1300 DataLength,
1301 Timeout,
1302 TransferResult
1303 );
1304
1305 ON_EXIT:
1306 if (EFI_ERROR (Status)) {
1307 DEBUG ((DEBUG_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1308 }
1309
1310 gBS->RestoreTPL (OldTpl);
1311
1312 return Status;
1313 }
1314
1315 /**
1316 Submits an asynchronous interrupt transfer to an
1317 interrupt endpoint of a USB device.
1318
1319 @param This This EFI_USB2_HC_PROTOCOL instance.
1320 @param DeviceAddress Target device address.
1321 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1322 @param DeviceSpeed Indicates device speed.
1323 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1324 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1325 transfer If FALSE, to remove the specified
1326 asynchronous interrupt.
1327 @param DataToggle On input, the initial data toggle to use; on output,
1328 it is updated to indicate the next data toggle.
1329 @param PollingInterval The he interval, in milliseconds, that the transfer
1330 is polled.
1331 @param DataLength The length of data to receive at the rate specified
1332 by PollingInterval.
1333 @param Translator Transaction translator to use.
1334 @param CallBackFunction Function to call at the rate specified by
1335 PollingInterval.
1336 @param Context Context to CallBackFunction.
1337
1338 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1339 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1340 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1341 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1342
1343 **/
1344 EFI_STATUS
1345 EFIAPI
1346 XhcAsyncInterruptTransfer (
1347 IN EFI_USB2_HC_PROTOCOL *This,
1348 IN UINT8 DeviceAddress,
1349 IN UINT8 EndPointAddress,
1350 IN UINT8 DeviceSpeed,
1351 IN UINTN MaximumPacketLength,
1352 IN BOOLEAN IsNewTransfer,
1353 IN OUT UINT8 *DataToggle,
1354 IN UINTN PollingInterval,
1355 IN UINTN DataLength,
1356 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1357 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1358 IN VOID *Context OPTIONAL
1359 )
1360 {
1361 USB_XHCI_INSTANCE *Xhc;
1362 URB *Urb;
1363 EFI_STATUS Status;
1364 UINT8 SlotId;
1365 UINT8 Index;
1366 EFI_TPL OldTpl;
1367
1368 //
1369 // Validate parameters
1370 //
1371 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1372 return EFI_INVALID_PARAMETER;
1373 }
1374
1375 if (IsNewTransfer) {
1376 if (DataLength == 0) {
1377 return EFI_INVALID_PARAMETER;
1378 }
1379
1380 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1381 return EFI_INVALID_PARAMETER;
1382 }
1383
1384 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1385 return EFI_INVALID_PARAMETER;
1386 }
1387 }
1388
1389 OldTpl = gBS->RaiseTPL (XHC_TPL);
1390
1391 Xhc = XHC_FROM_THIS (This);
1392
1393 //
1394 // Delete Async interrupt transfer request.
1395 //
1396 if (!IsNewTransfer) {
1397 //
1398 // The delete request may happen after device is detached.
1399 //
1400 for (Index = 0; Index < 255; Index++) {
1401 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1402 break;
1403 }
1404 }
1405
1406 if (Index == 255) {
1407 Status = EFI_INVALID_PARAMETER;
1408 goto ON_EXIT;
1409 }
1410
1411 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1412 DEBUG ((DEBUG_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1413 goto ON_EXIT;
1414 }
1415
1416 Status = EFI_SUCCESS;
1417
1418 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1419 DEBUG ((DEBUG_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1420 Status = EFI_DEVICE_ERROR;
1421 goto ON_EXIT;
1422 }
1423
1424 //
1425 // Check if the device is still enabled before every transaction.
1426 //
1427 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1428 if (SlotId == 0) {
1429 goto ON_EXIT;
1430 }
1431
1432 Urb = XhciInsertAsyncIntTransfer (
1433 Xhc,
1434 DeviceAddress,
1435 EndPointAddress,
1436 DeviceSpeed,
1437 MaximumPacketLength,
1438 DataLength,
1439 CallBackFunction,
1440 Context
1441 );
1442 if (Urb == NULL) {
1443 Status = EFI_OUT_OF_RESOURCES;
1444 goto ON_EXIT;
1445 }
1446
1447 //
1448 // Ring the doorbell
1449 //
1450 Status = RingIntTransferDoorBell (Xhc, Urb);
1451
1452 ON_EXIT:
1453 Xhc->PciIo->Flush (Xhc->PciIo);
1454 gBS->RestoreTPL (OldTpl);
1455
1456 return Status;
1457 }
1458
1459 /**
1460 Submits synchronous interrupt transfer to an interrupt endpoint
1461 of a USB device.
1462
1463 @param This This EFI_USB2_HC_PROTOCOL instance.
1464 @param DeviceAddress Target device address.
1465 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1466 @param DeviceSpeed Indicates device speed.
1467 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1468 of sending or receiving.
1469 @param Data Buffer of data that will be transmitted to USB
1470 device or received from USB device.
1471 @param DataLength On input, the size, in bytes, of the data buffer; On
1472 output, the number of bytes transferred.
1473 @param DataToggle On input, the initial data toggle to use; on output,
1474 it is updated to indicate the next data toggle.
1475 @param Timeout Maximum time, in second, to complete.
1476 @param Translator Transaction translator to use.
1477 @param TransferResult Variable to receive the transfer result.
1478
1479 @return EFI_SUCCESS The transfer was completed successfully.
1480 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1481 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1482 @return EFI_TIMEOUT The transfer failed due to timeout.
1483 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1484
1485 **/
1486 EFI_STATUS
1487 EFIAPI
1488 XhcSyncInterruptTransfer (
1489 IN EFI_USB2_HC_PROTOCOL *This,
1490 IN UINT8 DeviceAddress,
1491 IN UINT8 EndPointAddress,
1492 IN UINT8 DeviceSpeed,
1493 IN UINTN MaximumPacketLength,
1494 IN OUT VOID *Data,
1495 IN OUT UINTN *DataLength,
1496 IN OUT UINT8 *DataToggle,
1497 IN UINTN Timeout,
1498 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1499 OUT UINT32 *TransferResult
1500 )
1501 {
1502 USB_XHCI_INSTANCE *Xhc;
1503 UINT8 SlotId;
1504 EFI_STATUS Status;
1505 EFI_TPL OldTpl;
1506
1507 //
1508 // Validates parameters
1509 //
1510 if ((DataLength == NULL) || (*DataLength == 0) ||
1511 (Data == NULL) || (TransferResult == NULL))
1512 {
1513 return EFI_INVALID_PARAMETER;
1514 }
1515
1516 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1517 return EFI_INVALID_PARAMETER;
1518 }
1519
1520 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1521 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1522 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072)))
1523 {
1524 return EFI_INVALID_PARAMETER;
1525 }
1526
1527 OldTpl = gBS->RaiseTPL (XHC_TPL);
1528
1529 Xhc = XHC_FROM_THIS (This);
1530
1531 *TransferResult = EFI_USB_ERR_SYSTEM;
1532 Status = EFI_DEVICE_ERROR;
1533
1534 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1535 DEBUG ((DEBUG_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1536 goto ON_EXIT;
1537 }
1538
1539 //
1540 // Check if the device is still enabled before every transaction.
1541 //
1542 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1543 if (SlotId == 0) {
1544 goto ON_EXIT;
1545 }
1546
1547 Status = XhcTransfer (
1548 Xhc,
1549 DeviceAddress,
1550 EndPointAddress,
1551 DeviceSpeed,
1552 MaximumPacketLength,
1553 XHC_INT_TRANSFER_SYNC,
1554 NULL,
1555 Data,
1556 DataLength,
1557 Timeout,
1558 TransferResult
1559 );
1560
1561 ON_EXIT:
1562 if (EFI_ERROR (Status)) {
1563 DEBUG ((DEBUG_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1564 }
1565
1566 gBS->RestoreTPL (OldTpl);
1567
1568 return Status;
1569 }
1570
1571 /**
1572 Submits isochronous transfer to a target USB device.
1573
1574 @param This This EFI_USB2_HC_PROTOCOL instance.
1575 @param DeviceAddress Target device address.
1576 @param EndPointAddress End point address with its direction.
1577 @param DeviceSpeed Device speed, Low speed device doesn't support this
1578 type.
1579 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1580 sending or receiving.
1581 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1582 @param Data Array of pointers to the buffers of data that will
1583 be transmitted to USB device or received from USB
1584 device.
1585 @param DataLength The size, in bytes, of the data buffer.
1586 @param Translator Transaction translator to use.
1587 @param TransferResult Variable to receive the transfer result.
1588
1589 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1590
1591 **/
1592 EFI_STATUS
1593 EFIAPI
1594 XhcIsochronousTransfer (
1595 IN EFI_USB2_HC_PROTOCOL *This,
1596 IN UINT8 DeviceAddress,
1597 IN UINT8 EndPointAddress,
1598 IN UINT8 DeviceSpeed,
1599 IN UINTN MaximumPacketLength,
1600 IN UINT8 DataBuffersNumber,
1601 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1602 IN UINTN DataLength,
1603 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1604 OUT UINT32 *TransferResult
1605 )
1606 {
1607 return EFI_UNSUPPORTED;
1608 }
1609
1610 /**
1611 Submits Async isochronous transfer to a target USB device.
1612
1613 @param This This EFI_USB2_HC_PROTOCOL instance.
1614 @param DeviceAddress Target device address.
1615 @param EndPointAddress End point address with its direction.
1616 @param DeviceSpeed Device speed, Low speed device doesn't support this
1617 type.
1618 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1619 sending or receiving.
1620 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1621 @param Data Array of pointers to the buffers of data that will
1622 be transmitted to USB device or received from USB
1623 device.
1624 @param DataLength The size, in bytes, of the data buffer.
1625 @param Translator Transaction translator to use.
1626 @param IsochronousCallBack Function to be called when the transfer complete.
1627 @param Context Context passed to the call back function as
1628 parameter.
1629
1630 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1631
1632 **/
1633 EFI_STATUS
1634 EFIAPI
1635 XhcAsyncIsochronousTransfer (
1636 IN EFI_USB2_HC_PROTOCOL *This,
1637 IN UINT8 DeviceAddress,
1638 IN UINT8 EndPointAddress,
1639 IN UINT8 DeviceSpeed,
1640 IN UINTN MaximumPacketLength,
1641 IN UINT8 DataBuffersNumber,
1642 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1643 IN UINTN DataLength,
1644 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1645 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1646 IN VOID *Context
1647 )
1648 {
1649 return EFI_UNSUPPORTED;
1650 }
1651
1652 /**
1653 Entry point for EFI drivers.
1654
1655 @param ImageHandle EFI_HANDLE.
1656 @param SystemTable EFI_SYSTEM_TABLE.
1657
1658 @retval EFI_SUCCESS Success.
1659 @retval Others Fail.
1660
1661 **/
1662 EFI_STATUS
1663 EFIAPI
1664 XhcDriverEntryPoint (
1665 IN EFI_HANDLE ImageHandle,
1666 IN EFI_SYSTEM_TABLE *SystemTable
1667 )
1668 {
1669 return EfiLibInstallDriverBindingComponentName2 (
1670 ImageHandle,
1671 SystemTable,
1672 &gXhciDriverBinding,
1673 ImageHandle,
1674 &gXhciComponentName,
1675 &gXhciComponentName2
1676 );
1677 }
1678
1679 /**
1680 Test to see if this driver supports ControllerHandle. Any
1681 ControllerHandle that has Usb2HcProtocol installed will
1682 be supported.
1683
1684 @param This Protocol instance pointer.
1685 @param Controller Handle of device to test.
1686 @param RemainingDevicePath Not used.
1687
1688 @return EFI_SUCCESS This driver supports this device.
1689 @return EFI_UNSUPPORTED This driver does not support this device.
1690
1691 **/
1692 EFI_STATUS
1693 EFIAPI
1694 XhcDriverBindingSupported (
1695 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1696 IN EFI_HANDLE Controller,
1697 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1698 )
1699 {
1700 EFI_STATUS Status;
1701 EFI_PCI_IO_PROTOCOL *PciIo;
1702 USB_CLASSC UsbClassCReg;
1703
1704 //
1705 // Test whether there is PCI IO Protocol attached on the controller handle.
1706 //
1707 Status = gBS->OpenProtocol (
1708 Controller,
1709 &gEfiPciIoProtocolGuid,
1710 (VOID **)&PciIo,
1711 This->DriverBindingHandle,
1712 Controller,
1713 EFI_OPEN_PROTOCOL_BY_DRIVER
1714 );
1715
1716 if (EFI_ERROR (Status)) {
1717 return EFI_UNSUPPORTED;
1718 }
1719
1720 Status = PciIo->Pci.Read (
1721 PciIo,
1722 EfiPciIoWidthUint8,
1723 PCI_CLASSCODE_OFFSET,
1724 sizeof (USB_CLASSC) / sizeof (UINT8),
1725 &UsbClassCReg
1726 );
1727
1728 if (EFI_ERROR (Status)) {
1729 Status = EFI_UNSUPPORTED;
1730 goto ON_EXIT;
1731 }
1732
1733 //
1734 // Test whether the controller belongs to Xhci type
1735 //
1736 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1737 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1738 (UsbClassCReg.ProgInterface != PCI_IF_XHCI))
1739 {
1740 Status = EFI_UNSUPPORTED;
1741 }
1742
1743 ON_EXIT:
1744 gBS->CloseProtocol (
1745 Controller,
1746 &gEfiPciIoProtocolGuid,
1747 This->DriverBindingHandle,
1748 Controller
1749 );
1750
1751 return Status;
1752 }
1753
1754 /**
1755 Create and initialize a USB_XHCI_INSTANCE structure.
1756
1757 @param PciIo The PciIo on this device.
1758 @param DevicePath The device path of host controller.
1759 @param OriginalPciAttributes Original PCI attributes.
1760
1761 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1762 otherwise NULL.
1763
1764 **/
1765 USB_XHCI_INSTANCE *
1766 XhcCreateUsbHc (
1767 IN EFI_PCI_IO_PROTOCOL *PciIo,
1768 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1769 IN UINT64 OriginalPciAttributes
1770 )
1771 {
1772 USB_XHCI_INSTANCE *Xhc;
1773 EFI_STATUS Status;
1774 UINT32 PageSize;
1775 UINT16 ExtCapReg;
1776 UINT8 ReleaseNumber;
1777
1778 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1779
1780 if (Xhc == NULL) {
1781 return NULL;
1782 }
1783
1784 //
1785 // Initialize private data structure
1786 //
1787 Xhc->Signature = XHCI_INSTANCE_SIG;
1788 Xhc->PciIo = PciIo;
1789 Xhc->DevicePath = DevicePath;
1790 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1791 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1792
1793 Status = PciIo->Pci.Read (
1794 PciIo,
1795 EfiPciIoWidthUint8,
1796 XHC_PCI_SBRN_OFFSET,
1797 1,
1798 &ReleaseNumber
1799 );
1800
1801 if (!EFI_ERROR (Status)) {
1802 Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4;
1803 Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F);
1804 }
1805
1806 InitializeListHead (&Xhc->AsyncIntTransfers);
1807
1808 //
1809 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1810 //
1811 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1812 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1813 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1814 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1815 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1816 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1817
1818 //
1819 // This PageSize field defines the page size supported by the xHC implementation.
1820 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1821 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1822 //
1823 PageSize = XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET);
1824 if ((PageSize & (~XHC_PAGESIZE_MASK)) != 0) {
1825 DEBUG ((DEBUG_ERROR, "XhcCreateUsb3Hc: Reserved bits are not 0 for PageSize\n"));
1826 goto ON_ERROR;
1827 }
1828
1829 PageSize &= XHC_PAGESIZE_MASK;
1830 Xhc->PageSize = 1 << (HighBitSet32 (PageSize) + 12);
1831
1832 ExtCapReg = (UINT16)(Xhc->HcCParams.Data.ExtCapReg);
1833 Xhc->ExtCapRegBase = ExtCapReg << 2;
1834 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1835 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1836 Xhc->Usb2SupOffset = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2);
1837 Xhc->Usb3SupOffset = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3);
1838
1839 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1840 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1841 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1842 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1843 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1844 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1845 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1846 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1847 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb2SupOffset 0x%x\n", Xhc->Usb2SupOffset));
1848 DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb3SupOffset 0x%x\n", Xhc->Usb3SupOffset));
1849
1850 //
1851 // Create AsyncRequest Polling Timer
1852 //
1853 Status = gBS->CreateEvent (
1854 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1855 TPL_NOTIFY,
1856 XhcMonitorAsyncRequests,
1857 Xhc,
1858 &Xhc->PollTimer
1859 );
1860
1861 if (EFI_ERROR (Status)) {
1862 goto ON_ERROR;
1863 }
1864
1865 return Xhc;
1866
1867 ON_ERROR:
1868 FreePool (Xhc);
1869 return NULL;
1870 }
1871
1872 /**
1873 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1874
1875 @param Event Pointer to this event
1876 @param Context Event handler private data
1877
1878 **/
1879 VOID
1880 EFIAPI
1881 XhcExitBootService (
1882 EFI_EVENT Event,
1883 VOID *Context
1884 )
1885
1886 {
1887 USB_XHCI_INSTANCE *Xhc;
1888 EFI_PCI_IO_PROTOCOL *PciIo;
1889
1890 Xhc = (USB_XHCI_INSTANCE *)Context;
1891 PciIo = Xhc->PciIo;
1892
1893 //
1894 // Stop AsyncRequest Polling timer then stop the XHCI driver
1895 // and uninstall the XHCI protocl.
1896 //
1897 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1898 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1899
1900 if (Xhc->PollTimer != NULL) {
1901 gBS->CloseEvent (Xhc->PollTimer);
1902 }
1903
1904 XhcClearBiosOwnership (Xhc);
1905
1906 //
1907 // Restore original PCI attributes
1908 //
1909 PciIo->Attributes (
1910 PciIo,
1911 EfiPciIoAttributeOperationSet,
1912 Xhc->OriginalPciAttributes,
1913 NULL
1914 );
1915 }
1916
1917 /**
1918 Starting the Usb XHCI Driver.
1919
1920 @param This Protocol instance pointer.
1921 @param Controller Handle of device to test.
1922 @param RemainingDevicePath Not used.
1923
1924 @return EFI_SUCCESS supports this device.
1925 @return EFI_UNSUPPORTED do not support this device.
1926 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1927 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1928
1929 **/
1930 EFI_STATUS
1931 EFIAPI
1932 XhcDriverBindingStart (
1933 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1934 IN EFI_HANDLE Controller,
1935 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1936 )
1937 {
1938 EFI_STATUS Status;
1939 EFI_PCI_IO_PROTOCOL *PciIo;
1940 UINT64 Supports;
1941 UINT64 OriginalPciAttributes;
1942 BOOLEAN PciAttributesSaved;
1943 USB_XHCI_INSTANCE *Xhc;
1944 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1945
1946 //
1947 // Open the PciIo Protocol, then enable the USB host controller
1948 //
1949 Status = gBS->OpenProtocol (
1950 Controller,
1951 &gEfiPciIoProtocolGuid,
1952 (VOID **)&PciIo,
1953 This->DriverBindingHandle,
1954 Controller,
1955 EFI_OPEN_PROTOCOL_BY_DRIVER
1956 );
1957
1958 if (EFI_ERROR (Status)) {
1959 return Status;
1960 }
1961
1962 //
1963 // Open Device Path Protocol for on USB host controller
1964 //
1965 HcDevicePath = NULL;
1966 Status = gBS->OpenProtocol (
1967 Controller,
1968 &gEfiDevicePathProtocolGuid,
1969 (VOID **)&HcDevicePath,
1970 This->DriverBindingHandle,
1971 Controller,
1972 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1973 );
1974
1975 PciAttributesSaved = FALSE;
1976 //
1977 // Save original PCI attributes
1978 //
1979 Status = PciIo->Attributes (
1980 PciIo,
1981 EfiPciIoAttributeOperationGet,
1982 0,
1983 &OriginalPciAttributes
1984 );
1985
1986 if (EFI_ERROR (Status)) {
1987 goto CLOSE_PCIIO;
1988 }
1989
1990 PciAttributesSaved = TRUE;
1991
1992 Status = PciIo->Attributes (
1993 PciIo,
1994 EfiPciIoAttributeOperationSupported,
1995 0,
1996 &Supports
1997 );
1998 if (!EFI_ERROR (Status)) {
1999 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
2000 Status = PciIo->Attributes (
2001 PciIo,
2002 EfiPciIoAttributeOperationEnable,
2003 Supports,
2004 NULL
2005 );
2006 }
2007
2008 if (EFI_ERROR (Status)) {
2009 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
2010 goto CLOSE_PCIIO;
2011 }
2012
2013 //
2014 // Create then install USB2_HC_PROTOCOL
2015 //
2016 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
2017
2018 if (Xhc == NULL) {
2019 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
2020 return EFI_OUT_OF_RESOURCES;
2021 }
2022
2023 //
2024 // Enable 64-bit DMA support in the PCI layer if this controller
2025 // supports it.
2026 //
2027 if (Xhc->HcCParams.Data.Ac64 != 0) {
2028 Status = PciIo->Attributes (
2029 PciIo,
2030 EfiPciIoAttributeOperationEnable,
2031 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
2032 NULL
2033 );
2034 if (!EFI_ERROR (Status)) {
2035 Xhc->Support64BitDma = TRUE;
2036 } else {
2037 DEBUG ((
2038 DEBUG_WARN,
2039 "%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
2040 __FUNCTION__,
2041 Controller,
2042 Status
2043 ));
2044 }
2045 }
2046
2047 XhcSetBiosOwnership (Xhc);
2048
2049 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
2050 ASSERT (XhcIsHalt (Xhc));
2051
2052 //
2053 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2054 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2055 //
2056 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2057
2058 //
2059 // Initialize the schedule
2060 //
2061 XhcInitSched (Xhc);
2062
2063 //
2064 // Start the Host Controller
2065 //
2066 XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
2067
2068 //
2069 // Start the asynchronous interrupt monitor
2070 //
2071 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2072 if (EFI_ERROR (Status)) {
2073 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2074 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2075 goto FREE_POOL;
2076 }
2077
2078 //
2079 // Create event to stop the HC when exit boot service.
2080 //
2081 Status = gBS->CreateEventEx (
2082 EVT_NOTIFY_SIGNAL,
2083 TPL_NOTIFY,
2084 XhcExitBootService,
2085 Xhc,
2086 &gEfiEventExitBootServicesGuid,
2087 &Xhc->ExitBootServiceEvent
2088 );
2089 if (EFI_ERROR (Status)) {
2090 goto FREE_POOL;
2091 }
2092
2093 //
2094 // Install the component name protocol, don't fail the start
2095 // because of something for display.
2096 //
2097 AddUnicodeString2 (
2098 "eng",
2099 gXhciComponentName.SupportedLanguages,
2100 &Xhc->ControllerNameTable,
2101 L"eXtensible Host Controller (USB 3.0)",
2102 TRUE
2103 );
2104 AddUnicodeString2 (
2105 "en",
2106 gXhciComponentName2.SupportedLanguages,
2107 &Xhc->ControllerNameTable,
2108 L"eXtensible Host Controller (USB 3.0)",
2109 FALSE
2110 );
2111
2112 Status = gBS->InstallProtocolInterface (
2113 &Controller,
2114 &gEfiUsb2HcProtocolGuid,
2115 EFI_NATIVE_INTERFACE,
2116 &Xhc->Usb2Hc
2117 );
2118 if (EFI_ERROR (Status)) {
2119 DEBUG ((DEBUG_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2120 goto FREE_POOL;
2121 }
2122
2123 DEBUG ((DEBUG_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2124 return EFI_SUCCESS;
2125
2126 FREE_POOL:
2127 gBS->CloseEvent (Xhc->PollTimer);
2128 XhcFreeSched (Xhc);
2129 FreePool (Xhc);
2130
2131 CLOSE_PCIIO:
2132 if (PciAttributesSaved) {
2133 //
2134 // Restore original PCI attributes
2135 //
2136 PciIo->Attributes (
2137 PciIo,
2138 EfiPciIoAttributeOperationSet,
2139 OriginalPciAttributes,
2140 NULL
2141 );
2142 }
2143
2144 gBS->CloseProtocol (
2145 Controller,
2146 &gEfiPciIoProtocolGuid,
2147 This->DriverBindingHandle,
2148 Controller
2149 );
2150
2151 return Status;
2152 }
2153
2154 /**
2155 Stop this driver on ControllerHandle. Support stopping any child handles
2156 created by this driver.
2157
2158 @param This Protocol instance pointer.
2159 @param Controller Handle of device to stop driver on.
2160 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2161 @param ChildHandleBuffer List of handles for the children we need to stop.
2162
2163 @return EFI_SUCCESS Success.
2164 @return EFI_DEVICE_ERROR Fail.
2165
2166 **/
2167 EFI_STATUS
2168 EFIAPI
2169 XhcDriverBindingStop (
2170 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2171 IN EFI_HANDLE Controller,
2172 IN UINTN NumberOfChildren,
2173 IN EFI_HANDLE *ChildHandleBuffer
2174 )
2175 {
2176 EFI_STATUS Status;
2177 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2178 EFI_PCI_IO_PROTOCOL *PciIo;
2179 USB_XHCI_INSTANCE *Xhc;
2180 UINT8 Index;
2181
2182 //
2183 // Test whether the Controller handler passed in is a valid
2184 // Usb controller handle that should be supported, if not,
2185 // return the error status directly
2186 //
2187 Status = gBS->OpenProtocol (
2188 Controller,
2189 &gEfiUsb2HcProtocolGuid,
2190 (VOID **)&Usb2Hc,
2191 This->DriverBindingHandle,
2192 Controller,
2193 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2194 );
2195
2196 if (EFI_ERROR (Status)) {
2197 return Status;
2198 }
2199
2200 Status = gBS->UninstallProtocolInterface (
2201 Controller,
2202 &gEfiUsb2HcProtocolGuid,
2203 Usb2Hc
2204 );
2205
2206 if (EFI_ERROR (Status)) {
2207 return Status;
2208 }
2209
2210 Xhc = XHC_FROM_THIS (Usb2Hc);
2211 PciIo = Xhc->PciIo;
2212
2213 //
2214 // Stop AsyncRequest Polling timer then stop the XHCI driver
2215 // and uninstall the XHCI protocl.
2216 //
2217 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2218
2219 //
2220 // Disable the device slots occupied by these devices on its downstream ports.
2221 // Entry 0 is reserved.
2222 //
2223 for (Index = 0; Index < 255; Index++) {
2224 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2225 (Xhc->UsbDevContext[Index + 1].SlotId == 0))
2226 {
2227 continue;
2228 }
2229
2230 if (Xhc->HcCParams.Data.Csz == 0) {
2231 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2232 } else {
2233 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2234 }
2235 }
2236
2237 if (Xhc->PollTimer != NULL) {
2238 gBS->CloseEvent (Xhc->PollTimer);
2239 }
2240
2241 if (Xhc->ExitBootServiceEvent != NULL) {
2242 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2243 }
2244
2245 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2246 XhcClearBiosOwnership (Xhc);
2247 XhciDelAllAsyncIntTransfers (Xhc);
2248 XhcFreeSched (Xhc);
2249
2250 if (Xhc->ControllerNameTable) {
2251 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2252 }
2253
2254 //
2255 // Restore original PCI attributes
2256 //
2257 PciIo->Attributes (
2258 PciIo,
2259 EfiPciIoAttributeOperationSet,
2260 Xhc->OriginalPciAttributes,
2261 NULL
2262 );
2263
2264 gBS->CloseProtocol (
2265 Controller,
2266 &gEfiPciIoProtocolGuid,
2267 This->DriverBindingHandle,
2268 Controller
2269 );
2270
2271 FreePool (Xhc);
2272
2273 return EFI_SUCCESS;
2274 }
EFI Development Kit II mirror for PVE