3 This file contains the definition for XHCI host controller schedule routines.
5 Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #ifndef _EFI_XHCI_SCHED_H_
17 #define _EFI_XHCI_SCHED_H_
19 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
22 // Transfer types, used in URB to identify the transfer type
24 #define XHC_CTRL_TRANSFER 0x01
25 #define XHC_BULK_TRANSFER 0x02
26 #define XHC_INT_TRANSFER_SYNC 0x04
27 #define XHC_INT_TRANSFER_ASYNC 0x08
28 #define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
33 #define TRB_TYPE_NORMAL 1
34 #define TRB_TYPE_SETUP_STAGE 2
35 #define TRB_TYPE_DATA_STAGE 3
36 #define TRB_TYPE_STATUS_STAGE 4
37 #define TRB_TYPE_ISOCH 5
38 #define TRB_TYPE_LINK 6
39 #define TRB_TYPE_EVENT_DATA 7
40 #define TRB_TYPE_NO_OP 8
41 #define TRB_TYPE_EN_SLOT 9
42 #define TRB_TYPE_DIS_SLOT 10
43 #define TRB_TYPE_ADDRESS_DEV 11
44 #define TRB_TYPE_CON_ENDPOINT 12
45 #define TRB_TYPE_EVALU_CONTXT 13
46 #define TRB_TYPE_RESET_ENDPOINT 14
47 #define TRB_TYPE_STOP_ENDPOINT 15
48 #define TRB_TYPE_SET_TR_DEQUE 16
49 #define TRB_TYPE_RESET_DEV 17
50 #define TRB_TYPE_GET_PORT_BANW 21
51 #define TRB_TYPE_FORCE_HEADER 22
52 #define TRB_TYPE_NO_OP_COMMAND 23
53 #define TRB_TYPE_TRANS_EVENT 32
54 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
55 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
56 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
57 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
58 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
61 // Endpoint Type (EP Type).
63 #define ED_NOT_VALID 0
64 #define ED_ISOCH_OUT 1
66 #define ED_INTERRUPT_OUT 3
67 #define ED_CONTROL_BIDIR 4
70 #define ED_INTERRUPT_IN 7
73 // 6.4.5 TRB Completion Codes
75 #define TRB_COMPLETION_INVALID 0
76 #define TRB_COMPLETION_SUCCESS 1
77 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
78 #define TRB_COMPLETION_BABBLE_ERROR 3
79 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
80 #define TRB_COMPLETION_TRB_ERROR 5
81 #define TRB_COMPLETION_STALL_ERROR 6
82 #define TRB_COMPLETION_SHORT_PACKET 13
85 // The topology string used to present usb device location
87 typedef struct _USB_DEV_TOPOLOGY
{
89 // The tier concatenation of down stream port.
91 UINT32 RouteString
:20;
93 // The root port number of the chain.
97 // The Tier the device reside.
103 // USB Device's RouteChart
105 typedef union _USB_DEV_ROUTE
{
107 USB_DEV_TOPOLOGY Route
;
111 // Endpoint address and its capabilities
113 typedef struct _USB_ENDPOINT
{
115 // Store logical device address assigned by UsbBus
116 // It's because some XHCI host controllers may assign the same physcial device
117 // address for those devices inserted at different root port.
122 EFI_USB_DATA_DIRECTION Direction
;
131 typedef struct _TRB_TEMPLATE
{
144 typedef struct _TRANSFER_RING
{
147 TRB_TEMPLATE
*RingEnqueue
;
148 TRB_TEMPLATE
*RingDequeue
;
152 typedef struct _EVENT_RING
{
156 TRB_TEMPLATE
*EventRingEnqueue
;
157 TRB_TEMPLATE
*EventRingDequeue
;
162 // URB (Usb Request Block) contains information for all kinds of
165 typedef struct _URB
{
169 // Usb Device URB related information
172 EFI_USB_DEVICE_REQUEST
*Request
;
175 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
182 // completed data length
186 // Command/Tranfer Ring info
189 TRB_TEMPLATE
*TrbStart
;
190 TRB_TEMPLATE
*TrbEnd
;
193 TRB_TEMPLATE
*EvtTrbStart
;
197 // 6.5 Event Ring Segment Table
198 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
199 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
200 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
201 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
203 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
206 UINT32 RingTrbSize
:16;
209 } EVENT_RING_SEG_TABLE_ENTRY
;
212 // 6.4.1.1 Normal TRB
213 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
214 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
215 // Rings, and to define the Data stage information for Control Transfer Rings.
217 typedef struct _TRANSFER_TRB_NORMAL
{
237 } TRANSFER_TRB_NORMAL
;
240 // 6.4.1.2.1 Setup Stage TRB
241 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
243 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
244 UINT32 bmRequestType
:8;
263 } TRANSFER_TRB_CONTROL_SETUP
;
266 // 6.4.1.2.2 Data Stage TRB
267 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
269 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
289 } TRANSFER_TRB_CONTROL_DATA
;
292 // 6.4.1.2.2 Data Stage TRB
293 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
295 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
311 } TRANSFER_TRB_CONTROL_STATUS
;
314 // 6.4.2.1 Transfer Event TRB
315 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
316 // for more information on the use and operation of Transfer Events.
318 typedef struct _EVT_TRB_TRANSFER
{
324 UINT32 Completecode
:8;
337 // 6.4.2.2 Command Completion Event TRB
338 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
339 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
341 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
347 UINT32 Completecode
:8;
354 } EVT_TRB_COMMAND_COMPLETION
;
357 TRB_TEMPLATE TrbTemplate
;
358 TRANSFER_TRB_NORMAL TrbNormal
;
359 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
360 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
361 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
365 // 6.4.3.1 No Op Command TRB
366 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
367 // mechanisms offered by the xHCI.
369 typedef struct _CMD_TRB_NO_OP
{
381 // 6.4.3.2 Enable Slot Command TRB
382 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
383 // selected slot to the host in a Command Completion Event.
385 typedef struct _CMD_TRB_ENABLE_SLOT
{
394 } CMD_TRB_ENABLE_SLOT
;
397 // 6.4.3.3 Disable Slot Command TRB
398 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
399 // internal xHC resources assigned to the slot.
401 typedef struct _CMD_TRB_DISABLE_SLOT
{
411 } CMD_TRB_DISABLE_SLOT
;
414 // 6.4.3.4 Address Device Command TRB
415 // The Address Device Command TRB transitions the selected Device Context from the Default to the
416 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
417 // issue a SET_ADDRESS request to the USB device.
419 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
432 } CMD_TRB_ADDRESS_DEVICE
;
435 // 6.4.3.5 Configure Endpoint Command TRB
436 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
437 // endpoints selected by the command.
439 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
452 } CMD_TRB_CONFIG_ENDPOINT
;
455 // 6.4.3.6 Evaluate Context Command TRB
456 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
457 // Context data structures in the Device Context have been modified by system software and that the xHC
458 // shall evaluate any changes
460 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
472 } CMD_TRB_EVALUATE_CONTEXT
;
475 // 6.4.3.7 Reset Endpoint Command TRB
476 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
478 typedef struct _CMD_TRB_RESET_ENDPOINT
{
490 } CMD_TRB_RESET_ENDPOINT
;
493 // 6.4.3.8 Stop Endpoint Command TRB
494 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
495 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
497 typedef struct _CMD_TRB_STOP_ENDPOINT
{
509 } CMD_TRB_STOP_ENDPOINT
;
512 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
513 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
514 // Pointer and DCS fields of an Endpoint or Stream Context.
516 typedef struct _CMD_SET_TR_DEQ_POINTER
{
530 } CMD_SET_TR_DEQ_POINTER
;
534 // A Link TRB provides support for non-contiguous TRB Rings.
536 typedef struct _LINK_TRB
{
542 UINT32 InterTarget
:10;
555 // 6.2.2 Slot Context
557 typedef struct _SLOT_CONTEXT
{
558 UINT32 RouteString
:20;
563 UINT32 ContextEntries
:5;
565 UINT32 MaxExitLatency
:16;
566 UINT32 RootHubPortNum
:8;
569 UINT32 TTHubSlotId
:8;
573 UINT32 InterTarget
:10;
575 UINT32 DeviceAddress
:8;
585 typedef struct _SLOT_CONTEXT_64
{
586 UINT32 RouteString
:20;
591 UINT32 ContextEntries
:5;
593 UINT32 MaxExitLatency
:16;
594 UINT32 RootHubPortNum
:8;
597 UINT32 TTHubSlotId
:8;
601 UINT32 InterTarget
:10;
603 UINT32 DeviceAddress
:8;
626 // 6.2.3 Endpoint Context
628 typedef struct _ENDPOINT_CONTEXT
{
632 UINT32 MaxPStreams
:5;
642 UINT32 MaxBurstSize
:8;
643 UINT32 MaxPacketSize
:16;
649 UINT32 AverageTRBLength
:16;
650 UINT32 MaxESITPayload
:16;
657 typedef struct _ENDPOINT_CONTEXT_64
{
661 UINT32 MaxPStreams
:5;
671 UINT32 MaxBurstSize
:8;
672 UINT32 MaxPacketSize
:16;
678 UINT32 AverageTRBLength
:16;
679 UINT32 MaxESITPayload
:16;
695 } ENDPOINT_CONTEXT_64
;
699 // 6.2.5.1 Input Control Context
701 typedef struct _INPUT_CONTRL_CONTEXT
{
710 } INPUT_CONTRL_CONTEXT
;
712 typedef struct _INPUT_CONTRL_CONTEXT_64
{
729 } INPUT_CONTRL_CONTEXT_64
;
732 // 6.2.1 Device Context
734 typedef struct _DEVICE_CONTEXT
{
736 ENDPOINT_CONTEXT EP
[31];
739 typedef struct _DEVICE_CONTEXT_64
{
740 SLOT_CONTEXT_64 Slot
;
741 ENDPOINT_CONTEXT_64 EP
[31];
745 // 6.2.5 Input Context
747 typedef struct _INPUT_CONTEXT
{
748 INPUT_CONTRL_CONTEXT InputControlContext
;
750 ENDPOINT_CONTEXT EP
[31];
753 typedef struct _INPUT_CONTEXT_64
{
754 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
755 SLOT_CONTEXT_64 Slot
;
756 ENDPOINT_CONTEXT_64 EP
[31];
761 Initialize the XHCI host controller for schedule.
763 @param Xhc The XHCI Instance to be initialized.
768 IN USB_XHCI_INSTANCE
*Xhc
772 Free the resouce allocated at initializing schedule.
774 @param Xhc The XHCI Instance.
779 IN USB_XHCI_INSTANCE
*Xhc
783 Ring the door bell to notify XHCI there is a transaction to be executed through URB.
785 @param Xhc The XHCI Instance.
786 @param Urb The URB to be rung.
788 @retval EFI_SUCCESS Successfully ring the door bell.
792 RingIntTransferDoorBell (
793 IN USB_XHCI_INSTANCE
*Xhc
,
798 Execute the transfer by polling the URB. This is a synchronous operation.
800 @param Xhc The XHCI Instance.
801 @param CmdTransfer The executed URB is for cmd transfer or not.
802 @param Urb The URB to execute.
803 @param Timeout The time to wait before abort, in millisecond.
805 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
806 @return EFI_TIMEOUT The transfer failed due to time out.
807 @return EFI_SUCCESS The transfer finished OK.
812 IN USB_XHCI_INSTANCE
*Xhc
,
813 IN BOOLEAN CmdTransfer
,
819 Delete a single asynchronous interrupt transfer for
820 the device and endpoint.
822 @param Xhc The XHCI Instance.
823 @param BusAddr The logical device address assigned by UsbBus driver.
824 @param EpNum The endpoint of the target.
826 @retval EFI_SUCCESS An asynchronous transfer is removed.
827 @retval EFI_NOT_FOUND No transfer for the device is found.
831 XhciDelAsyncIntTransfer (
832 IN USB_XHCI_INSTANCE
*Xhc
,
838 Remove all the asynchronous interrupt transfers.
840 @param Xhc The XHCI Instance.
844 XhciDelAllAsyncIntTransfers (
845 IN USB_XHCI_INSTANCE
*Xhc
851 @param Xhc The XHCI Instance.
855 XhcSetBiosOwnership (
856 IN USB_XHCI_INSTANCE
*Xhc
862 @param Xhc The XHCI Instance.
866 XhcClearBiosOwnership (
867 IN USB_XHCI_INSTANCE
*Xhc
871 Find out the slot id according to the device's route string.
873 @param Xhc The XHCI Instance.
874 @param RouteString The route string described the device location.
876 @return The slot id used by the device.
881 XhcRouteStringToSlotId (
882 IN USB_XHCI_INSTANCE
*Xhc
,
883 IN USB_DEV_ROUTE RouteString
887 Calculate the device context index by endpoint address and direction.
889 @param EpAddr The target endpoint number.
890 @param Direction The direction of the target endpoint.
892 @return The device context index of endpoint.
902 Ring the door bell to notify XHCI there is a transaction to be executed.
904 @param Xhc The XHCI Instance.
905 @param SlotId The slot id of the target device.
906 @param Dci The device context index of the target slot or endpoint.
908 @retval EFI_SUCCESS Successfully ring the door bell.
914 IN USB_XHCI_INSTANCE
*Xhc
,
920 Interrupt transfer periodic check handler.
922 @param Event Interrupt event.
923 @param Context Pointer to USB_XHCI_INSTANCE.
928 XhcMonitorAsyncRequests (
934 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
936 @param Xhc The XHCI Instance.
937 @param ParentRouteChart The route string pointed to the parent device if it exists.
938 @param Port The port to be polled.
939 @param PortState The port state.
941 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
942 @retval Others Should not appear.
947 XhcPollPortStatusChange (
948 IN USB_XHCI_INSTANCE
*Xhc
,
949 IN USB_DEV_ROUTE ParentRouteChart
,
951 IN EFI_USB_PORT_STATUS
*PortState
955 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
957 @param Xhc The XHCI Instance.
958 @param SlotId The slot id to be configured.
959 @param PortNum The total number of downstream port supported by the hub.
960 @param TTT The TT think time of the hub device.
961 @param MTT The multi-TT of the hub device.
963 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
967 XhcConfigHubContext (
968 IN USB_XHCI_INSTANCE
*Xhc
,
977 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
979 @param Xhc The XHCI Instance.
980 @param SlotId The slot id to be configured.
981 @param PortNum The total number of downstream port supported by the hub.
982 @param TTT The TT think time of the hub device.
983 @param MTT The multi-TT of the hub device.
985 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
989 XhcConfigHubContext64 (
990 IN USB_XHCI_INSTANCE
*Xhc
,
999 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1001 @param Xhc The XHCI Instance.
1002 @param SlotId The slot id to be configured.
1003 @param DeviceSpeed The device's speed.
1004 @param ConfigDesc The pointer to the usb device configuration descriptor.
1006 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1012 IN USB_XHCI_INSTANCE
*Xhc
,
1014 IN UINT8 DeviceSpeed
,
1015 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1020 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1022 @param Xhc The XHCI Instance.
1023 @param SlotId The slot id to be configured.
1024 @param DeviceSpeed The device's speed.
1025 @param ConfigDesc The pointer to the usb device configuration descriptor.
1027 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1033 IN USB_XHCI_INSTANCE
*Xhc
,
1035 IN UINT8 DeviceSpeed
,
1036 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1041 Find out the actual device address according to the requested device address from UsbBus.
1043 @param Xhc The XHCI Instance.
1044 @param BusDevAddr The requested device address by UsbBus upper driver.
1046 @return The actual device address assigned to the device.
1051 XhcBusDevAddrToSlotId (
1052 IN USB_XHCI_INSTANCE
*Xhc
,
1057 Assign and initialize the device slot for a new device.
1059 @param Xhc The XHCI Instance.
1060 @param ParentRouteChart The route string pointed to the parent device.
1061 @param ParentPort The port at which the device is located.
1062 @param RouteChart The route string pointed to the device.
1063 @param DeviceSpeed The device speed.
1065 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1070 XhcInitializeDeviceSlot (
1071 IN USB_XHCI_INSTANCE
*Xhc
,
1072 IN USB_DEV_ROUTE ParentRouteChart
,
1073 IN UINT16 ParentPort
,
1074 IN USB_DEV_ROUTE RouteChart
,
1075 IN UINT8 DeviceSpeed
1079 Assign and initialize the device slot for a new device.
1081 @param Xhc The XHCI Instance.
1082 @param ParentRouteChart The route string pointed to the parent device.
1083 @param ParentPort The port at which the device is located.
1084 @param RouteChart The route string pointed to the device.
1085 @param DeviceSpeed The device speed.
1087 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1092 XhcInitializeDeviceSlot64 (
1093 IN USB_XHCI_INSTANCE
*Xhc
,
1094 IN USB_DEV_ROUTE ParentRouteChart
,
1095 IN UINT16 ParentPort
,
1096 IN USB_DEV_ROUTE RouteChart
,
1097 IN UINT8 DeviceSpeed
1101 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1103 @param Xhc The XHCI Instance.
1104 @param SlotId The slot id to be evaluated.
1105 @param MaxPacketSize The max packet size supported by the device control transfer.
1107 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1112 XhcEvaluateContext (
1113 IN USB_XHCI_INSTANCE
*Xhc
,
1115 IN UINT32 MaxPacketSize
1120 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1122 @param Xhc The XHCI Instance.
1123 @param SlotId The slot id to be evaluated.
1124 @param MaxPacketSize The max packet size supported by the device control transfer.
1126 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1131 XhcEvaluateContext64 (
1132 IN USB_XHCI_INSTANCE
*Xhc
,
1134 IN UINT32 MaxPacketSize
1139 Disable the specified device slot.
1141 @param Xhc The XHCI Instance.
1142 @param SlotId The slot id to be disabled.
1144 @retval EFI_SUCCESS Successfully disable the device slot.
1150 IN USB_XHCI_INSTANCE
*Xhc
,
1156 Disable the specified device slot.
1158 @param Xhc The XHCI Instance.
1159 @param SlotId The slot id to be disabled.
1161 @retval EFI_SUCCESS Successfully disable the device slot.
1166 XhcDisableSlotCmd64 (
1167 IN USB_XHCI_INSTANCE
*Xhc
,
1173 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1175 @param Xhc The XHCI Instance.
1176 @param TrsRing The transfer ring to sync.
1178 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1184 IN USB_XHCI_INSTANCE
*Xhc
,
1185 TRANSFER_RING
*TrsRing
1189 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1191 @param Xhc The XHCI Instance.
1192 @param EvtRing The event ring to sync.
1194 @retval EFI_SUCCESS The event ring is synchronized successfully.
1200 IN USB_XHCI_INSTANCE
*Xhc
,
1205 Check if there is a new generated event.
1207 @param Xhc The XHCI Instance.
1208 @param EvtRing The event ring to check.
1209 @param NewEvtTrb The new event TRB found.
1211 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1212 @retval EFI_NOT_READY The event ring has no new event.
1218 IN USB_XHCI_INSTANCE
*Xhc
,
1219 IN EVENT_RING
*EvtRing
,
1220 OUT TRB_TEMPLATE
**NewEvtTrb
1224 Create XHCI transfer ring.
1226 @param Xhc The XHCI Instance.
1227 @param TrbNum The number of TRB in the ring.
1228 @param TransferRing The created transfer ring.
1232 CreateTransferRing (
1233 IN USB_XHCI_INSTANCE
*Xhc
,
1235 OUT TRANSFER_RING
*TransferRing
1239 Create XHCI event ring.
1241 @param Xhc The XHCI Instance.
1242 @param EventRing The created event ring.
1247 IN USB_XHCI_INSTANCE
*Xhc
,
1248 OUT EVENT_RING
*EventRing
1252 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1253 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1254 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1255 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1256 Stopped to the Running state.
1258 @param Xhc The XHCI Instance.
1259 @param Urb The urb which makes the endpoint halted.
1261 @retval EFI_SUCCESS The recovery is successful.
1262 @retval Others Failed to recovery halted endpoint.
1267 XhcRecoverHaltedEndpoint (
1268 IN USB_XHCI_INSTANCE
*Xhc
,
1273 Create a new URB for a new transaction.
1275 @param Xhc The XHCI Instance
1276 @param DevAddr The device address
1277 @param EpAddr Endpoint addrress
1278 @param DevSpeed The device speed
1279 @param MaxPacket The max packet length of the endpoint
1280 @param Type The transaction type
1281 @param Request The standard USB request for control transfer
1282 @param Data The user data to transfer
1283 @param DataLen The length of data buffer
1284 @param Callback The function to call when data is transferred
1285 @param Context The context to the callback
1287 @return Created URB or NULL
1292 IN USB_XHCI_INSTANCE
*Xhc
,
1298 IN EFI_USB_DEVICE_REQUEST
*Request
,
1301 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1306 Create a transfer TRB.
1308 @param Xhc The XHCI Instance
1309 @param Urb The urb used to construct the transfer TRB.
1311 @return Created TRB or NULL
1315 XhcCreateTransferTrb (
1316 IN USB_XHCI_INSTANCE
*Xhc
,