2 PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid
3 which is used to enable recovery function from USB Drivers.
5 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions
9 of the BSD License which accompanies this distribution. The
10 full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
21 // Two arrays used to translate the XHCI port state (change)
22 // to the UEFI protocol's port state (change).
24 USB_PORT_STATE_MAP mUsbPortStateMap
[] = {
25 {XHC_PORTSC_CCS
, USB_PORT_STAT_CONNECTION
},
26 {XHC_PORTSC_PED
, USB_PORT_STAT_ENABLE
},
27 {XHC_PORTSC_OCA
, USB_PORT_STAT_OVERCURRENT
},
28 {XHC_PORTSC_PP
, USB_PORT_STAT_POWER
},
29 {XHC_PORTSC_RESET
, USB_PORT_STAT_RESET
}
32 USB_PORT_STATE_MAP mUsbPortChangeMap
[] = {
33 {XHC_PORTSC_CSC
, USB_PORT_STAT_C_CONNECTION
},
34 {XHC_PORTSC_PEC
, USB_PORT_STAT_C_ENABLE
},
35 {XHC_PORTSC_OCC
, USB_PORT_STAT_C_OVERCURRENT
},
36 {XHC_PORTSC_PRC
, USB_PORT_STAT_C_RESET
}
39 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap
[] = {
40 {XHC_PORTSC_CSC
, EfiUsbPortConnectChange
},
41 {XHC_PORTSC_PEC
, EfiUsbPortEnableChange
},
42 {XHC_PORTSC_OCC
, EfiUsbPortOverCurrentChange
},
43 {XHC_PORTSC_PRC
, EfiUsbPortResetChange
}
46 USB_PORT_STATE_MAP mUsbHubPortStateMap
[] = {
47 {XHC_HUB_PORTSC_CCS
, USB_PORT_STAT_CONNECTION
},
48 {XHC_HUB_PORTSC_PED
, USB_PORT_STAT_ENABLE
},
49 {XHC_HUB_PORTSC_OCA
, USB_PORT_STAT_OVERCURRENT
},
50 {XHC_HUB_PORTSC_PP
, USB_PORT_STAT_POWER
},
51 {XHC_HUB_PORTSC_RESET
, USB_PORT_STAT_RESET
}
54 USB_PORT_STATE_MAP mUsbHubPortChangeMap
[] = {
55 {XHC_HUB_PORTSC_CSC
, USB_PORT_STAT_C_CONNECTION
},
56 {XHC_HUB_PORTSC_PEC
, USB_PORT_STAT_C_ENABLE
},
57 {XHC_HUB_PORTSC_OCC
, USB_PORT_STAT_C_OVERCURRENT
},
58 {XHC_HUB_PORTSC_PRC
, USB_PORT_STAT_C_RESET
}
61 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap
[] = {
62 {XHC_HUB_PORTSC_CSC
, EfiUsbPortConnectChange
},
63 {XHC_HUB_PORTSC_PEC
, EfiUsbPortEnableChange
},
64 {XHC_HUB_PORTSC_OCC
, EfiUsbPortOverCurrentChange
},
65 {XHC_HUB_PORTSC_PRC
, EfiUsbPortResetChange
},
66 {XHC_HUB_PORTSC_BHRC
, Usb3PortBHPortResetChange
}
70 Read XHCI Operation register.
72 @param Xhc The XHCI device.
73 @param Offset The operation register offset.
75 @retval the register content read.
86 ASSERT (Xhc
->CapLength
!= 0);
88 Data
= MmioRead32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->CapLength
+ Offset
);
93 Write the data to the XHCI operation register.
95 @param Xhc The XHCI device.
96 @param Offset The operation register offset.
97 @param Data The data to write.
107 ASSERT (Xhc
->CapLength
!= 0);
109 MmioWrite32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->CapLength
+ Offset
, Data
);
113 Set one bit of the operational register while keeping other bits.
115 @param Xhc The XHCI device.
116 @param Offset The offset of the operational register.
117 @param Bit The bit mask of the register to set.
129 Data
= XhcPeiReadOpReg (Xhc
, Offset
);
131 XhcPeiWriteOpReg (Xhc
, Offset
, Data
);
135 Clear one bit of the operational register while keeping other bits.
137 @param Xhc The XHCI device.
138 @param Offset The offset of the operational register.
139 @param Bit The bit mask of the register to clear.
143 XhcPeiClearOpRegBit (
151 Data
= XhcPeiReadOpReg (Xhc
, Offset
);
153 XhcPeiWriteOpReg (Xhc
, Offset
, Data
);
157 Wait the operation register's bit as specified by Bit
158 to become set (or clear).
160 @param Xhc The XHCI device.
161 @param Offset The offset of the operational register.
162 @param Bit The bit mask of the register to wait for.
163 @param WaitToSet Wait the bit to set or clear.
164 @param Timeout The time to wait before abort (in millisecond, ms).
166 @retval EFI_SUCCESS The bit successfully changed by host controller.
167 @retval EFI_TIMEOUT The time out occurred.
175 IN BOOLEAN WaitToSet
,
181 for (Index
= 0; Index
< Timeout
* XHC_1_MILLISECOND
; Index
++) {
182 if (XHC_REG_BIT_IS_SET (Xhc
, Offset
, Bit
) == WaitToSet
) {
186 MicroSecondDelay (XHC_1_MICROSECOND
);
193 Read XHCI capability register.
195 @param Xhc The XHCI device.
196 @param Offset Capability register address.
198 @retval the register content read.
202 XhcPeiReadCapRegister (
209 Data
= MmioRead32 (Xhc
->UsbHostControllerBaseAddress
+ Offset
);
215 Read XHCI door bell register.
217 @param Xhc The XHCI device.
218 @param Offset The offset of the door bell register.
220 @return The register content read
224 XhcPeiReadDoorBellReg (
231 ASSERT (Xhc
->DBOff
!= 0);
233 Data
= MmioRead32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->DBOff
+ Offset
);
239 Write the data to the XHCI door bell register.
241 @param Xhc The XHCI device.
242 @param Offset The offset of the door bell register.
243 @param Data The data to write.
247 XhcPeiWriteDoorBellReg (
253 ASSERT (Xhc
->DBOff
!= 0);
255 MmioWrite32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->DBOff
+ Offset
, Data
);
259 Read XHCI runtime register.
261 @param Xhc The XHCI device.
262 @param Offset The offset of the runtime register.
264 @return The register content read
268 XhcPeiReadRuntimeReg (
275 ASSERT (Xhc
->RTSOff
!= 0);
277 Data
= MmioRead32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->RTSOff
+ Offset
);
283 Write the data to the XHCI runtime register.
285 @param Xhc The XHCI device.
286 @param Offset The offset of the runtime register.
287 @param Data The data to write.
291 XhcPeiWriteRuntimeReg (
297 ASSERT (Xhc
->RTSOff
!= 0);
299 MmioWrite32 (Xhc
->UsbHostControllerBaseAddress
+ Xhc
->RTSOff
+ Offset
, Data
);
303 Set one bit of the runtime register while keeping other bits.
305 @param Xhc The XHCI device.
306 @param Offset The offset of the runtime register.
307 @param Bit The bit mask of the register to set.
311 XhcPeiSetRuntimeRegBit (
319 Data
= XhcPeiReadRuntimeReg (Xhc
, Offset
);
321 XhcPeiWriteRuntimeReg (Xhc
, Offset
, Data
);
325 Clear one bit of the runtime register while keeping other bits.
327 @param Xhc The XHCI device.
328 @param Offset The offset of the runtime register.
329 @param Bit The bit mask of the register to set.
333 XhcPeiClearRuntimeRegBit (
341 Data
= XhcPeiReadRuntimeReg (Xhc
, Offset
);
343 XhcPeiWriteRuntimeReg (Xhc
, Offset
, Data
);
347 Check whether Xhc is halted.
349 @param Xhc The XHCI device.
351 @retval TRUE The controller is halted.
352 @retval FALSE The controller isn't halted.
360 return XHC_REG_BIT_IS_SET (Xhc
, XHC_USBSTS_OFFSET
, XHC_USBSTS_HALT
);
364 Check whether system error occurred.
366 @param Xhc The XHCI device.
368 @retval TRUE System error happened.
369 @retval FALSE No system error.
377 return XHC_REG_BIT_IS_SET (Xhc
, XHC_USBSTS_OFFSET
, XHC_USBSTS_HSE
);
381 Reset the host controller.
383 @param Xhc The XHCI device.
384 @param Timeout Time to wait before abort (in millisecond, ms).
386 @retval EFI_TIMEOUT The transfer failed due to time out.
387 @retval Others Failed to reset the host.
399 // Host can only be reset when it is halt. If not so, halt it
401 if (!XhcPeiIsHalt (Xhc
)) {
402 Status
= XhcPeiHaltHC (Xhc
, Timeout
);
404 if (EFI_ERROR (Status
)) {
409 XhcPeiSetOpRegBit (Xhc
, XHC_USBCMD_OFFSET
, XHC_USBCMD_RESET
);
410 Status
= XhcPeiWaitOpRegBit (Xhc
, XHC_USBCMD_OFFSET
, XHC_USBCMD_RESET
, FALSE
, Timeout
);
412 DEBUG ((EFI_D_INFO
, "XhcPeiResetHC: %r\n", Status
));
417 Halt the host controller.
419 @param Xhc The XHCI device.
420 @param Timeout Time to wait before abort.
422 @retval EFI_TIMEOUT Failed to halt the controller before Timeout.
423 @retval EFI_SUCCESS The XHCI is halt.
434 XhcPeiClearOpRegBit (Xhc
, XHC_USBCMD_OFFSET
, XHC_USBCMD_RUN
);
435 Status
= XhcPeiWaitOpRegBit (Xhc
, XHC_USBSTS_OFFSET
, XHC_USBSTS_HALT
, TRUE
, Timeout
);
436 DEBUG ((EFI_D_INFO
, "XhcPeiHaltHC: %r\n", Status
));
443 @param Xhc The XHCI device.
444 @param Timeout Time to wait before abort.
446 @retval EFI_SUCCESS The XHCI is running.
447 @retval Others Failed to set the XHCI to run.
458 XhcPeiSetOpRegBit (Xhc
, XHC_USBCMD_OFFSET
, XHC_USBCMD_RUN
);
459 Status
= XhcPeiWaitOpRegBit (Xhc
, XHC_USBSTS_OFFSET
, XHC_USBSTS_HALT
, FALSE
, Timeout
);
460 DEBUG ((EFI_D_INFO
, "XhcPeiRunHC: %r\n", Status
));
465 Submits control transfer to a target USB device.
467 @param PeiServices The pointer of EFI_PEI_SERVICES.
468 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
469 @param DeviceAddress The target device address.
470 @param DeviceSpeed Target device speed.
471 @param MaximumPacketLength Maximum packet size the default control transfer
472 endpoint is capable of sending or receiving.
473 @param Request USB device request to send.
474 @param TransferDirection Specifies the data direction for the data stage.
475 @param Data Data buffer to be transmitted or received from USB device.
476 @param DataLength The size (in bytes) of the data buffer.
477 @param TimeOut Indicates the maximum timeout, in millisecond.
478 If Timeout is 0, then the caller must wait for the function
479 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
480 @param Translator Transaction translator to be used by this device.
481 @param TransferResult Return the result of this control transfer.
483 @retval EFI_SUCCESS Transfer was completed successfully.
484 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
485 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
486 @retval EFI_TIMEOUT Transfer failed due to timeout.
487 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
492 XhcPeiControlTransfer (
493 IN EFI_PEI_SERVICES
**PeiServices
,
494 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
495 IN UINT8 DeviceAddress
,
496 IN UINT8 DeviceSpeed
,
497 IN UINTN MaximumPacketLength
,
498 IN EFI_USB_DEVICE_REQUEST
*Request
,
499 IN EFI_USB_DATA_DIRECTION TransferDirection
,
501 IN OUT UINTN
*DataLength
,
503 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
504 OUT UINT32
*TransferResult
511 UINT8 DescriptorType
;
516 EFI_USB_HUB_DESCRIPTOR
*HubDesc
;
518 EFI_STATUS RecoveryStatus
;
520 EFI_USB_PORT_STATUS PortStatus
;
522 EFI_USB_DEVICE_REQUEST ClearPortRequest
;
526 // Validate parameters
528 if ((Request
== NULL
) || (TransferResult
== NULL
)) {
529 return EFI_INVALID_PARAMETER
;
532 if ((TransferDirection
!= EfiUsbDataIn
) &&
533 (TransferDirection
!= EfiUsbDataOut
) &&
534 (TransferDirection
!= EfiUsbNoData
)) {
535 return EFI_INVALID_PARAMETER
;
538 if ((TransferDirection
== EfiUsbNoData
) &&
539 ((Data
!= NULL
) || (*DataLength
!= 0))) {
540 return EFI_INVALID_PARAMETER
;
543 if ((TransferDirection
!= EfiUsbNoData
) &&
544 ((Data
== NULL
) || (*DataLength
== 0))) {
545 return EFI_INVALID_PARAMETER
;
548 if ((MaximumPacketLength
!= 8) && (MaximumPacketLength
!= 16) &&
549 (MaximumPacketLength
!= 32) && (MaximumPacketLength
!= 64) &&
550 (MaximumPacketLength
!= 512)
552 return EFI_INVALID_PARAMETER
;
555 if ((DeviceSpeed
== EFI_USB_SPEED_LOW
) && (MaximumPacketLength
!= 8)) {
556 return EFI_INVALID_PARAMETER
;
559 if ((DeviceSpeed
== EFI_USB_SPEED_SUPER
) && (MaximumPacketLength
!= 512)) {
560 return EFI_INVALID_PARAMETER
;
563 Xhc
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
565 Status
= EFI_DEVICE_ERROR
;
566 *TransferResult
= EFI_USB_ERR_SYSTEM
;
569 if (XhcPeiIsHalt (Xhc
) || XhcPeiIsSysError (Xhc
)) {
570 DEBUG ((EFI_D_ERROR
, "XhcPeiControlTransfer: HC is halted or has system error\n"));
575 // Check if the device is still enabled before every transaction.
577 SlotId
= XhcPeiBusDevAddrToSlotId (Xhc
, DeviceAddress
);
583 // Hook the Set_Address request from UsbBus.
584 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
586 if ((Request
->Request
== USB_REQ_SET_ADDRESS
) &&
587 (Request
->RequestType
== USB_REQUEST_TYPE (EfiUsbNoData
, USB_REQ_TYPE_STANDARD
, USB_TARGET_DEVICE
))) {
589 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
590 // This way is used to clean the history to avoid using wrong device address afterwards.
592 for (Index
= 0; Index
< 255; Index
++) {
593 if (!Xhc
->UsbDevContext
[Index
+ 1].Enabled
&&
594 (Xhc
->UsbDevContext
[Index
+ 1].SlotId
== 0) &&
595 (Xhc
->UsbDevContext
[Index
+ 1].BusDevAddr
== (UINT8
) Request
->Value
)) {
596 Xhc
->UsbDevContext
[Index
+ 1].BusDevAddr
= 0;
600 if (Xhc
->UsbDevContext
[SlotId
].XhciDevAddr
== 0) {
604 // The actual device address has been assigned by XHCI during initializing the device slot.
605 // So we just need establish the mapping relationship between the device address requested from UsbBus
606 // and the actual device address assigned by XHCI. The following invocations through EFI_USB2_HC_PROTOCOL interface
607 // can find out the actual device address by it.
609 Xhc
->UsbDevContext
[SlotId
].BusDevAddr
= (UINT8
) Request
->Value
;
610 Status
= EFI_SUCCESS
;
615 // Create a new URB, insert it into the asynchronous
616 // schedule list, then poll the execution status.
617 // Note that we encode the direction in address although default control
618 // endpoint is bidirectional. XhcPeiCreateUrb expects this
619 // combination of Ep addr and its direction.
621 Endpoint
= (UINT8
) (0 | ((TransferDirection
== EfiUsbDataIn
) ? 0x80 : 0));
622 Urb
= XhcPeiCreateUrb (
637 DEBUG ((EFI_D_ERROR
, "XhcPeiControlTransfer: failed to create URB"));
638 Status
= EFI_OUT_OF_RESOURCES
;
642 Status
= XhcPeiExecTransfer (Xhc
, FALSE
, Urb
, TimeOut
);
645 // Get the status from URB. The result is updated in XhcPeiCheckUrbResult
646 // which is called by XhcPeiExecTransfer
648 *TransferResult
= Urb
->Result
;
649 *DataLength
= Urb
->Completed
;
651 if (Status
== EFI_TIMEOUT
) {
653 // The transfer timed out. Abort the transfer by dequeueing of the TD.
655 RecoveryStatus
= XhcPeiDequeueTrbFromEndpoint(Xhc
, Urb
);
656 if (EFI_ERROR(RecoveryStatus
)) {
657 DEBUG((EFI_D_ERROR
, "XhcPeiControlTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
661 if (*TransferResult
== EFI_USB_NOERROR
) {
662 Status
= EFI_SUCCESS
;
663 } else if (*TransferResult
== EFI_USB_ERR_STALL
) {
664 RecoveryStatus
= XhcPeiRecoverHaltedEndpoint(Xhc
, Urb
);
665 if (EFI_ERROR (RecoveryStatus
)) {
666 DEBUG ((EFI_D_ERROR
, "XhcPeiControlTransfer: XhcPeiRecoverHaltedEndpoint failed\n"));
668 Status
= EFI_DEVICE_ERROR
;
676 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
677 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
678 // Hook Set_Config request from UsbBus as we need configure device endpoint.
680 if ((Request
->Request
== USB_REQ_GET_DESCRIPTOR
) &&
681 ((Request
->RequestType
== USB_REQUEST_TYPE (EfiUsbDataIn
, USB_REQ_TYPE_STANDARD
, USB_TARGET_DEVICE
)) ||
682 ((Request
->RequestType
== USB_REQUEST_TYPE (EfiUsbDataIn
, USB_REQ_TYPE_CLASS
, USB_TARGET_DEVICE
))))) {
683 DescriptorType
= (UINT8
) (Request
->Value
>> 8);
684 if ((DescriptorType
== USB_DESC_TYPE_DEVICE
) && ((*DataLength
== sizeof (EFI_USB_DEVICE_DESCRIPTOR
)) || ((DeviceSpeed
== EFI_USB_SPEED_FULL
) && (*DataLength
== 8)))) {
685 ASSERT (Data
!= NULL
);
687 // Store a copy of device scriptor as hub device need this info to configure endpoint.
689 CopyMem (&Xhc
->UsbDevContext
[SlotId
].DevDesc
, Data
, *DataLength
);
690 if (Xhc
->UsbDevContext
[SlotId
].DevDesc
.BcdUSB
>= 0x0300) {
692 // If it's a usb3.0 device, then its max packet size is a 2^n.
694 MaxPacket0
= 1 << Xhc
->UsbDevContext
[SlotId
].DevDesc
.MaxPacketSize0
;
696 MaxPacket0
= Xhc
->UsbDevContext
[SlotId
].DevDesc
.MaxPacketSize0
;
698 Xhc
->UsbDevContext
[SlotId
].ConfDesc
= AllocateZeroPool (Xhc
->UsbDevContext
[SlotId
].DevDesc
.NumConfigurations
* sizeof (EFI_USB_CONFIG_DESCRIPTOR
*));
699 if (Xhc
->UsbDevContext
[SlotId
].ConfDesc
== NULL
) {
700 Status
= EFI_OUT_OF_RESOURCES
;
703 if (Xhc
->HcCParams
.Data
.Csz
== 0) {
704 Status
= XhcPeiEvaluateContext (Xhc
, SlotId
, MaxPacket0
);
706 Status
= XhcPeiEvaluateContext64 (Xhc
, SlotId
, MaxPacket0
);
708 } else if (DescriptorType
== USB_DESC_TYPE_CONFIG
) {
709 ASSERT (Data
!= NULL
);
710 if (*DataLength
== ((UINT16
*) Data
)[1]) {
712 // Get configuration value from request, store the configuration descriptor for Configure_Endpoint cmd.
714 Index
= (UINT8
) Request
->Value
;
715 ASSERT (Index
< Xhc
->UsbDevContext
[SlotId
].DevDesc
.NumConfigurations
);
716 Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
] = AllocateZeroPool (*DataLength
);
717 if (Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
] == NULL
) {
718 Status
= EFI_OUT_OF_RESOURCES
;
721 CopyMem (Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
], Data
, *DataLength
);
723 } else if (((DescriptorType
== USB_DESC_TYPE_HUB
) ||
724 (DescriptorType
== USB_DESC_TYPE_HUB_SUPER_SPEED
)) && (*DataLength
> 2)) {
725 ASSERT (Data
!= NULL
);
726 HubDesc
= (EFI_USB_HUB_DESCRIPTOR
*) Data
;
727 ASSERT (HubDesc
->NumPorts
<= 15);
729 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
731 TTT
= (UINT8
) ((HubDesc
->HubCharacter
& (BIT5
| BIT6
)) >> 5);
732 if (Xhc
->UsbDevContext
[SlotId
].DevDesc
.DeviceProtocol
== 2) {
734 // Don't support multi-TT feature for super speed hub now.
737 DEBUG ((EFI_D_ERROR
, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
742 if (Xhc
->HcCParams
.Data
.Csz
== 0) {
743 Status
= XhcPeiConfigHubContext (Xhc
, SlotId
, HubDesc
->NumPorts
, TTT
, MTT
);
745 Status
= XhcPeiConfigHubContext64 (Xhc
, SlotId
, HubDesc
->NumPorts
, TTT
, MTT
);
748 } else if ((Request
->Request
== USB_REQ_SET_CONFIG
) &&
749 (Request
->RequestType
== USB_REQUEST_TYPE (EfiUsbNoData
, USB_REQ_TYPE_STANDARD
, USB_TARGET_DEVICE
))) {
751 // Hook Set_Config request from UsbBus as we need configure device endpoint.
753 for (Index
= 0; Index
< Xhc
->UsbDevContext
[SlotId
].DevDesc
.NumConfigurations
; Index
++) {
754 if (Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
]->ConfigurationValue
== (UINT8
)Request
->Value
) {
755 if (Xhc
->HcCParams
.Data
.Csz
== 0) {
756 Status
= XhcPeiSetConfigCmd (Xhc
, SlotId
, DeviceSpeed
, Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
]);
758 Status
= XhcPeiSetConfigCmd64 (Xhc
, SlotId
, DeviceSpeed
, Xhc
->UsbDevContext
[SlotId
].ConfDesc
[Index
]);
763 } else if ((Request
->Request
== USB_REQ_GET_STATUS
) &&
764 (Request
->RequestType
== USB_REQUEST_TYPE (EfiUsbDataIn
, USB_REQ_TYPE_CLASS
, USB_TARGET_OTHER
))) {
765 ASSERT (Data
!= NULL
);
767 // Hook Get_Status request from UsbBus to keep track of the port status change.
769 State
= *(UINT32
*) Data
;
770 PortStatus
.PortStatus
= 0;
771 PortStatus
.PortChangeStatus
= 0;
773 if (DeviceSpeed
== EFI_USB_SPEED_SUPER
) {
775 // For super speed hub, its bit10~12 presents the attached device speed.
777 if ((State
& XHC_PORTSC_PS
) >> 10 == 0) {
778 PortStatus
.PortStatus
|= USB_PORT_STAT_SUPER_SPEED
;
782 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
784 if (XHC_BIT_IS_SET (State
, BIT9
)) {
785 PortStatus
.PortStatus
|= USB_PORT_STAT_LOW_SPEED
;
786 } else if (XHC_BIT_IS_SET (State
, BIT10
)) {
787 PortStatus
.PortStatus
|= USB_PORT_STAT_HIGH_SPEED
;
792 // Convert the XHCI port/port change state to UEFI status
794 MapSize
= sizeof (mUsbHubPortStateMap
) / sizeof (USB_PORT_STATE_MAP
);
795 for (Index
= 0; Index
< MapSize
; Index
++) {
796 if (XHC_BIT_IS_SET (State
, mUsbHubPortStateMap
[Index
].HwState
)) {
797 PortStatus
.PortStatus
= (UINT16
) (PortStatus
.PortStatus
| mUsbHubPortStateMap
[Index
].UefiState
);
801 MapSize
= sizeof (mUsbHubPortChangeMap
) / sizeof (USB_PORT_STATE_MAP
);
802 for (Index
= 0; Index
< MapSize
; Index
++) {
803 if (XHC_BIT_IS_SET (State
, mUsbHubPortChangeMap
[Index
].HwState
)) {
804 PortStatus
.PortChangeStatus
= (UINT16
) (PortStatus
.PortChangeStatus
| mUsbHubPortChangeMap
[Index
].UefiState
);
808 MapSize
= sizeof (mUsbHubClearPortChangeMap
) / sizeof (USB_CLEAR_PORT_MAP
);
810 for (Index
= 0; Index
< MapSize
; Index
++) {
811 if (XHC_BIT_IS_SET (State
, mUsbHubClearPortChangeMap
[Index
].HwState
)) {
812 ZeroMem (&ClearPortRequest
, sizeof (EFI_USB_DEVICE_REQUEST
));
813 ClearPortRequest
.RequestType
= USB_REQUEST_TYPE (EfiUsbNoData
, USB_REQ_TYPE_CLASS
, USB_TARGET_OTHER
);
814 ClearPortRequest
.Request
= (UINT8
) USB_REQ_CLEAR_FEATURE
;
815 ClearPortRequest
.Value
= mUsbHubClearPortChangeMap
[Index
].Selector
;
816 ClearPortRequest
.Index
= Request
->Index
;
817 ClearPortRequest
.Length
= 0;
819 XhcPeiControlTransfer (
836 XhcPeiPollPortStatusChange (Xhc
, Xhc
->UsbDevContext
[SlotId
].RouteString
, (UINT8
)Request
->Index
, &PortStatus
);
838 *(UINT32
*) Data
= *(UINT32
*) &PortStatus
;
842 XhcPeiFreeUrb (Xhc
, Urb
);
846 if (EFI_ERROR (Status
)) {
847 DEBUG ((EFI_D_ERROR
, "XhcPeiControlTransfer: error - %r, transfer - %x\n", Status
, *TransferResult
));
854 Submits bulk transfer to a bulk endpoint of a USB device.
856 @param PeiServices The pointer of EFI_PEI_SERVICES.
857 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
858 @param DeviceAddress Target device address.
859 @param EndPointAddress Endpoint number and its direction in bit 7.
860 @param DeviceSpeed Device speed, Low speed device doesn't support
862 @param MaximumPacketLength Maximum packet size the endpoint is capable of
863 sending or receiving.
864 @param Data Array of pointers to the buffers of data to transmit
865 from or receive into.
866 @param DataLength The lenght of the data buffer.
867 @param DataToggle On input, the initial data toggle for the transfer;
868 On output, it is updated to to next data toggle to use of
869 the subsequent bulk transfer.
870 @param TimeOut Indicates the maximum time, in millisecond, which the
871 transfer is allowed to complete.
872 If Timeout is 0, then the caller must wait for the function
873 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.
874 @param Translator A pointr to the transaction translator data.
875 @param TransferResult A pointer to the detailed result information of the
878 @retval EFI_SUCCESS The transfer was completed successfully.
879 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
880 @retval EFI_INVALID_PARAMETER Parameters are invalid.
881 @retval EFI_TIMEOUT The transfer failed due to timeout.
882 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
888 IN EFI_PEI_SERVICES
**PeiServices
,
889 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
890 IN UINT8 DeviceAddress
,
891 IN UINT8 EndPointAddress
,
892 IN UINT8 DeviceSpeed
,
893 IN UINTN MaximumPacketLength
,
894 IN OUT VOID
*Data
[EFI_USB_MAX_BULK_BUFFER_NUM
],
895 IN OUT UINTN
*DataLength
,
896 IN OUT UINT8
*DataToggle
,
898 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Translator
,
899 OUT UINT32
*TransferResult
906 EFI_STATUS RecoveryStatus
;
909 // Validate the parameters
911 if ((DataLength
== NULL
) || (*DataLength
== 0) ||
912 (Data
== NULL
) || (Data
[0] == NULL
) || (TransferResult
== NULL
)) {
913 return EFI_INVALID_PARAMETER
;
916 if ((*DataToggle
!= 0) && (*DataToggle
!= 1)) {
917 return EFI_INVALID_PARAMETER
;
920 if ((DeviceSpeed
== EFI_USB_SPEED_LOW
) ||
921 ((DeviceSpeed
== EFI_USB_SPEED_FULL
) && (MaximumPacketLength
> 64)) ||
922 ((DeviceSpeed
== EFI_USB_SPEED_HIGH
) && (MaximumPacketLength
> 512)) ||
923 ((DeviceSpeed
== EFI_USB_SPEED_SUPER
) && (MaximumPacketLength
> 1024))) {
924 return EFI_INVALID_PARAMETER
;
927 Xhc
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
929 *TransferResult
= EFI_USB_ERR_SYSTEM
;
930 Status
= EFI_DEVICE_ERROR
;
932 if (XhcPeiIsHalt (Xhc
) || XhcPeiIsSysError (Xhc
)) {
933 DEBUG ((EFI_D_ERROR
, "XhcPeiBulkTransfer: HC is halted or has system error\n"));
938 // Check if the device is still enabled before every transaction.
940 SlotId
= XhcPeiBusDevAddrToSlotId (Xhc
, DeviceAddress
);
946 // Create a new URB, insert it into the asynchronous
947 // schedule list, then poll the execution status.
949 Urb
= XhcPeiCreateUrb (
964 DEBUG ((EFI_D_ERROR
, "XhcPeiBulkTransfer: failed to create URB\n"));
965 Status
= EFI_OUT_OF_RESOURCES
;
969 Status
= XhcPeiExecTransfer (Xhc
, FALSE
, Urb
, TimeOut
);
971 *TransferResult
= Urb
->Result
;
972 *DataLength
= Urb
->Completed
;
974 if (Status
== EFI_TIMEOUT
) {
976 // The transfer timed out. Abort the transfer by dequeueing of the TD.
978 RecoveryStatus
= XhcPeiDequeueTrbFromEndpoint(Xhc
, Urb
);
979 if (EFI_ERROR(RecoveryStatus
)) {
980 DEBUG((EFI_D_ERROR
, "XhcPeiBulkTransfer: XhcPeiDequeueTrbFromEndpoint failed\n"));
983 if (*TransferResult
== EFI_USB_NOERROR
) {
984 Status
= EFI_SUCCESS
;
985 } else if (*TransferResult
== EFI_USB_ERR_STALL
) {
986 RecoveryStatus
= XhcPeiRecoverHaltedEndpoint(Xhc
, Urb
);
987 if (EFI_ERROR (RecoveryStatus
)) {
988 DEBUG ((EFI_D_ERROR
, "XhcPeiBulkTransfer: XhcPeiRecoverHaltedEndpoint failed\n"));
990 Status
= EFI_DEVICE_ERROR
;
994 XhcPeiFreeUrb (Xhc
, Urb
);
998 if (EFI_ERROR (Status
)) {
999 DEBUG ((EFI_D_ERROR
, "XhcPeiBulkTransfer: error - %r, transfer - %x\n", Status
, *TransferResult
));
1006 Retrieves the number of root hub ports.
1008 @param[in] PeiServices The pointer to the PEI Services Table.
1009 @param[in] This The pointer to this instance of the
1010 PEI_USB2_HOST_CONTROLLER_PPI.
1011 @param[out] PortNumber The pointer to the number of the root hub ports.
1013 @retval EFI_SUCCESS The port number was retrieved successfully.
1014 @retval EFI_INVALID_PARAMETER PortNumber is NULL.
1019 XhcPeiGetRootHubPortNumber (
1020 IN EFI_PEI_SERVICES
**PeiServices
,
1021 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
1022 OUT UINT8
*PortNumber
1025 PEI_XHC_DEV
*XhcDev
;
1026 XhcDev
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
1028 if (PortNumber
== NULL
) {
1029 return EFI_INVALID_PARAMETER
;
1032 *PortNumber
= XhcDev
->HcSParams1
.Data
.MaxPorts
;
1033 DEBUG ((EFI_D_INFO
, "XhcPeiGetRootHubPortNumber: PortNumber = %x\n", *PortNumber
));
1038 Clears a feature for the specified root hub port.
1040 @param PeiServices The pointer of EFI_PEI_SERVICES.
1041 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
1042 @param PortNumber Specifies the root hub port whose feature
1043 is requested to be cleared.
1044 @param PortFeature Indicates the feature selector associated with the
1045 feature clear request.
1047 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
1048 for the USB root hub port specified by PortNumber.
1049 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
1054 XhcPeiClearRootHubPortFeature (
1055 IN EFI_PEI_SERVICES
**PeiServices
,
1056 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
1057 IN UINT8 PortNumber
,
1058 IN EFI_USB_PORT_FEATURE PortFeature
1066 Xhc
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
1067 Status
= EFI_SUCCESS
;
1069 if (PortNumber
>= Xhc
->HcSParams1
.Data
.MaxPorts
) {
1070 Status
= EFI_INVALID_PARAMETER
;
1074 Offset
= (UINT32
) (XHC_PORTSC_OFFSET
+ (0x10 * PortNumber
));
1075 State
= XhcPeiReadOpReg (Xhc
, Offset
);
1076 DEBUG ((EFI_D_INFO
, "XhcPeiClearRootHubPortFeature: Port: %x State: %x\n", PortNumber
, State
));
1079 // Mask off the port status change bits, these bits are
1082 State
&= ~ (BIT1
| BIT17
| BIT18
| BIT19
| BIT20
| BIT21
| BIT22
| BIT23
);
1084 switch (PortFeature
) {
1085 case EfiUsbPortEnable
:
1087 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
1088 // A port may be disabled by software writing a '1' to this flag.
1090 State
|= XHC_PORTSC_PED
;
1091 State
&= ~XHC_PORTSC_RESET
;
1092 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1095 case EfiUsbPortSuspend
:
1096 State
|= XHC_PORTSC_LWS
;
1097 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1098 State
&= ~XHC_PORTSC_PLS
;
1099 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1102 case EfiUsbPortReset
:
1104 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
1105 // Register bits indicate status when read, a clear bit may be set by
1106 // writing a '1'. Writing a '0' to RW1S bits has no effect.
1110 case EfiUsbPortPower
:
1111 if (Xhc
->HcCParams
.Data
.Ppc
) {
1113 // Port Power Control supported
1115 State
&= ~XHC_PORTSC_PP
;
1116 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1120 case EfiUsbPortOwner
:
1122 // XHCI root hub port don't has the owner bit, ignore the operation
1126 case EfiUsbPortConnectChange
:
1128 // Clear connect status change
1130 State
|= XHC_PORTSC_CSC
;
1131 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1134 case EfiUsbPortEnableChange
:
1136 // Clear enable status change
1138 State
|= XHC_PORTSC_PEC
;
1139 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1142 case EfiUsbPortOverCurrentChange
:
1144 // Clear PortOverCurrent change
1146 State
|= XHC_PORTSC_OCC
;
1147 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1150 case EfiUsbPortResetChange
:
1152 // Clear Port Reset change
1154 State
|= XHC_PORTSC_PRC
;
1155 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1158 case EfiUsbPortSuspendChange
:
1160 // Not supported or not related operation
1165 Status
= EFI_INVALID_PARAMETER
;
1170 DEBUG ((EFI_D_INFO
, "XhcPeiClearRootHubPortFeature: PortFeature: %x Status = %r\n", PortFeature
, Status
));
1175 Sets a feature for the specified root hub port.
1177 @param PeiServices The pointer of EFI_PEI_SERVICES
1178 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI
1179 @param PortNumber Root hub port to set.
1180 @param PortFeature Feature to set.
1182 @retval EFI_SUCCESS The feature specified by PortFeature was set.
1183 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
1184 @retval EFI_TIMEOUT The time out occurred.
1189 XhcPeiSetRootHubPortFeature (
1190 IN EFI_PEI_SERVICES
**PeiServices
,
1191 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
1192 IN UINT8 PortNumber
,
1193 IN EFI_USB_PORT_FEATURE PortFeature
1201 Xhc
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
1202 Status
= EFI_SUCCESS
;
1204 if (PortNumber
>= Xhc
->HcSParams1
.Data
.MaxPorts
) {
1205 Status
= EFI_INVALID_PARAMETER
;
1209 Offset
= (UINT32
) (XHC_PORTSC_OFFSET
+ (0x10 * PortNumber
));
1210 State
= XhcPeiReadOpReg (Xhc
, Offset
);
1211 DEBUG ((EFI_D_INFO
, "XhcPeiSetRootHubPortFeature: Port: %x State: %x\n", PortNumber
, State
));
1214 // Mask off the port status change bits, these bits are
1217 State
&= ~ (BIT1
| BIT17
| BIT18
| BIT19
| BIT20
| BIT21
| BIT22
| BIT23
);
1219 switch (PortFeature
) {
1220 case EfiUsbPortEnable
:
1222 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
1223 // A port may be disabled by software writing a '1' to this flag.
1227 case EfiUsbPortSuspend
:
1228 State
|= XHC_PORTSC_LWS
;
1229 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1230 State
&= ~XHC_PORTSC_PLS
;
1232 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1235 case EfiUsbPortReset
:
1237 // Make sure Host Controller not halt before reset it
1239 if (XhcPeiIsHalt (Xhc
)) {
1240 Status
= XhcPeiRunHC (Xhc
, XHC_GENERIC_TIMEOUT
);
1241 if (EFI_ERROR (Status
)) {
1247 // 4.3.1 Resetting a Root Hub Port
1248 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
1249 // 2) Wait for a successful Port Status Change Event for the port, where the Port Reset Change (PRC)
1250 // bit in the PORTSC field is set to '1'.
1252 State
|= XHC_PORTSC_RESET
;
1253 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1254 XhcPeiWaitOpRegBit(Xhc
, Offset
, XHC_PORTSC_PRC
, TRUE
, XHC_GENERIC_TIMEOUT
);
1257 case EfiUsbPortPower
:
1258 if (Xhc
->HcCParams
.Data
.Ppc
) {
1260 // Port Power Control supported
1262 State
|= XHC_PORTSC_PP
;
1263 XhcPeiWriteOpReg (Xhc
, Offset
, State
);
1267 case EfiUsbPortOwner
:
1269 // XHCI root hub port don't has the owner bit, ignore the operation
1274 Status
= EFI_INVALID_PARAMETER
;
1278 DEBUG ((EFI_D_INFO
, "XhcPeiSetRootHubPortFeature: PortFeature: %x Status = %r\n", PortFeature
, Status
));
1283 Retrieves the current status of a USB root hub port.
1285 @param PeiServices The pointer of EFI_PEI_SERVICES.
1286 @param This The pointer of PEI_USB2_HOST_CONTROLLER_PPI.
1287 @param PortNumber The root hub port to retrieve the state from.
1288 @param PortStatus Variable to receive the port state.
1290 @retval EFI_SUCCESS The status of the USB root hub port specified.
1291 by PortNumber was returned in PortStatus.
1292 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
1297 XhcPeiGetRootHubPortStatus (
1298 IN EFI_PEI_SERVICES
**PeiServices
,
1299 IN PEI_USB2_HOST_CONTROLLER_PPI
*This
,
1300 IN UINT8 PortNumber
,
1301 OUT EFI_USB_PORT_STATUS
*PortStatus
1309 USB_DEV_ROUTE ParentRouteChart
;
1311 if (PortStatus
== NULL
) {
1312 return EFI_INVALID_PARAMETER
;
1315 Xhc
= PEI_RECOVERY_USB_XHC_DEV_FROM_THIS (This
);
1317 if (PortNumber
>= Xhc
->HcSParams1
.Data
.MaxPorts
) {
1318 return EFI_INVALID_PARAMETER
;
1322 // Clear port status.
1324 PortStatus
->PortStatus
= 0;
1325 PortStatus
->PortChangeStatus
= 0;
1327 Offset
= (UINT32
) (XHC_PORTSC_OFFSET
+ (0x10 * PortNumber
));
1328 State
= XhcPeiReadOpReg (Xhc
, Offset
);
1329 DEBUG ((EFI_D_INFO
, "XhcPeiGetRootHubPortStatus: Port: %x State: %x\n", PortNumber
, State
));
1332 // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.
1334 switch ((State
& XHC_PORTSC_PS
) >> 10) {
1336 PortStatus
->PortStatus
|= USB_PORT_STAT_LOW_SPEED
;
1340 PortStatus
->PortStatus
|= USB_PORT_STAT_HIGH_SPEED
;
1344 PortStatus
->PortStatus
|= USB_PORT_STAT_SUPER_SPEED
;
1352 // Convert the XHCI port/port change state to UEFI status
1354 MapSize
= sizeof (mUsbPortStateMap
) / sizeof (USB_PORT_STATE_MAP
);
1356 for (Index
= 0; Index
< MapSize
; Index
++) {
1357 if (XHC_BIT_IS_SET (State
, mUsbPortStateMap
[Index
].HwState
)) {
1358 PortStatus
->PortStatus
= (UINT16
) (PortStatus
->PortStatus
| mUsbPortStateMap
[Index
].UefiState
);
1362 // Bit5~8 reflects its current link state.
1364 if ((State
& XHC_PORTSC_PLS
) >> 5 == 3) {
1365 PortStatus
->PortStatus
|= USB_PORT_STAT_SUSPEND
;
1368 MapSize
= sizeof (mUsbPortChangeMap
) / sizeof (USB_PORT_STATE_MAP
);
1370 for (Index
= 0; Index
< MapSize
; Index
++) {
1371 if (XHC_BIT_IS_SET (State
, mUsbPortChangeMap
[Index
].HwState
)) {
1372 PortStatus
->PortChangeStatus
= (UINT16
) (PortStatus
->PortChangeStatus
| mUsbPortChangeMap
[Index
].UefiState
);
1376 MapSize
= sizeof (mUsbClearPortChangeMap
) / sizeof (USB_CLEAR_PORT_MAP
);
1378 for (Index
= 0; Index
< MapSize
; Index
++) {
1379 if (XHC_BIT_IS_SET (State
, mUsbClearPortChangeMap
[Index
].HwState
)) {
1380 XhcPeiClearRootHubPortFeature (PeiServices
, This
, PortNumber
, (EFI_USB_PORT_FEATURE
)mUsbClearPortChangeMap
[Index
].Selector
);
1385 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
1386 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
1388 ParentRouteChart
.Dword
= 0;
1389 XhcPeiPollPortStatusChange (Xhc
, ParentRouteChart
, PortNumber
, PortStatus
);
1391 DEBUG ((EFI_D_INFO
, "XhcPeiGetRootHubPortStatus: PortChangeStatus: %x PortStatus: %x\n", PortStatus
->PortChangeStatus
, PortStatus
->PortStatus
));
1396 @param FileHandle Handle of the file being invoked.
1397 @param PeiServices Describes the list of possible PEI Services.
1399 @retval EFI_SUCCESS PPI successfully installed.
1405 IN EFI_PEI_FILE_HANDLE FileHandle
,
1406 IN CONST EFI_PEI_SERVICES
**PeiServices
1409 PEI_USB_CONTROLLER_PPI
*UsbControllerPpi
;
1412 UINTN ControllerType
;
1415 PEI_XHC_DEV
*XhcDev
;
1416 EFI_PHYSICAL_ADDRESS TempPtr
;
1420 // Shadow this PEIM to run from memory.
1422 if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle
))) {
1426 Status
= PeiServicesLocatePpi (
1427 &gPeiUsbControllerPpiGuid
,
1430 (VOID
**) &UsbControllerPpi
1432 if (EFI_ERROR (Status
)) {
1433 return EFI_UNSUPPORTED
;
1438 Status
= UsbControllerPpi
->GetUsbController (
1439 (EFI_PEI_SERVICES
**) PeiServices
,
1446 // When status is error, it means no controller is found.
1448 if (EFI_ERROR (Status
)) {
1453 // This PEIM is for XHC type controller.
1455 if (ControllerType
!= PEI_XHCI_CONTROLLER
) {
1460 MemPages
= EFI_SIZE_TO_PAGES (sizeof (PEI_XHC_DEV
));
1461 Status
= PeiServicesAllocatePages (
1462 EfiBootServicesData
,
1466 if (EFI_ERROR (Status
)) {
1467 return EFI_OUT_OF_RESOURCES
;
1469 ZeroMem ((VOID
*) (UINTN
) TempPtr
, EFI_PAGES_TO_SIZE (MemPages
));
1470 XhcDev
= (PEI_XHC_DEV
*) ((UINTN
) TempPtr
);
1472 XhcDev
->Signature
= USB_XHC_DEV_SIGNATURE
;
1473 XhcDev
->UsbHostControllerBaseAddress
= (UINT32
) BaseAddress
;
1474 XhcDev
->CapLength
= (UINT8
) (XhcPeiReadCapRegister (XhcDev
, XHC_CAPLENGTH_OFFSET
) & 0x0FF);
1475 XhcDev
->HcSParams1
.Dword
= XhcPeiReadCapRegister (XhcDev
, XHC_HCSPARAMS1_OFFSET
);
1476 XhcDev
->HcSParams2
.Dword
= XhcPeiReadCapRegister (XhcDev
, XHC_HCSPARAMS2_OFFSET
);
1477 XhcDev
->HcCParams
.Dword
= XhcPeiReadCapRegister (XhcDev
, XHC_HCCPARAMS_OFFSET
);
1478 XhcDev
->DBOff
= XhcPeiReadCapRegister (XhcDev
, XHC_DBOFF_OFFSET
);
1479 XhcDev
->RTSOff
= XhcPeiReadCapRegister (XhcDev
, XHC_RTSOFF_OFFSET
);
1482 // This PageSize field defines the page size supported by the xHC implementation.
1483 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1484 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1486 PageSize
= XhcPeiReadOpReg (XhcDev
, XHC_PAGESIZE_OFFSET
) & XHC_PAGESIZE_MASK
;
1487 XhcDev
->PageSize
= 1 << (HighBitSet32 (PageSize
) + 12);
1489 DEBUG ((EFI_D_INFO
, "XhciPei: UsbHostControllerBaseAddress: %x\n", XhcDev
->UsbHostControllerBaseAddress
));
1490 DEBUG ((EFI_D_INFO
, "XhciPei: CapLength: %x\n", XhcDev
->CapLength
));
1491 DEBUG ((EFI_D_INFO
, "XhciPei: HcSParams1: %x\n", XhcDev
->HcSParams1
.Dword
));
1492 DEBUG ((EFI_D_INFO
, "XhciPei: HcSParams2: %x\n", XhcDev
->HcSParams2
.Dword
));
1493 DEBUG ((EFI_D_INFO
, "XhciPei: HcCParams: %x\n", XhcDev
->HcCParams
.Dword
));
1494 DEBUG ((EFI_D_INFO
, "XhciPei: DBOff: %x\n", XhcDev
->DBOff
));
1495 DEBUG ((EFI_D_INFO
, "XhciPei: RTSOff: %x\n", XhcDev
->RTSOff
));
1496 DEBUG ((EFI_D_INFO
, "XhciPei: PageSize: %x\n", XhcDev
->PageSize
));
1498 XhcPeiResetHC (XhcDev
, XHC_RESET_TIMEOUT
);
1499 ASSERT (XhcPeiIsHalt (XhcDev
));
1502 // Initialize the schedule
1504 XhcPeiInitSched (XhcDev
);
1507 // Start the Host Controller
1509 XhcPeiRunHC (XhcDev
, XHC_GENERIC_TIMEOUT
);
1512 // Wait for root port state stable
1514 MicroSecondDelay (XHC_ROOT_PORT_STATE_STABLE
);
1516 XhcDev
->Usb2HostControllerPpi
.ControlTransfer
= XhcPeiControlTransfer
;
1517 XhcDev
->Usb2HostControllerPpi
.BulkTransfer
= XhcPeiBulkTransfer
;
1518 XhcDev
->Usb2HostControllerPpi
.GetRootHubPortNumber
= XhcPeiGetRootHubPortNumber
;
1519 XhcDev
->Usb2HostControllerPpi
.GetRootHubPortStatus
= XhcPeiGetRootHubPortStatus
;
1520 XhcDev
->Usb2HostControllerPpi
.SetRootHubPortFeature
= XhcPeiSetRootHubPortFeature
;
1521 XhcDev
->Usb2HostControllerPpi
.ClearRootHubPortFeature
= XhcPeiClearRootHubPortFeature
;
1523 XhcDev
->PpiDescriptor
.Flags
= (EFI_PEI_PPI_DESCRIPTOR_PPI
| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST
);
1524 XhcDev
->PpiDescriptor
.Guid
= &gPeiUsb2HostControllerPpiGuid
;
1525 XhcDev
->PpiDescriptor
.Ppi
= &XhcDev
->Usb2HostControllerPpi
;
1527 PeiServicesInstallPpi (&XhcDev
->PpiDescriptor
);